DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicants’ election without traverse of Invention I in the reply filed on 7 April 2026 is acknowledged. Claims 21-30 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Invention II, there being no allowable generic or linking claim. Election was made without traverse.
Claim Objections
Claim 12 is objected to because of the following informalities:
Claim 12, line 3, recites “wherein the frontside contact (FSC) in contact with,” which should read “wherein the frontside contact (FSC) is in contact with” for proper composition.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 10-16 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 10, line 2, recites “wherein SVC,” which is indefinite because it is unclear whether this “SVC” refers to that recited in base claim 1 or a different SVC. For the purpose of compact prosecution and to better comport with claim 1 and intervening claim 9, the claim will be interpreted to recite “wherein the SVC.” Claims 11-16 are rejected due to their dependence from intermediate claim 10.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-7, 9-13, 15, 16, and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guler et al. (US20230275124A1).
Regarding claim 1, Guler teaches in Figs. 1, 14B a semiconductor cell, comprising:
a source/drain (S/D) (102/702), the S/D (102/702) being epitaxial (EPI) {[0036]};
a frontside contact (FSC) (portion of 114 above annotated 1st surface) or a backside contact (BSC) (portion of 114 below annotated 2nd surface) or both, the frontside contact (portion of 114 above annotated 1st surface), when present, being in contact with an upper surface of the S/D (102/702), and the backside contact (portion of 114 below annotated 2nd surface), when present, being in contact with a lower surface of the S/D (102/702) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 below}; and
a side vertical contact (SVC) (portion of 114 between annotated 1st and 2nd surfaces) in contact with a side surface of the S/D (102/702) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 below}.
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Regarding claim 2, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein the upper surface of the S/D (102/702) and an upper surface of the SVC (portion of 114 between annotated 1st and 2nd surfaces) are planar {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 3, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein the SVC (portion of 114 between annotated 1st and 2nd surfaces) is in contact with a side surface of the backside contact (portion of 114 below annotated 2nd surface) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 4, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein the SVC (portion of 114 between annotated 1st and 2nd surfaces) is in contact with an entirety of the side surface of the S/D (102/702) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 5, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein a lower surface of the backside contact (portion of 114 below annotated 2nd surface) and a lower surface of the SVC (portion of 114 between annotated 1st and 2nd surfaces) are planar {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 6, Guler teaches the semiconductor cell of claim 1, and Guler further teaches further comprising:
a backside metal (portion of 114 extending through 110, which ¶0043 indicates may be designated separate conductive backside contact) in contact with a lower surface of the backside contact (portion of 114 below annotated 2nd surface and above 110) {[0043]}; and
a backside power/signal line (116) in contact with the backside metal (portion of 114 extending through 110), the backside power/signal line (116) being configured (it is made of a conductive material) to provide power or signal to the S/D (102/702) through the backside metal (portion of 114 extending through 110), the backside contact (portion of 114 below annotated 2nd surface and above 110), and the SVC (portion of 114 between annotated 1st and 2nd surfaces) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 7, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein the frontside contact (FSC) (portion of 114 above annotated 1st surface) in contact with an upper surface of the SVC (portion of 114 between annotated 1st and 2nd surfaces) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 9, Guler teaches the semiconductor cell of claim 1, and Guler further teaches
wherein the S/D (102/702) is a first S/D (1st S/D) of a first type, and the SVC (portion of 114 between annotated 1st and 2nd surfaces) is in contact with the side surface of the first S/D (1st S/D), and
wherein the semiconductor cell further comprises:
a second S/D (2nd S/D) of a second type opposite the first type; and
a dielectric wall (DW) (118) separating the first (1st S/D) and second (2nd S/D) S/Ds {Figs. 1, 14B; [0044]; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 10, as interpreted in view of the indefiniteness rejection, Guler teaches the semiconductor cell of claim 9, and Guler further teaches
wherein the SVC (portion of 114 between annotated 1st and 2nd surfaces) is a first SVC (1st SVD) in contact with the side surface of the first S/D (1st S/D), and
wherein the semiconductor cell further comprises:
a second SVC (2nd SVC) in contact with a side surface of the second S/D (2nd S/D), the first and second SVCs (1st SVC, 2nd SVC) being electrically decoupled from each other by the DW (118) {Figs. 1, 14B; [0044]; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 11, Guler teaches the semiconductor cell of claim 10, and Guler further teaches
wherein an upper surface of the first SVC (1st SVC) and an upper surface of the second SVC (2nd SVC) are at a same upper height, or
wherein a lower surface of the first SVC (1st SVC) and a lower surface of the second SVC (2nd SVC) are at a same lower height, or
both {Figs. 1, 14B; [0044]; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 12, Guler teaches the semiconductor cell of claim 10, and Guler further teaches
wherein the first SVC (1st SVC) is in contact with a side surface of the backside contact (portion of 114 below annotated 2nd surface), or
wherein the frontside contact (FSC) (portion of 114 above annotated 1st surface) in contact with an upper surface of the second SVC, or
both (unselected alternative) {Figs. 1, 14B; [0044]; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 13, Guler teaches the semiconductor cell of claim 12, and Guler further teaches further comprising:
a backside metal (portion of 114 extending through 110, which ¶0043 indicates may be designated separate conductive backside contact) in contact with a lower surface of the backside contact (portion of 114 below annotated 2nd surface and above 110) {[0043]}; and
a backside power/signal line (116) in contact with the backside metal (portion of 114 extending through 110), the backside power/signal line (116) being configured (it is made of a conductive material) to provide power or signal to the first S/D (1st S/D) through the backside metal (portion of 114 extending through 110), the backside contact (portion of 114 below annotated 2nd surface and above 110) and the first SVC (1st SVC) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 15, Guler teaches the semiconductor cell of claim 10, and Guler further teaches
wherein the backside contact (portion of 114 below annotated 2nd surface) is a first backside contact (portion of 114 below annotated 2nd surface), the first SVC (1st SVC) being in contact with a side surface of the first backside contact (portion of 114 below annotated 2nd surface), and
wherein the semiconductor cell further comprises:
a second backside contact (portion of 114 below annotated 2nd surface) in contact with a lower surface of the second S/D (2nd S/D), the second SVC (2nd SVC) being in contact with a side surface of the second backside contact (portion of 114 below annotated 2nd surface) {Figs. 1, 14B; [0043]; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}.
Regarding claim 16, Guler teaches the semiconductor cell of claim 15, and Guler further teaches wherein semiconductor cell further comprises:
a first backside metal (portion of 114 extending through 110, which ¶0043 indicates may be designated separate conductive backside contact) in contact with a lower surface of the first backside contact (portion of 114 below annotated 2nd surface and above 110) {[0043]}; and
a first backside power/signal line (116) in contact with the first backside metal (portion of 114 extending through 110), the first backside power/signal line (116) being configured (it is made of a conductive material) to provide power or signal to the first S/D (1st S/D) through the first backside metal (portion of 114 extending through 110), the first backside contact (portion of 114 below annotated 2nd surface and above 110) and the first SVC (1st SVC) {Figs. 1, 14B; see annotated copy of Guler’s Fig. 1 provided above with respect to claim 1}, or
wherein semiconductor cell further comprises:
a second backside metal in contact with a lower surface of the second backside contact (unselected alternative); and
a second backside power/signal line in contact with the second backside metal, the second backside power/signal line being configured to provide power or signal to the second S/D through the second backside metal, the second backside contact and the second SVC (unselected alternative), or
both (unselected alternative).
Regarding claim 20, Guler teaches the semiconductor cell of claim 1, and Guler further teaches wherein the semiconductor cell is incorporated into an apparatus selected from the group consisting of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, a computer, a wearable device, an Internet of things (IoT) device, a laptop computer, a server, and a device in an automotive vehicle {Fig. 18; [0090, 0094, 0095]}.
Claim(s) 8 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Guler as applied to claim 7 and 12 respectively above, and further in view of Lee et al. (US20240321690A1).
Regarding claim 8, Guler teaches the semiconductor cell of claim 7, and Guler further teaches further comprising:
a frontside conductor (120) in contact with an upper surface of the frontside contact (portion of 114 above annotated 1st surface) {[0045]}.
Guler does not expressly teach a frontside conductor is metal; and a frontside power/signal line in contact with the frontside metal, the frontside power/signal line being configured to provide power or signal to the S/D through the frontside metal, the frontside contact and the SVC.
In an analogous art, Lee teaches in Figs. 3B and 8A-C and paragraphs [0077, 0078, 0123] a frontside metal (VA); and a frontside power/signal line (M1) in contact with the frontside metal (VA), the frontside power/signal line (M1) being configured to provide power or signal to an S/D (130) through the frontside metal (VA), a frontside contact (portion of CA directly contacting top surface of 130 in Fig. 3B) and an SVC (portion of CA directly contacting inclined side surface of 130 in Fig. 3B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Guler’s semiconductor cell based on the teachings of Lee – to include a front side metal; and a frontside power/signal line in contact with the frontside metal, the frontside power/signal line being configured to provide power or signal to the S/D through the frontside metal, the frontside contact and the SVC – so as to provide electrical connectivity between the frontside power/signal line and the S/D. Moreover, all the claimed elements (e.g., frontside power/signal line, frontside metal, S/D, SVC) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Regarding claim 14, Guler teaches the semiconductor cell of claim 12, and Guler further teaches further comprising:
a frontside conductor (120) in contact with an upper surface of the frontside contact (portion of 114 above annotated 1st surface) {[0045]}.
Guler does not expressly teach a frontside conductor is metal; and a frontside power/signal line in contact with the frontside metal, the frontside power/signal line being configured to provide power or signal to the second S/D through the frontside metal, the frontside contact and the second SVC.
Lee teaches in Figs. 3B and 8A-C and paragraphs [0077, 0078, 0123] a frontside metal (VA); and a frontside power/signal line (M1) in contact with the frontside metal (VA), the frontside power/signal line (M1) being configured to provide power or signal to a second S/D (130) through the frontside metal (VA), a frontside contact (portion of CA directly contacting top surface of 130 in Fig. 3B) and a second SVC (portion of CA directly contacting inclined side surface of 130 in Fig. 3B). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Guler’s semiconductor cell based on the teachings of Lee – to include a frontside conductor is metal; and a frontside power/signal line in contact with the frontside metal, the frontside power/signal line being configured to provide power or signal to the second S/D through the frontside metal, the frontside contact and the second SVC – so as to provide electrical connectivity between the frontside power/signal line and the S/D. Moreover, all the claimed elements (e.g., frontside power/signal line, frontside metal, S/D, SVC) were known in the prior art and one skilled in the art could have combined the elements as claimed by known methods (e.g., as taught by Lee) with no change in their respective functions, and the combination yielding nothing more than predictable results to one of ordinary skill in the art. MPEP §2143(I)(A). Furthermore, [t]he selection of a known … [structure] based on its suitability for its intended use [is] … prima facie obviousness. MPEP §2144.07.
Allowable Subject Matter
Claims 17-19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 17, the prior art does not teach, suggest or motivate one having ordinary skill in the art to have the recited subject matter whereby “the backside contact is in contact with lower surfaces of the first and second S/Ds and a lower surface of the DW” in combination with the other limitations of the claim. Claims 18 and 19 are allowable due to their dependence from intermediate claim 17.
Citation of Pertinent Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Zhang et al. (US20210358911A1) teaches a fork-sheet semiconductor device includes a first-type source/drain region on a substrate and a second-type source/drain region on the substrate and separated from the first-type source/drain region by an insulator pillar. The fork-sheet semiconductor device further includes a first metal portion and a second metal portion. The first metal portion completely covers a first upper surface and a first exposed sidewall the first-type source/drain region and the second metal portion completely covers a second upper surface and a second exposed sidewall the second-type source/drain region. The first and second metal portions are separated from one another by the insulator pillar. A first-type contact portion extends vertically from the first metal portion and an opposing second-type contact portion extends vertically from the second metal portion. A first upper interconnect structure contacts the first-type contact portion and a second upper interconnect structure contacts the second-type contact portion. But Zhang does not teach the above-identified subject matter of claim 17.
Conclusion
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/D.W.W./ Examiner, Art Unit 2891
/MATTHEW C LANDAU/ Supervisory Patent Examiner, Art Unit 2891
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