DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on July 29, 2024, and December 21, 2023 were considered by the examiner.
Drawing Objections
The drawings are objected to because:
In ¶ 0034, Applicant uses the label “311_us” with reference to figure 3. However, figure 3 has the label “311a_us” and “313a”.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1-2, and 8 is/are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Song et al. (US 2019/0164975 A1) (“Song”).
Regarding claim 1, Song teaches at least in figures 1-2:
a substrate (100) having active portions (ACT) extending in a first direction (D3),
the active (ACT) portions comprising first and second impurity regions (112b and 112a) at central and edge portions thereof, respectively (112a and 112b are so located);
a device isolation pattern (102) in the substrate (100) between the active portions (ACT);
a first bit line (BL) connected to at least one of the first impurity regions (112b) and extending over the active portions (ACT) in a second direction (D2) that intersects the first direction (D1);
a second bit line (a second BL) spaced apart from the first bit line (BL) in a third direction (D3) that intersects the first and second directions (X1 and X2) (Per Applicant’s specification in ¶¶ 0001-26, each of the above elements of the prior intersects the claimed directions in the same manner disclosed by Applicant);
first and second bit line capping patterns (137) on the first and second bit lines (BL and the second BL), respectively;
a storage node contact (BC) between the first bit line (BL) and the second bit line (a second BL) and in contact with one of the second impurity regions (112b);
a diffusion barrier layer (11a) on a sidewall of the first bit line (BL; where 11a is on a side of the sidewall of BL in the same manner Applicant’s 311a is on a sidewall of BL), on a sidewall of the second bit line (11a), and on an upper surface of the storage node contact therebetween (BC) (the prior art figure 1B is structured in the same manner as Applicant’s figure 2); and
a landing pad (LP) on the diffusion barrier layer (11a),
wherein a first upper end of the diffusion barrier layer (upper end of 11a in region P1) on the sidewall of the first bit line (BL) is lower than the first bit line capping pattern (137, where either part of 11a can be considered an upper end, or a right side of 11a which is below the top of 137 can be considered on the sidewall of BL) , relative to the substrate (100), and
wherein a second upper end of the diffusion barrier layer on the sidewall of the second bit line is lower than the first upper end, relative to the substrate (11a extends on the a second BL and the 11a which extends on the second BL can be considered the same as the limitation above. Applicant has not claimed the entirety of the diffusion barrier layer is below the capping layer. Thus, the use of comprising allows for more regions of the diffusion barrier layer to extend past the capping layer).
Regarding claim 2, Song teaches at least in figures 1-2:
a spacer structure (21, AG2, 25, 27) between the first bit line (BL) and the diffusion barrier layer (11a),
wherein the spacer structure (21, AG2, 25, 27) comprises (detailed below; as will be shown below the prior art teaches the same structure shown in Applicant’s figure 2):
a first spacer (21) on the sidewall of the first bit line (BL) and on a sidewall of the first bit line capping pattern (137),
a second spacer (AG2) on a lower side surface of the first spacer (21),
wherein an upper side surface of the first spacer (21) is free of the second spacer (AG2 is free of 21 in the upper side),
a third spacer (25) on a side surface of the second spacer (AG2); and
a fourth spacer (27) on the upper side surface of the first spacer (21) and in contact with an upper surface of the second spacer (AG2),
wherein an upper end of the second spacer (AG2) is lower than the first upper end of the diffusion barrier layer (11a), relative to the substrate (100).
Regarding claim 8, Song teaches at least in figures 1-2:
herein the first upper end of the diffusion barrier layer (11a) has a substantially planar or concave upper surface (11a has such a shape).
Allowable Subject Matter
Claims 3-7 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Regarding claim 3, Song teaches at least in figures 1-2:
a first pad portion (bottom of LP) on the diffusion barrier layer (11a); and
a second pad portion (top of LP) on the first pad portion (bottom of LP)
Song does not teach:
The second pad portion in contact with the first bit line capping pattern, and
wherein the first pad portion comprises chlorine atoms, and the second pad portion is free of chlorine atoms.
Regarding claim 7,
Claim 7 is allowable for the same reasons as claim 3 above.
Claims 9-20 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 9, The prior art does not teach:
wherein upper sidewalls of the first and second bit line capping patterns are free of the diffusion barrier layer
As shown in figure 1B, the upper sidewalls of the 137 are not free of 11a.
Regarding claim 16,
Claim 16 is allowable for the same reasons as claim 9 above, in that claim 16 has the same/similar limitation.
Regarding claim 21,
Claim 21 is allowable for the same reasons as claim 9 above, in that claim 21 has the same/similar limitation.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT WALL whose telephone number is (571)272-9567. The examiner can normally be reached Monday to Thursday at 7:30am to 2:30pm PST. Interviews can be scheduled on Tuesday thru Thursday at 10am PST or 2pm PST.
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/VINCENT WALL/ Primary Examiner, Art Unit 2898