Prosecution Insights
Last updated: April 18, 2026
Application No. 18/392,757

SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Non-Final OA §103
Filed
Dec 21, 2023
Examiner
HAIDER, WASIUL
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
2y 2m
To Grant
98%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allow Rate
489 granted / 532 resolved
+23.9% vs TC avg
Moderate +6% lift
Without
With
+6.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
18 currently pending
Career history
550
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
53.7%
+13.7% vs TC avg
§102
24.1%
-15.9% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 532 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election of Group I and Species I in the reply filed on 3/18/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.03(a)). Claims 2,4-6 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to nonelected Group II and Species II claims, there being no allowable generic or linking claim. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. 1. Claim(s) 1,3 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 20240112858 A1 (West) in view of US 20220310488 A1 (Fang). Regarding claim 1, West shows (Fig. 2-3, 4L) a semiconductor device (200, para 15) comprising: PNG media_image1.png 572 868 media_image1.png Greyscale a substrate (201, para 16 or 402, para 18); a breakdown voltage holding insulating film (432, silicon oxide, high stress film, para 23, 414,412, para 20, 422,418,416,414,412,406) that is disposed on a side of an upper surface of the substrate; an element portion that includes a lower element (302, para 20) and an upper element (202, para 21), the lower element being disposed in the breakdown voltage holding insulating film and being spiral in top view (similar coil as 202 shown in Fig. 2), the upper element being disposed above the lower element in the breakdown voltage holding insulating film (432) and being spiral in top view (since similar to 202 of Fig. 2); a lead-out wire (334, para 16) that has one end portion connected to one end portion of the lower element; a first electrode pad (212, para 20) that is connected to the other end portion of the lead-out wire; a second electrode pad (204, para 21) that is located opposite the one end portion of the lower element and is one end portion of the upper element (since 204 is connected to the top end portion as compared to 212 which was connected to the bottom of the end portion of 302); and a top layer protective film (442, para 27) that has an opening (for connection to 322) above the second electrode pad and covers the upper element so that the second electrode pad is exposed from the opening, wherein the breakdown voltage holding insulating film and the top layer protective film extend to a region outside the first electrode pad in a direction of extension of the lead-out wire, the top layer protective film covers a peripheral portion of the second electrode pad. West does not show an electrically conductive pad double stack portion is disposed on an upper surface of the second electrode pad. PNG media_image2.png 490 852 media_image2.png Greyscale Fang shows (Fig. 2) an electrically conductive pad double stack portion (223b, para 29) is disposed on an upper surface of the second electrode pad (222b, para 29). It would have been obvious to one of ordinary skill in the art, at or before the effective filing date of the invention was made, to modify the second electrode pad of West with pad-on-pad of Fang. The motivation to do so is that the combination produces the predictable result of better conductivity for the upper element as required for the invention of West. Regarding claim 3, West as previously modified with Fang shows wherein a top view outline of the pad double stack portion (223b, Fang para 29) is larger than a top view outline of the second electrode pad (222b, Fang para 29). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WASIUL HAIDER whose telephone number is (571)272-1554. The examiner can normally be reached M-F 9 a.m. - 6 p.m.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William Partridge can be reached at (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WASIUL HAIDER/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Dec 21, 2023
Application Filed
Apr 07, 2026
Non-Final Rejection — §103 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
98%
With Interview (+6.4%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 532 resolved cases by this examiner. Grant probability derived from career allow rate.

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