Prosecution Insights
Last updated: July 17, 2026
Application No. 18/393,621

WAFER LAMINATION SYSTEMS AND METHODS THEREOF FOR SEMICONDUCTOR WAFERS

Non-Final OA §102§103§112
Filed
Dec 21, 2023
Priority
Dec 21, 2022 — provisional 63/434,458
Examiner
HARM, NICKOLAS R
Art Unit
1759
Tech Center
1700 — Chemical & Materials Engineering
Assignee
UTAC Headquarters Pte. Ltd.
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
85%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
626 granted / 789 resolved
+14.3% vs TC avg
Moderate +6% lift
Without
With
+5.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
21 currently pending
Career history
814
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
63.2%
+23.2% vs TC avg
§102
5.8%
-34.2% vs TC avg
§112
29.9%
-10.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 789 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-11, and 13-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “various processing modules” in lines 8 and 17, but it is not clear whether these require the same modules or requires second various processing modules. Claim 6 recites the limitation "the input sub-system module" in line 1. There is insufficient antecedent basis for this limitation in the claim. Claim 6 recites “a robotic module” in line 4, but does dot define whether this is the robotic module of claim 1, or requires an additional module. Claim 8 recites “the system of claim 8” in line 1. As a claim cannot depend from itself, the limitations required by the claim are not defined. This will be read as “the system of claim 7”. Claim 10 recites “the system of claim 10” in line 1. As a claim cannot depend from itself, the limitations required by the claim are not defined. This will be read as “the system of claim 9”. Claim 13 recites “the system of claim 13” in line 1. As a claim cannot depend from itself, the limitations required by the claim are not defined. This will be read as “the system of claim 12”. Claim 14 recites “the system of claim 14” in line 1. As a claim cannot depend from itself, the limitations required by the claim are not defined. This will be read as “the system of claim 9”. Claim 18 recites “the method of claim 18” in line 1. As a claim cannot depend from itself, the limitations required by the claim are not defined. This will be read as “the system of claim 12”. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “input sub-system” in claims 1, 9-10, and 12; “processing sub-system” in claims 1, 2, 9-10, 13-14, 16, and 19; “wafer receiving module” in claims 1-2, 5-7, 9-10, 12, and 17; “output sub-system” in claims 1, 7, 9, and 10; “delamination module” in claims 2, 3, 10, and 13; “wafer ring pick and place module” in claims 2, 5, 8, 10, 14, 16, and 18; “lamination module” in claims 2, 4, 10, and 15; “curing unit” in claim 3; “delamination unit” in claims 3 and 13; “cleaning unit” in claim 4; “lamination unit” in claim 4; “wafer input module” in claim 6; “robotic module” in claims 6, 12, and 20; “wafer aligner module” in claims 6 and 12; “conveyor unit” in claim 7; “lamination system” in claim 12; and “output module” in claims 12 and 17. Because this/these claim limitation(s) is/are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, it/they is/are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have this/these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid it/them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The limitation “input sub-system” recites the generic placeholder “sub-system” coupled with the functional modifier “input” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 111, shown in figure 1b, and equivalents thereof. The limitation “processing sub-system” recites the generic placeholder “sub-system” coupled with the functional modifier “processing” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 141, shown in figure 1b, and equivalents thereof. The limitation “wafer receiving module” recites the generic placeholder “module” coupled with the functional modifier “receiving” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 140, shown in figure 1b, and equivalents thereof. The limitation “output sub-system” recites the generic placeholder “sub-system” coupled with the functional modifier “output” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 191, shown in figure 1b, and equivalents thereof. The limitation “delamination module” recites the generic placeholder “module” coupled with the functional modifier “delamination” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 150, shown in figure 1b, and equivalents thereof. The limitation “wafer ring pick and place module” recites the generic placeholder “module” coupled with the functional modifier “pick and place” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 180, shown in figure 1b, and equivalents thereof. The limitation “lamination module” recites the generic placeholder “module” coupled with the functional modifier “lamination” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 150, shown in figure 1b, and equivalents thereof. The limitation “curing unit” recites the generic placeholder “unit” coupled with the functional modifier “curing” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 155, shown in figure 1b, and equivalents thereof. The limitation “delamination unit” recites the generic placeholder “unit” coupled with the functional modifier “delamination” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 150, shown in figure 1b, and equivalents thereof. The limitation “cleaning unit” recites the generic placeholder “unit” coupled with the functional modifier “cleaning” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 160, shown in figure 1b, and equivalents thereof. The limitation “lamination unit” recites the generic placeholder “unit” coupled with the functional modifier “lamination” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 170, shown in figure 1b, and equivalents thereof. The limitation “wafer input module” recites the generic placeholder “module” coupled with the functional modifier “input” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 120, shown in figure 1b, and equivalents thereof. The limitation “robotic module” recites the generic placeholder “module” coupled with the functional modifier “pick (and) flip” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 110, shown in figure 1b, and equivalents thereof. The limitation “wafer aligner module” recites the generic placeholder “module” coupled with the functional modifier “align” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 130, shown in figure 1b, and equivalents thereof. The limitation “conveyor unit” recites the generic placeholder “unit” coupled with the functional modifier “conveyor” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 545, shown in figure 1b, and equivalents thereof. The limitation “lamination system” recites the generic placeholder “system” coupled with the functional modifier “lamination” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 100, shown in figure 1b, and equivalents thereof. The limitation “output module” recites the generic placeholder “module” coupled with the functional modifier “output” without reciting sufficient structure to perform the function claimed. This will be interpreted as: structure 190, shown in figure 1b, and equivalents thereof. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 6-8, and 11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by AKECHI (US 2008/0044258). Regarding claims 1 and 11, AKECHI teaches a wafer lamination station comprising an input subsystem with robot arm 11 and 12, a processing subsystem comprising a wafer receiving module 17, processing modules for peeling a first tape from the wafer and bonding a second tape thereto, positioning chuck 77 and 78, and an output subsystem 140 (paras. 60, 66, and 74; fig. 1) capable of working upon the materials claimed. Regarding claim 6, AKECHI teaches a wafer input module 11, robotic module 37, and wafer alignment module 30 (paras. 55 and 57; fig. 1) capable of performing the claimed functions. Regarding claim 7, AKECHI teaches a conveyor unit 145, assembly repository 23, and output robotic arm 144 (fig. 1). Regarding claim 8, AKECHI teaches the arm comprises suction arm that can pick and place (AKECHI; para. 74). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 2-3 and 5 is/are rejected under 35 U.S.C. 103 as being unpatentable over AKECHI in view of KANESHIMA et al. (US 2007/0181245). Regarding claim 2, AKECHI teaches a delamination module (para. 62 and 64), wafer pick and place module 12 (para. 55), lamination module (para. 60), a WRM table on a central track 17 that moves between stations to hold the wafer ring 40 (para. 58; fig. 1). AKECHI does not teach the WRM table comprises positioning pins of a positioning chuck of the WRM table. KANESHIMA teaches another wafer lamination system, wherein the wafer alignment stage comprises positioning pins (para. 76), such that it would have been obvious to one of ordinary skill in the art at the time of the invention to utilize positioning pins on the positioning chuck of AKECHI in order to facilitate positioning of the wafer on the chuck. Regarding claim 3, AKECHI teaches an ultraviolet curing unit 13 (AKECHI; para. 54) and delamination unit (AKECHI; para. 60). Regarding claim 5, AKECHI teaches a stock table ring repository 42 (para. 58), wafer ring track 44, and robotic arm 53 (AKECHI; fig. 1). Claim(s) 4 is/are rejected under 35 U.S.C. 103 as being unpatentable over the references as combined as applied to claim 2 above, and further in view of MASADA et al. (US 2020/0171707). Regarding claim 4, the references as combined teach a lamination unit (AKECHI; para. 60), but does not teach a cleaning unit. MASADA teaches another wafer lamination system comprising a cleaning unit 126 (MASADA; para. 74), wherein it would have been obvious to one of ordinary skill in the art at the time of the invention to include a cleaning unit in the apparatus of the references as combined as a well-known means of cleaning wafers in wafer grinding and cutting apparatuses. Claim(s) 9-10 is/are rejected under 35 U.S.C. 103 as being unpatentable over AKECHI. Regarding claim 9, AKECHI teaches the input sub-system, processing subsystem, and WRM tracks are placed on separate component platforms (fig. 1), but it would have been obvious to one of ordinary skill in the art at the time of the invention to include all of the individual components on a common system platform because integration of apparatus components has been held per se obvious (MPEP 2144.04). Regarding claim 10, AKECHI teaches the processing sub-system located centrally between the input and output subsystems, delamination module 51, wafer ring pick and place module 144, lamination module 41 and several separate WRM 17, 78, 90, 130 located between the input and output modules (fig. 1), where it would have been obvious to one of ordinary skill in the art at the time of the invention to utilize a single WRM, as the entirety of modules can be considered a WRM, and making integral multiple components has been held per se obvious (MPEP 2144.04). Allowable Subject Matter Claim 12 allowed. Claims 13-20 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art of record does not teach wafer processing method as claimed wherein the input sub-system comprises wafers having a back grinding tape laminated thereto, delaminating the back grinding tape, and attacking a dicing tape on the surface from which the back grinding tape was removed. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: YAMAMOTO et al. (US 2003/0133762), SEKIYA (US 2019/0206734), KUMAZAWA (US 2020/0185276), and SHINJO et al. (US 2007/0196588). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Nickolas R Harm whose telephone number is (571)270-7605. The examiner can normally be reached 10:00-6:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Phillip Tucker can be reached at 571-272-1095. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /NICKOLAS R HARM/ Examiner, Art Unit 1745 /PHILIP C TUCKER/ Supervisory Patent Examiner, Art Unit 1745
Read full office action

Prosecution Timeline

Dec 21, 2023
Application Filed
Mar 12, 2024
Response after Non-Final Action
Jun 10, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12681377
Projector curtain
3y 0m to grant Granted Jul 14, 2026
Patent 12679083
PEELING SYSTEM AND PEELING METHOD FOR FLEXIBLE FINGERPRINT COMPONENT
2y 11m to grant Granted Jul 14, 2026
Patent 12666749
THERMAL DECOMPOSITION APPARATUS AND THERMAL DECOMPOSITION METHOD APPLYING THE SAME
2y 6m to grant Granted Jun 23, 2026
Patent 12636873
Device and method for peeling off protective films from plate-shaped objects
2y 5m to grant Granted May 26, 2026
Patent 12629228
Systems And Methods For Managing Surgical Sponges
2y 8m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
85%
With Interview (+5.8%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 789 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month