Prosecution Insights
Last updated: October 01, 2026
Application No. 18/394,137

METHOD OF MANUFACTURING AN INTEGRATED DEVICE COMPRISING ANODIC POROUS OXIDE WITH LIMITED ROUGHNESS

Non-Final OA §102§103
Filed
Dec 22, 2023
Priority
Dec 22, 2022 — EU 22307006.1
Examiner
MENZ, DOUGLAS M
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Commissariat à l'Énergie Atomique et aux Énergies Alternatives
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
704 granted / 794 resolved
+20.7% vs TC avg
Minimal +5% lift
Without
With
+4.7%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 1m
Avg Prosecution
30 currently pending
Career history
816
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
39.0%
-1.0% vs TC avg
§102
49.1%
+9.1% vs TC avg
§112
2.1%
-37.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 794 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Group II, claims 12-19, in the reply filed on 7/16/26 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 12-15 and 18-19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by JP 2006269471 (‘471). Note: referenced to Applicant provided translation. Regarding claim 12, ‘471 discloses an integrated device comprising: a substrate (16, fig. 1); and a metal anodization barrier layer on the substrate having a planarized top surface (13, fig. 1 and paragraphs 0029-0045); an anodic porous oxide region arranged on the metal anodization barrier and comprising a plurality of substantially straight pores that extend from a top surface of the porous region towards the metal anodization barrier layer (14, fig. 1 and paragraphs 0029-0045), the anodic porous oxide region having a top surface having an average surface roughness of less than 20nm (paragraphs 0046-0049). Regarding claim 13, ‘471 further discloses wherein the metal anodization barrier layer has an average surface roughness comprised between 1nm and 10nm and/or a maximal peak to valley height of less than 30nm (paragraphs 0046-0049). Regarding claim 14, ‘471 further discloses wherein the anodic porous oxide region is surrounded by unanodized metal having an average roughness parameter comprised between 20nm and 50nm (15, fig. 1 and paragraph 0045, inherent property of material). Regarding claim 15, ‘471 further discloses wherein the metal anodization barrier layer is patterned into at least two separate metal anodization barrier portions, the integrated device further comprising an insulating region separating the at least two metal anodization barrier portions, wherein the insulating region is flush with the at least two metal anodization barrier portions (fig. 17 and paragraphs 0090-0094). Regarding claim 18, ‘471 further discloses a stacked capacitive structure inside a group of pores of the anodic porous oxide region, the stacked capacitive structure comprising a bottom electrode layer (13, fig. 1) in contact with the metal anodization barrier layer, a top electrode layer (15, fig. 1), and a dielectric layer arranged between the bottom and the top electrode layer (14, fig. 1 and paragraphs 0029-0049). Regarding claim 19, ‘471 further discloses wherein the substrate comprises an insulating region on its top surface below and in contact with the metal anodization barrier layer (16, fig. 1 and paragraphs 0029-0049). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over JP 2006269471 (‘471). Note: referenced to Applicant provided translation. Regarding claims 16-17, ‘471 discloses the device of claim 12, as mentioned above. ‘471 does not explicitly disclose an anodization mask having an opening delimiting the porous region (paragraph 0045) or wherein the anodic porous oxide region is flush with the top surface of the anodization mask. However, ‘471 does explicitly disclose wherein the oxide film 14 does not need to cover the entire surface of the lower electrode 13 and can constitute a nonlinear element. As such, it would have been obvious to one of ordinary skill in the art at the time of filing to utilize an anodization mask having an opening delimiting the porous region and wherein the anodic porous oxide region is flush with the top surface of the anodization mask. Since such practice was considered as ordinary procedure commonly practiced in the art of semiconductor manufacturing to accomplish such a task. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent Application Publication 2023/0187143 discloses a method for forming an electrical device with an anodic porous oxide region and US Patent 5141603 discloses a capacitor with an anodic porous oxide. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS M MENZ whose telephone number is (571)272-1877. The examiner can normally be reached Monday-Friday 8:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DOUGLAS M MENZ/Primary Examiner, Art Unit 2897 9/17/26
Read full office action

Prosecution Timeline

Dec 22, 2023
Application Filed
Sep 21, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
93%
With Interview (+4.7%)
2y 1m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 794 resolved cases by this examiner. Grant probability derived from career allowance rate.

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