DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant's amendments and arguments filed 7/22/2026 have been fully considered and are persuasive, the rejection has been updated to address the newly amended limitations.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 2, and 4 are rejected under 35 U.S.C. 103 as being unpatentable over Daniels et al (U.S. Pub #2014/001616), in view of Kierse (U.S. Pub #2014/0035113), in view of Takamori et al (WO 2023/047720), see also Takamori et al (U.S. Pub #2024/0379383).
With respect to claim 1, Daniels teaches a method of forming to lead frame for a semiconductor package, comprising:
forming a lead frame that has leads that extend to corners of the lead frame (i.e. after singulation the leads 120 will be positioned at a corner between bottom surface and outer perimeter surface, see Fig. 7) such that each corner lead has a dimple (Fig. 1-6, 130 and Paragraph 33) formed at an outer surface thereof;
applying a metal or metal alloy to exposed lead ends of the leads (Paragraph 6 and 51, plating layer); and
disposing a thermoset polymer material (Paragraph 52, 54, etc. ; material 300) into a portion of the dimple to a predetermined thickness;
cutting the lead frame through a portion of the dimple and the polymer material in a singulation process to remove the polymer material from the dimple (Paragraph 59, at least some of the polymer material is removed during the initial saw step; as a step in the singulation process the rest of material is removed before performing the final saw step), wherein the dimple of each corner lead has no burrs or defects immediately after cutting (Paragraph 34, 52, etc).
Daniels does not teach
providing a sheet of conductive material;
applying a resist material in a predetermined pattern on the sheet of conductive material;
etching the conductive material to form a lead frame.
Kierse teaches
providing a sheet of conductive material (Fig. 2A, 14);
applying a resist material (Fig. 2B, 17 and 18; Paragraph 48) in a predetermined pattern on the sheet of conductive material;
etching the conductive material to form a lead frame (Fig. 2C-2J).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the lead frame using the steps as taught by Kierse in order to achieve the predictable result of patterning the lead frame portions using the resist material (Paragraph 48 and 50).
Daniels discloses that the dimple is at least partially filled with the thermoset polymer (Paragraph 52) which suggests that Daniels teaches that “the thermoset polymer materials does not fill the dimple”, but does not explicitly depict that the material 300 does not fill the dimple.
Takamori discloses a polymer material (Fig. 5, 9c) that does not fill a dimple (Fig. 5, 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the polymer material of Daniels to not fill the dimple as taught by Takamori in order to achieve the predictable result of inhibiting the occurrence of burrs (Paragraph 49).
With respect to claim 2, Daniels teaches that the metal or metal alloy is applied by electro- plating or electro-deposition (Paragraph 6 and 51, plating layer).
With respect to claim 4, Daniels teaches that the metal or metal alloy comprises one or more of NiPdAu, NiPdAuAg, and NiPd (Paragraph 6 and 51, plating layer).
Claims 3 and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Daniels, Kierse, and Takamori, in view of Li et al (U.S. Patent #6872599).
With respect to claim 3, Daniels does not teach that the predetermined thickness is 20 microns or greater.
Li teaches a lead frame comprising a dimple (Fig. 9, 701 and Col 6 Ln 34-36), wherein the dimple has a depth of 20 microns or greater (Col 7 Ln 4-9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to form the dimple of Daniels to have a depth of 20 microns or greater (and thus the material filling the dimple will have a predetermined thickness of 20 microns or greater) as taught by Li in order to provide a depth of the dimple to allow a solder fillet to form (Col 2 Ln 63 – Col 3 Ln 8).
With respect to claim 5, Daniels does not teach applying tape to portion the lead frame.
Li teaches applying tape (Fig. 9, 801 and Col 7 Ln 32-44) to a portion the lead frame.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to apply tape to the lead frame of Daniels as taught by Li in order to ensure the encapsulation is coplanar to the bottom of the leads (Col 7 Ln 32-44).
Claims 10-13 are rejected under 35 U.S.C. 103 as being unpatentable over Daniels et al (U.S. Pub #2014/001616), in view of Takamori et al (WO 2023/047720), see also Takamori et al (U.S. Pub #2024/0379383).
With respect to claim 10, Daniels teaches a method of forming semiconductor packaging with a burr free dimple, comprising:
providing an array of rectangular lead frames (Figs. 1-6, 110), wherein each lead frame of the array of rectangular lead frames has leads (Fig. 1-6, 120) that extend to corners of each lead frame (i.e. after singulation the leads 120 will be positioned at a corner between bottom surface and outer perimeter surface, see Fig. 7) and a dimple (Fig. 1-6, 130) at an outer surface thereof;
applying a metal or metal alloy to exposed lead ends of the leads (Paragraph 6 and 51, plating layer);
applying a thermoset polymer material (Paragraph 52, 54, and 56 etc. ; material 300) in a portion of dimple, wherein the polymer material is configured to prevent accumulation of defects comprising one or more of burrs;
mounting and attaching semiconductor dies to the lead frames (not depicted, Paragraph 40);
electrically connecting bond pads on the semiconductor dies with each semiconductor die on a different one of the leads of the lead frames upon which the semiconductor dies are mounted (not depicted, Paragraph 40); and
encapsulating the semiconductor dies and electrical connections with a mold compound (Fig. 7, 142 and Paragraph 49); and
cutting the array of lead frames to separate individual devices (Fig. 7, 140) from adjacent devices through a portion of the dimple and polymer material to remove the polymer material from the dimple (Paragraph 59, at least some of the polymer material is removed during the initial saw step; as a step in the singulation process the rest of material is removed before performing the final saw step), whereby each device has corner bond pads that are configured to be substantially flush with the mold compound thereof and wherein the dimple of each corner lead has no burrs or defects immediately after cutting (Paragraph 34, 52, etc).
Daniels discloses that the dimple is at least partially filled with the thermoset polymer (Paragraph 52) which suggests that Daniels teaches that “the thermoset polymer materials does not fill the dimple”, but does not explicitly depict that the material 300 does not fill the dimple.
Takamori discloses a polymer material (Fig. 5, 9c) that does not fill a dimple (Fig. 5, 5). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the polymer material of Daniels to not fill the dimple as taught by Takamori in order to achieve the predictable result of inhibiting the occurrence of burrs (Paragraph 49).
With respect to claim 11, Daniels teaches that the metal or alloy is applied by electro-plating or electro-deposition (Paragraph 6 and 51, plating layer).
With respect to claim 12, Daniels teaches that the metal or metal alloy comprises one or more of NiPdAu, NiPdAuAg, and NiPd (Paragraph 6 and 51, plating layer).
With respect to claim 13, Daniels teaches that the step of electrically connecting comprises attaching bond wires to the die bond pads and respective ones of the leads (Paragraph 40).
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Daniels and Takamori, in view of Robison (U.S. Pub #2010/0052141).
With respect to claim 14, Daniels does not teach that non-active sides of the semiconductor dies are attached to the leads of each of the respective lead frames.
Robison teaches a flat leadframe structure, wherein non-active sides of the semiconductor dies (Fig. 1, 122) are attached to the leads (Fig. 1, 112) of each of the respective lead frames.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form the respective leadframes of Daniels such that non-active sides of the dies are attached to the leads as taught by Robison in order to implement a CoL structure (Paragraph 35).
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Daniels and Takamori, in view of Li et al (U.S. Patent #6872599).
With respect to claim 18, Daniels does not teach that the predetermined thickness is 20 microns or greater.
Li teaches a lead frame comprising a dimple (Fig. 9, 701 and Col 6 Ln 34-36), wherein the dimple has a depth of 20 microns or greater (Col 7 Ln 4-9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claim invention to form the dimple of Daniels to have a depth of 20 microns or greater (and thus the material filling the dimple will have a predetermined thickness of 20 microns or greater) as taught by Li in order to provide a depth of the dimple to allow a solder fillet to form (Col 2 Ln 63 – Col 3 Ln 8).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BENJAMIN P SANDVIK whose telephone number is (571)272-8446. The examiner can normally be reached M-F: 10-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Davienne Monbleau can be reached at (571)-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BENJAMIN P SANDVIK/Primary Examiner, Art Unit 2812
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