Prosecution Insights
Last updated: July 17, 2026
Application No. 18/394,884

SEMICONDUCTOR DEVICE INCLUDING CAPACITOR

Non-Final OA §102§103§112
Filed
Dec 22, 2023
Priority
Jan 05, 2023 — RE 10-2023-0001628
Examiner
LEE, ALVIN LYNGHI
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
66 granted / 74 resolved
+21.2% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
33 currently pending
Career history
120
Total Applications
across all art units

Statute-Specific Performance

§103
81.4%
+41.4% vs TC avg
§102
8.6%
-31.4% vs TC avg
§112
5.7%
-34.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 74 resolved cases

Office Action

§102 §103 §112
CTNF 18/394,884 CTNF 98398 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions Applicant’s election with traverse of Species/sub-species/sub-sub species B(i)(b), in the reply filed on May 07, 2027 is acknowledged. The traversal is on the ground(s) that search and examination of all the claims may be made without serious burden. This is not found persuasive because the different structures would require different search strategies. 08-05 AIA Claim s 2-3, 7-8, 11, and 17 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) , as being drawn to a nonelected Species , there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on May 07, 2026 . It is noted for clarity, that claim 7 requires the second electrode to include a first and second material layer and the first electrode does not include the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]). However, elected species B, as drawn to Fig 3, has a first electrode that includes the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) (LE_1, [0054] in disclosure). Further, the second electrode only has a second material layer, as implied from [0064] of disclosure, UE_L appears to be the same material as UE_L2 of Fig 1 and [0064] of the disclosure discloses “the first upper electrode layer UE_La may be transformed into a first upper electrode layer UE_L that does not include the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) (UE_L1 in FIG. 1).” Similarly, claim 8 requires a third material layer on the second material layer. As discussed above, the second electrode of the chosen species does not have a second material layer to place a third layer upon . Specification 06-16 AIA Applicant is reminded of the proper language and format for an abstract of the disclosure. The abstract should be in narrative form and generally limited to a single paragraph on a separate sheet within the range of 50 to 150 words in length. The abstract should describe the disclosure sufficiently to assist readers in deciding whether there is a need for consulting the full patent text for details. The language should be clear and concise and should not repeat information given in the title. It should avoid using phrases which can be implied, such as, “The disclosure concerns,” “The disclosure defined by this invention,” “The disclosure describes,” etc. In addition, the form and legal phraseology often used in patent claims, such as “means” and “said,” should be avoided. Claim Rejections - 35 USC § 112 07-30-02 AIA The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. 07-34-01 Claims 5 and 14 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. 07-34-13 Regarding claim 5, claim 5 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements. See MPEP § 2172.01. The omitted elements are: The identity of the “materials” of line 2 are unknown. The term “materials” can be read as (1) any of the materials of the second material region that are located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less, (2) one of the materials of the second material region listed in claim 4 located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less, or (3) at least 80 at% of the materials from the second material region are located between the first crystalline region and the second crystalline region of the first material layer such that only 20 at% or less remains in the second material region. However, for the second interpretation, claim 5 is dependent on claim 1, which has no mention of specific materials for the second material region. For purposes of examination, Examiner will interpret the claim to mean (1) any of the materials of the second material region that are located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less. 07-34-13 Regarding claim 14, similar to claim 5, claim 14 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being incomplete for omitting essential elements, such omission amounting to a gap between the elements. See MPEP § 2172.01. The omitted elements are: The identity of the “materials” of line 3 are unknown. The term “materials” can be read as (1) any of the materials of the second material region that are located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less or (2) one of the materials of the second material region listed in claim 15 located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less. However, for the second interpretation, claim 15 follows claim 14 and is dependent on claim 12, which has no mention of specific materials for the second material region. For purposes of examination, Examiner will interpret the claim to mean (1) any of the materials of the second material region that are located between the first crystalline region and the second crystalline region of the first material layer are 20 at% or less. Claim Rejections - 35 USC § 102 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-08-aia AIA (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. 07-15 AIA Claim s 1, 4, 6, 9-10, 12-13, 15-16, and 18-20 are rejected under 35 U.S.C. 102( a)(1 ) as being anticipated by Lee et. al. (US 20190333985 A1), hereinafter Lee, with supporting evidence from Sato et. al (US 20040222493 A1), hereinafter Sato, with supporting evidence from Huang et. al. (US 9966425 B1), hereinafter Huang . Regarding claim 1, Lee teaches a semiconductor device (Fig 1 semiconductor device 100, [0030]) comprising: a structure (Fig 1 semiconductor device 100, [0030]) including a conductive region (Fig 1 contact plug 105, [0032]) ; and a capacitor (Fig 1 comprising lower electrode 119, dielectric layer 121, and upper electrode 123) electrically connected ([0034]) to the conductive region (Fig 1 contact plug 105, [0032]) of the structure (Fig 1 semiconductor device 100, [0030]) , wherein the capacitor (Fig 1 comprising lower electrode structure 119, dielectric layer 121, and upper electrode structure 123) includes a first electrode (Fig 1 lower electrode structure 119, [0034]) electrically connected ([0034]) to the conductive region (Fig 1 contact plug 105, [0032]) , a second electrode (Fig 1 upper electrode structure 123, [0030]) on the first electrode (Fig 1 lower electrode structure 119, [0034]) , and a dielectric layer (Fig 1 dielectric layer 121, [0030]) between the first electrode (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) , wherein at least one of the first electrode (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) includes, a first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) including a first material region (Fig 1 electrode pattern 113a, [0034]) , and a second material region (Fig 1 barrier layer 115a, [0034]) , and a second material layer (Fig 1 electrode pattern 117a, [0039]) on the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) (Fig 1 electrode pattern 113a, [0039]) , wherein at least a portion of the first material layer (Fig 1 electrode pattern 113a, [0039]) is between (Fig 1) the second material layer (Fig 1 electrode pattern 117a, [0039]) and the dielectric layer (Fig 1 dielectric layer 121, [0030]) , and a material of the first material region (Fig 1 electrode pattern 113a, [0034]) is different from ([0039] is a list of materials for electrode pattern 113a and [0037 is a list of materials for barrier layer 115a]; they have different materials) a material of the second material region (Fig 1 barrier layer 115a, [0034]) . Lee fails to teach a first material layer including a first material region including a first crystalline region and a second crystalline region different from the first crystalline region, and a second material region between the first crystalline region and the second crystalline region. However, [0057] and [0062] of the instant application discloses the first material layer may be TiN. Huang teaches that TiN films have different crystalline orientations (col 2, lines 20-26) . Sato teaches laminated structures will have portions of upper layers going into portions of lower layers due to variations in grain height (Figs 22-24, [0024]-[0028]) . Thus, the material layers would inherently have a first material region that would include a first crystalline region and a second crystalline region different from the first crystalline region (due to the different crystalline orientations disclosed by Huang) , and a second material region that would be between the first crystalline region and the second crystalline region (due to the upper layer going into the valleys formed by the differing grain boundaries of the lower layer, in this case the first material region disclosed by Sato) . MPEP 2112 (II) Regarding claim 4, Lee teaches the material of the first material region (Fig 1 electrode pattern 113a, [0034]) and a material of the second material layer (Fig 1 electrode pattern 117a, [0039]) include at least one of TiN (TiN, [0039]) , CrN, NbN, HfN, or ZrN, and the material of the second material region (Fig 1 barrier layer 115a, [0034]) includes at least one of Al, Si, or B (TiSiN, [0037]) . Regarding claim 6, Lee teaches a thickness of the first material layer (Fig 1 electrode pattern 113a, [0039]) is in a range of 10 Å to 40 Å (1 Å to 30 Å, [0034]) . Regarding claim 9, Lee teaches the first electrode (Fig 1 lower electrode structure 119, [0034]) includes the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) and the second material layer (Fig 1 electrode pattern 117a, [0039]) , and in the first electrode (Fig 1 lower electrode structure 119, [0034]) , the second material layer (Fig 1 electrode pattern 117a, [0039]) has a columnar shape (Fig 1) , and the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) covers a side surface of (Fig 1) and a bottom surface (Fig 1) of the second material layer (Fig 1 electrode pattern 117a, [0039]) . Regarding claim 10, Lee teaches the second electrode (Fig 1 upper electrode structure 123, [0030]) does not include the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) . Regarding claim 12, Lee teaches a semiconductor device (Fig 1 semiconductor device 100, [0030]) comprising: a structure (Fig 1 semiconductor device 100, [0030]) including conductive region (Fig 1 contact plug 105, [0032]) s; and a capacitor (Fig 1 comprising lower electrode structure 119, dielectric layer 121, and upper electrode structure 123) electrically connected to the structure (Fig 1 semiconductor device 100, [0030]) , wherein the capacitor (Fig 1 comprising lower electrode structure 119, dielectric layer 121, and upper electrode structure 123) includes first electrodes (Fig 1 lower electrode structure 119, [0034]) electrically connected to the conductive region (Fig 1 contact plug 105, [0032]) s, a second electrode (Fig 1 upper electrode structure 123, [0030]) on the first electrodes (Fig 1 lower electrode structure 119, [0034]) , and a dielectric layer (Fig 1 dielectric layer 121, [0030]) between the first electrodes (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) , wherein at least one of the first electrodes (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) includes, a first material region (Fig 1 electrode pattern 113a, [0034]) , and a second material region (Fig 1 barrier layer 115a, [0034]) , wherein a material of the first material region (Fig 1 electrode pattern 113a, [0034]) is different from ([0039] is a list of materials for electrode pattern 113a and [0037 is a list of materials for barrier layer 115a]; they have different materials) a material of the second material region (Fig 1 barrier layer 115a, [0034]) . Lee fails to teach a first material region including a first crystalline region having a (111) crystal plane and a second crystalline region having a (200) crystal plane, and a second material region between the first crystalline region and the second crystalline region; and in the first material region, a volume of the second crystalline region is greater than or equal to a volume of the first crystalline region. However, [0057] and [0062] of the instant application discloses the first material layer may be TiN. Huang teaches that TiN films have different crystalline orientations with the (200) orientation being greater than the (111) orientation (col 2, lines 20-26) . Sato teaches laminated structures will have portions of upper layers going into portions of lower layers due to variations in grain height (Figs 22-24, [0024]-[0028]) . Thus, a material layer would inherently have a first material region including a first crystalline region having a (111) crystal plane and a second crystalline region having a (200) crystal plane (due to the different crystalline orientations disclosed by Huang) , and second material region between the first crystalline region and the second crystalline region (due to the upper layer going into the valleys formed by the differing grain boundaries of the lower layer, in this case the first material region disclosed by Sato) ; and a volume of the second crystalline region is greater than or equal to a volume of the first crystalline region (disclosed by Huang; Examiner interprets orientations being greater than other orientations to mean the volume of one orientation is greater than a different orientation) . MPEP 2112 (II) Regarding claim 13, Lee teaches a thickness of a material layer (Fig 1 electrode pattern 113a, [0039]) including the first material region (Fig 1 electrode pattern 113a, [0034]) and the second material region (Fig 1 barrier layer 115a, [0034]) is in a range of 10 Å to 40 Å (1 Å to 30 Å, [0034]) . Regarding claim 15, Lee teaches one or more materials of the first material region (Fig 1 electrode pattern 113a, [0034]) includes at least one of TiN (TiN, [0039]) , CrN, NbN, HfN, or ZrN, and one or more materials of the second material region (Fig 1 barrier layer 115a, [0034]) includes at least one of Al, Si, or B (TiSiN, [0037]) . Regarding claim 16, Lee teaches the first material region (Fig 1 electrode pattern 113a, [0034]) is in contact (Fig 1) with the dielectric layer (Fig 1 dielectric layer 121, [0030]) , and the second material region (Fig 1 barrier layer 115a, [0034]) is spaced apart from (Fig 1) the dielectric layer (Fig 1 dielectric layer 121, [0030]) . Regarding claim 18, Lee teaches a semiconductor device (Fig 1 semiconductor device 100, [0030]) comprising: a structure (Fig 1 semiconductor device 100, [0030]) including conductive regions (Fig 1 contact plug 105, [0032]) ; and a memory element (Fig 1 comprising lower electrode structure 119, dielectric layer 121, and upper electrode structure 123) electrically connected to the conductive regions (Fig 1 contact plug 105, [0032]) of the structure (Fig 1 semiconductor device 100, [0030]) , wherein the memory element (Fig 1 comprising lower electrode structure 119, dielectric layer 121, and upper electrode structure 123) includes first electrodes (Fig 1 lower electrode structure 119, [0034]) electrically connected to the conductive regions (Fig 1 contact plug 105, [0032]) , a second electrode (Fig 1 upper electrode structure 123, [0030]) on the first electrodes (Fig 1 lower electrode structure 119, [0034]) , and a dielectric layer (Fig 1 dielectric layer 121, [0030]) between the first electrodes (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) , wherein at least one of the first electrodes (Fig 1 lower electrode structure 119, [0034]) and the second electrode (Fig 1 upper electrode structure 123, [0030]) includes, a first material region (Fig 1 electrode pattern 113a, [0034]) and a second material region (Fig 1 barrier layer 115a, [0034]) . Lee fails to teach a first material region including a first crystalline region of a first columnar shape and a second crystalline region of a second columnar shape, different from the first columnar shape, and a second material region between the first crystalline region and the second crystalline region, wherein a material of the first material region is different from a material of the second material region, in the first material region, a volume of the second crystalline region is equal to or greater than a volume of the first crystalline region, and a work function of the second crystalline region is greater than a work function of the first crystalline region. However, [0057] and [0062] of the instant application discloses the first material layer may be TiN. Huang teaches that TiN films have different crystalline orientations with the (200) orientation being greater than the (111) orientation (col 2, lines 20-26) . Sato teaches laminated structures will have portions of upper layers going into portions of lower layers due to variations in grain height (Figs 22-24, [0024]-[0028]) . Thus, a first material region would include a first crystalline region of a first columnar shape and a second crystalline region of a second columnar shape, different from the first columnar shape (due to the different crystalline orientations disclosed by Huang) , and a second material region between the first crystalline region and the second crystalline region (due to the upper layer going into the valleys formed by the differing grain boundaries of the lower layer, in this case the first material region disclosed by Sato) ; and in the first material region, a volume of the second crystalline region is equal to or greater than a volume of the first crystalline region (disclosed by Huang; Examiner interprets orientations being greater than other orientations to mean the volume of one orientation is greater than a different orientation) MPEP 2112 (II); and a work function of the second crystalline region is greater than a work function of the first crystalline region (since the materials and crystalline orientations are the same then the work functions would also have the same differences) . MPEP 2112.01 Regarding claim 19, Lee teaches the first crystalline region (region of first material region with (111) crystal pane) has a (111) crystal plane, and the second crystalline region (region of first material region with (200) crystal pane) has a (200) crystal plane. Regarding claim 20, Lee teaches one or more materials of the first material region (Fig 1 electrode pattern 113a, [0034]) includes at least one of TiN (TiN, [0039]) ,, CrN, NbN, HfN, or ZrN, and one or more materials of the second material region (Fig 1 barrier layer 115a, [0034]) includes at least one of Al, Si (TiSiN, [0037]) , or B . Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et. al. (US 20190333985 A1), hereinafter Lee, in view of Sato et. al (US 20040222493 A1), hereinafter Sato . Regarding claim 5, Lee teaches the first material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) . Lee fails to teach materials in the second material region are 20 at % or less. However, Sato teaches the material from a second material layer goes into grooves between grains in the first material layer ([0024]) . Further, Sato teaches the grain size affects the capacitor performance ([0024]) . The thickness of the first material region and subsequent amount of material going into the first material layer as a result-effective variable is therefore a result-effective variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness of the first material region as Sato has identified the thickness of the first material region and subsequent amount of material going into the first material layer as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at materials in the second material region are 20 at % or less in the first material layer, in order to achieve the desired balance between the thickness of the first material region and grain size of the first material region, as taught by Sato. MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed at% is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed percentages). Regarding claim 14, Lee teaches a material layer (Fig 1 electrode pattern 113a and barrier layer 115a, [0039]) including the first material region (Fig 1 electrode pattern 113a, [0034]) and the second material region (Fig 1 barrier layer 115a, [0034]) . Lee fails to teach materials of the second material region are about 20 at % or less. However, Sato teaches the material from a second material layer goes into grooves between grains in the first material layer ([0024]) . Further, Sato teaches the grain size affects the capacitor performance ([0024]) . The thickness of the first material region and subsequent amount of material going into the first material layer as a result-effective variable is therefore a result-effective variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness of the first material region as Sato has identified the thickness of the first material region and subsequent amount of material going into the first material layer as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at materials in the second material region are 20 at % or less in the first material layer, in order to achieve the desired balance between the thickness of the first material region and grain size of the first material region, as taught by Sato. MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the claimed at% is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed percentages) . Conclusion 07-96 AIA The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Lee et.al. (US 20210265458 A1) teaches an interfacial film between a bottom electrode and a dielectric layer that can have Al, Si, or B, in addition to the film that is taught above. The Examiner has pointed out particular references contained in the prior art of record within the body of this action for the convenience of the Applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALVIN L LEE whose telephone number is (703)756-1921. The examiner can normally be reached Monday - Friday 8:30 am - 5 pm (ET). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN GAUTHIER can be reached at (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ALVIN L LEE/Examiner, Art Unit 2813 /STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813 Application/Control Number: 18/394,884 Page 2 Art Unit: 2813 Application/Control Number: 18/394,884 Page 3 Art Unit: 2813 Application/Control Number: 18/394,884 Page 4 Art Unit: 2813 Application/Control Number: 18/394,884 Page 5 Art Unit: 2813 Application/Control Number: 18/394,884 Page 6 Art Unit: 2813 Application/Control Number: 18/394,884 Page 7 Art Unit: 2813 Application/Control Number: 18/394,884 Page 8 Art Unit: 2813 Application/Control Number: 18/394,884 Page 9 Art Unit: 2813 Application/Control Number: 18/394,884 Page 10 Art Unit: 2813 Application/Control Number: 18/394,884 Page 11 Art Unit: 2813 Application/Control Number: 18/394,884 Page 12 Art Unit: 2813 Application/Control Number: 18/394,884 Page 13 Art Unit: 2813 Application/Control Number: 18/394,884 Page 14 Art Unit: 2813 Application/Control Number: 18/394,884 Page 15 Art Unit: 2813
Read full office action

Prosecution Timeline

Dec 22, 2023
Application Filed
Jun 15, 2026
Non-Final Rejection mailed — §102, §103, §112
Jul 14, 2026
Interview Requested

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12684954
DISPLAY APPARATUS
3y 7m to grant Granted Jul 14, 2026
Patent 12666819
Display Module and Display Device
3y 3m to grant Granted Jun 23, 2026
Patent 12666822
DISPLAY DEVICE
3y 5m to grant Granted Jun 23, 2026
Patent 12641951
LIGHT-EMITTING ELEMENT AND DISPLAY DEVICE
3y 3m to grant Granted May 26, 2026
Patent 12635363
Organic Light Emitting Display Apparatus
3y 4m to grant Granted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
98%
With Interview (+8.4%)
3y 2m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 74 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month