DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Species A1 and Species B1, claims 1-16, represented by figures 4 and 7 in the reply filed on May 4, 2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Therefore, claims 17-20 are withdrawn from consideration.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on May 13, 2026 and December 26, 2023 were considered by the examiner.
Drawing Objections
The numerous drawings have not been checked to the extent necessary to determine the presence of all possible errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the drawings.
Specification Objections
The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 12-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Togashi (US 2017/0148838 A1) (“Togashi”).
Regarding claim 12, Togashi teaches at least in figure 7:
An image sensor including (defined below)
a pixel section (defined below),
wherein the pixel section includes (defined below):
an active region (defined below) in the pixel section (defined below),
the active region including (defined below)
a first impurity region (40) and a second impurity region (41); and
a gate pattern (38/39) on the active region (the active region only includes the first impurity region and the second impurity region and 38/39 is on, or above, 40/41),
the gate pattern having a first surface and a second surface that are opposite to each other (38/39 has a left and right side),
wherein the gate pattern (38/39) is between the first impurity region (40) and the second impurity region (41),
wherein the first surface is close to the first impurity region and extends linearly (the the side of 38/39 closest to 40), and
wherein an area of the first impurity region is less than an area of the second impurity region (this is a matter of degree. It is obvious that 40 can be less than 41 as the claim not state how much less it needs to be. Therefore, it can be one atom less which is well within process tolerances).
Regarding claim 13, Uchida teaches at least in figure 7:
wherein the second surface is close to the second impurity region (the side of 38/39 closes to 41),
the second impurity region including a first sub-surface, a second sub-surface, and a third sub-surface, the second impurity region further including a first corner where the first sub-surface and the second sub-surface meet each other and a second corner where the first sub-surface and the third sub-surface meet each other (there is no patentable distinction between all these sub-surfaces. Therefore, Examiner can arbitrarily dissect the second impurity region 41 to create all of these claimed features.)
Examiner note: If Applicant wishes Examiner to not arbitrarily dissect the prior arts second impurity region Applicant will need to claim the structure more clearly, and direct Examiner to the figure and element numbers which contain the features of this limitation.
Regarding claim 14, Uchida teaches at least in figure 7:
wherein the second impurity region (41) includes (detailed below):
a first edge region that extends in a first direction; and a second edge region that extends in a second direction that intersects the first direction (It is obvious that 41 is shown as a 2D representation of a 3D structure. Therefore, it is obvious that device in the 3D environment will have these claimed features).
Regarding claim 15, Uchida teaches at least in figure 7:
a first active contact (unlabled the via connecting to 40) on the first impurity region (40); and
a second active contact (unlabled the via connecting to 41) on the second impurity region (41),
wherein the second active contact is on the first edge region or the second edge region (the unlabled via connected to 41 can be considered to be contacting the first edge or second edge region).
Regarding claim 16, Uchida teaches at least in figure 7:
wherein the second active contact (the unlabled via connected to 41) is on a central portion of the second impurity region (41).
Allowable Subject Matter
Claims 1-11 are allowed.
The following is an examiner’s statement of reasons for allowance: see below.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Regarding claim 1, Oh teaches at least in figure 3:
a substrate (10) that includes a pixel section (PX); and
a separation pattern (200) disposed in the substrate (10),
the separation pattern (200) surrounding the pixel section (figure 5),
wherein the separation pattern (200) includes (detailed below):
a first sub-separation pattern that extends in a first direction parallel to an upper surface of the substrate; and a second sub-separation pattern that extends in a second direction that intersects the first direction and is parallel to the upper surface of the substrate (figure 5 in conjunction with figure 3 show that 200 has a first sub-separation pattern and a second sub-separation pattern in the manner claimed),
wherein the pixel section (PX) includes (detailed below):
a device isolation pattern (240) that defines an active region in the pixel section (¶ 0066); and
at least one gate pattern (GEP) on the active region (GEP is on the active region in the same manner disclosed by applicant in their figure 7),
Oh does not expressly teach:
wherein the at least one gate pattern extends along a third direction (diagonal) from the first sub-separation pattern through the active region and the device isolation pattern to the second sub-separation pattern,
the third direction (diagonal) intersecting the first direction and the second direction and parallel to the upper surface of the substrate,
wherein the at least one gate pattern has a first surface and a second surface that are opposite to each other,
wherein the first surface extends linearly from the first sub-separation pattern to the second sub-separation pattern.
Further, Oh does not teach how GEP in figure 5 is connected to the cross-section shown in figure 3.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VINCENT WALL whose telephone number is (571)272-9567. The examiner can normally be reached Monday to Thursday at 7:30am to 2:30pm PST. Interviews can be scheduled on Tuesday thru Thursday at 10am PST or 2pm PST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Manno can be reached at 571-272-2339. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VINCENT WALL/ Primary Examiner, Art Unit 2898
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