Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Title
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. (see MPEP § 606.01).
This may result in slightly longer titles, but the loss in brevity of title will be more than offset by the gain in its informative value in indexing, classifying, searching, etc.
The following title is suggested:
“Semiconductor device with Exposed Insulated Substrate and Multi-Tiered Lead Frame”
Claim Objections
Claim 7 is objected to because of the following informalities: the “a first direction” should be “[[a]] first direction” because ‘a first direction’ is recited in the claim 1.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-16 and 18 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention.
Regarding claim 1, the “one part of which” in line 5 and 9 and “the other part of which” in line 7 and 10 are unclear because it us insure what the “one part” and “the other part” indicate. Therefore, the ambiguity of the limitations makes the claim indefinite.
For the purpose of examining the instant application, the limitation has been construed to mean that it refers to “a drain connection lead comprising a plurality of parts, one of the parts of the drain connection lead forming a junction extending along a first direction or a second direction perpendicular to the first direction on the lower surface of the insulated substrate, and one of remaining the parts of the drain connection lead forming a terminal that can be connected to an external device; and
a source connection lead comprising a plurality of parts, one of the parts of source connection lead forming an electrical connection with the semiconductor chip through a connection, and one of the remaining parts of source connection lead forming a terminal that can be connected to an external device”.
Examiner recommends amending the limitations as “a drain connection lead comprising a plurality of parts, wherein first part of the plurality of parts of the drain connection lead forming a junction extending along a first direction or a second direction perpendicular to the first direction on the lower surface of the insulated substrate, and second part of the plurality of parts of the drain connection lead forming a terminal that can be connected to an external device; and
a source connection lead comprising a plurality of parts, wherein first partof the plurality of parts of source connection lead forming an electrical connection with the semiconductor chip through a connection, and second part of the plurality of parts of source connection lead forming a terminal that can be connected to an external device”
Regarding claim 8, the “at least one of the inner frame” is unclear because the " inner frame" was introduced as a single element earlier in the claim. Therefore, there is insufficient antecedent basis for this limitation in the claim.
For the purpose of examining the instant application and also disclosed in [0044] of SPEC, the limitation has been construed to mean that it refers to “the inner frame comprising a plurality of parts, at least one the parts of the inner frame”.
Examiner recommends amending the limitations as “the inner frame comprising a plurality of parts, wherein at least one of the plurality of parts of the inner frame”.
Regarding claim 9, the “at least one of the inner frame” is unclear because the " inner frame" was introduced as a single element earlier in the claim. Therefore, there is insufficient antecedent basis for this limitation in the claim.
For the purpose of examining the instant application and also disclosed in [0044] of SPEC, the limitation has been construed to mean that it refers to “the inner frame comprising a plurality of parts, at least one the parts of the inner frame”.
Examiner recommends amending the limitations as “the inner frame comprising a plurality of parts, wherein at least one of the plurality of parts of the inner frame”.
Regarding claim 12, the claim recites the limitation “at least one of the middle frame extends from the other” in line(s) 8. It is unclear what "at least one” and “the other” indicate because the “middle frame" was introduced as a single element earlier in the claim. Therefore, there is insufficient antecedent basis for this limitation in the claim.
For the purpose of examination based the [0044] of the SPEC, the limitation is interpreted as “the middle frame comprising a plurality of parts, at least one of parts of the middle frame extends from one of remaining the parts of middle frame along a first direction”.
Thus, the examiner recommends amending the limitation to “the middle frame comprising first part and second part, wherein the first part of the middle frame extends from the second part of the middle frame along a first direction”.
Regarding claims 13-16, because of their dependency on claim 12, these claims are also rejected for the reasons set forth above with respect to claim 12.
Regarding claim 18, the “at least one of the inner frame” and “at least another one of the inner frame” are unclear because the "inner frame" was introduced as a single element earlier in the claim. Therefore, there is insufficient antecedent basis for this limitation in the claim.
For the purpose of examining the instant application and also disclosed in [0044] of SPEC, the limitation has been construed to mean that it refers to “the inner frame comprising a plurality of parts, at least one of the parts of the inner frame, at least one of remaining the parts of the inner frame”.
Examiner recommends amending the limitations as “the inner frame comprising a plurality of parts, wherein first part of the plurality of parts of the inner frame is formed to be perpendicular to the outer frame, and
second part of the plurality of parts of the inner frame is formed to be parallel to the outer frame”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102 (a)(1) and (a)(2) as being anticipated by Sasaki (US 20200381327).
Regarding claim 1. Fig 5 (perspective view) and Fig 2 (a lateral portion view of the Fig 5) of Sasaki disclose A semiconductor device 1 comprising:
an insulated substrate 10 [0041] whose upper surface (Note that “upper" and "lower" are considered relative or positional terms. They are not interpreted as absolute, fixed locations unless the specification or claims define them as such. Thus, in the Fig 2, when viewed from the position of the label 30 to label 15, the bottommost surface of label 10 is upper surface, which is exposed to outside) is exposed to an outside of a molding portion 30 ([0046]: insulating resin) (Fig 2);
a semiconductor chip 20 [0044] formed on a lower surface (the opposite surface of the upper surface) of the insulated substrate (Fig 2/Fig 5);
a drain connection lead 42 (Fig 2, [0043]/[0047]: 21 is drain electrode and connected to the lead 42 via 2), one part 41 of which forming a junction (Fig 2: between 41c and 13) extending along a first direction (horizontal) or a second direction perpendicular to the first direction on the lower surface of the insulated substrate (Fig 2), and the other part 40 of which forming a terminal (the exposed part of 42) that can be connected to an external device (Fig 2, [0059]); and
a source connection lead 52 (Fig 2, [0043]: 22 is source electrode and connected to the lead 52 via 12), one part 51 of which forming an electrical connection (Fig 2: via 12) with the semiconductor chip through a connection (Fig 2), and the other part 52 of which forming a terminal (the exposed part of 50) that can be connected to an external device (Fig 2, [0051]).
Regarding claim 2. Sasaki discloses The semiconductor device of claim 1, wherein:
an upper surface (the surface of 20 covered by 30) of the semiconductor device is insulated from the drain connection lead (Fig 2: via 30).
Regarding claim 3. Sasaki discloses The semiconductor device of claim 1, wherein:
the insulated substrate includes:
an upper metal layer 15 [0042], a lower metal layer 12/13 [0045], and an insulated layer 11 ([0041]: ‘insulating’ thermally conductive base material) disposed between the upper metal layer and the lower metal layer (Fig 2),
an upper surface (Fig 2: the exposed surface of 15) of the upper metal layer is exposed to an outside of the molding portion (Fig 2), and
a lower surface (Fig 2: the surface of 13 facing 20) of the lower metal layer forms a junction with the drain connection lead (Fig 2: via 2 and 40).
Regarding claim 4. Sasaki discloses The semiconductor device of claim 1, wherein:
the junction of the drain connection lead formed on a lower surface (Fig 2: the surface of 10 facing 20) of the insulated substrate has,
a shape that extends parallel to a direction in which the other part of the drain connection lead extends (Fig 2: refer to 41c and 41d which shows horizontally parallel), or extends in a direction perpendicular to the direction in which the other part of the drain connection lead extends.
Regarding claim 5. Sasaki discloses The semiconductor device of claim 1, wherein:
an upper surface of the drain connection lead includes (Fig 5: the upper surface of 40M),
a plurality of upper surfaces respectively corresponding to a first height (from 10, the upper surface between 41a and 41M, which shows the biggest height among them), a second height (from 10, the upper surface of 41d) lower than the first height, and a third height (from 10, the upper surface of 41c) lower than the second height (Fig 5).
Regarding claim 6. Sasaki discloses The semiconductor device of claim 1, wherein:
the drain connection lead includes a plurality of frames (Fig 5),
the plurality of frames include,
an outer frame 42 connected to an external device [0059];
an inner frame 41a/41c/41e (including the portion vertically protruded from 41a) connected to the insulated substrate; and
a middle frame 41M/41d (including the portion vertically protruded from the portion between 41M and 41d, which contacting the inner frame) formed between the outer frame and the inner frame (Fig 5).
Regarding claim 7. Sasaki discloses The semiconductor device of claim 6, wherein:
the outer frame is formed to extend along a first direction (Fig 5: horizontal), and
the outer frame is formed to have a height difference from the middle frame (Fig 5: due to the portion of the middle frame in the vertically protruded portion from the portion between 41M and 41d).
Regarding claim 8. Sasaki discloses The semiconductor device of claim 7, wherein:
at least one (41e or the vertical portion from 41a) of the inner frame is formed to be perpendicular to the outer frame (Fig 5: 41e is vertically extending whereas the 42 horizontally extending).
Regarding claim 9. Sasaki discloses The semiconductor device of claim 7, wherein:
at least one (41a) of the inner frame is formed to be parallel to the outer frame (Fig 5: 41a and 42 are horizontally extending, thus being parallel).
Regarding claim 10. Sasaki discloses The semiconductor device of claim 7, wherein:
the inner frame is formed integrally with the middle frame (Fig 5).
Regarding claim 11. Sasaki discloses The semiconductor device of claim 7, wherein:
a portion of the middle frame is formed to have a height difference from the inner frame (Fig 5: due to the vertically protruded portion from 41a of the inner frame).
Regarding claim 12. Fig 5 (perspective view) and Fig 2 (a lateral portion view of the Fig 5) of Sasaki disclose A semiconductor device 1 comprising:
an insulated substrate 10 [0041] whose upper surface (Note that “upper" and "lower" are considered relative or positional terms. They are not interpreted as absolute, fixed locations unless the specification or claims define them as such. Thus, in the Fig 2, when viewed from the position of the label 30 to label 15, the bottommost surface of label 10 is upper surface, which is exposed to outside) is exposed to an outside of a molding portion 30 [0046] (Fig 2);
a semiconductor chip 20 formed on a lower surface (the opposite surface of the upper surface) of the insulated substrate (Fig 2/Fig 5);
an outer frame 42 connected to an external device [0059];
an inner frame 41a/41c/41e (including the portion vertically protruded from 41a) connected to the insulated substrate (Fig 2/Fig 5); and
a middle frame 41M/41d (including the part that protrudes vertically between 41M and 41d, contacting the inner frame and forming an 'L' shape) formed between the outer frame and the inner frame (Fig 5),
wherein at least one (41M) of the middle frame extends from the other (41d) along a first direction (horizontal portion), and then extends along a second direction (vertical) perpendicular to the first direction and is connected to the inner frame (Fig 5: the ‘L’ shape of the middle frame).
Regarding claim 13. Sasaki discloses The semiconductor device of claim 12, wherein:
the inner frame is formed to be perpendicular to the outer frame (Fig 5: the portion vertically protruded from 41a, which is formed to be perpendicular to the horizontally extended outer frame 42).
Regarding claim 14. Sasaki discloses The semiconductor device of claim 12, wherein:
at least one of the middle frame is formed to be spaced apart from a lower surface of the insulated substrate (Fig 5: 41M and 41d are spaced apart from 10).
Regarding claim 15. Sasaki discloses The semiconductor device of claim 12, wherein:
an upper surface of the semiconductor device is insulated from the inner frame (Fig 5: the inner frame partially covers a surface of 20 facing 30, and the uncovered surface is covered by 30. Thus, being insulated).
Regarding claim 16. Sasaki discloses The semiconductor device of claim 12, further comprising:
a source connection lead 52 (Fig 2, [0043]: 22 is source electrode and connected to the lead 52 via 12), one part 51 of which forming an electrical connection with the semiconductor chip through a connection 12, and the other part 52 of which forming a terminal that can be connected to an external device (Fig 2).
Regarding claim 17. Fig 5 (perspective view) and Fig 2 (a lateral portion view of the Fig 5) of Sasaki disclose A semiconductor device 1 comprising:
an insulated substrate 10 whose upper surface (Note that “upper" and "lower" are considered relative or positional terms. They are not interpreted as absolute, fixed locations unless the specification or claims define them as such. Thus, in the Fig 2, when viewed from the position of the label 30 to label 15, the bottommost surface of label 10 is upper surface, which is exposed to outside);
a semiconductor chip 20 formed on a lower surface (the opposite surface of the upper surface) of the insulated substrate (Fig 2/Fig 5);
an outer frame 42 connected to an external device [0073];
an inner frame 41a (including the portion vertically protruded from 41a) connected to the insulated substrate (Fig 2/Fig 5); and
a middle frame 41c/41e/41M/41d formed between the outer frame and the inner frame (Fig 5),
wherein at least a portion 41c of at least one of the middle frame forms a junction with a lower surface of the insulated substrate (Fig 2: refer to 41c and 13).
Regarding claim 18. Sasaki discloses The semiconductor device of claim 17, wherein:
at least one of the inner frame is formed to be perpendicular to the outer frame (Fig 5: the portion vertically protruded from 41a is formed to be perpendicular to horizontally extended the outer frame 42), and
at least another one of the inner frame is formed to be parallel to the outer frame (Fig 5: both the top flat portion of inner portion and 42 horizontally extending. Thus being parallel).
Regarding claim 19. Sasaki discloses The semiconductor device of claim 17, further comprising:
a source connection lead 52 (Fig 2, [0043]: 22 is source electrode and connected to the lead 52 via 12), one part 51 of which forming an electrical connection with the semiconductor chip through a connection (Fig 2), and the other part 52 of which forming a terminal that can be connected to an external device (Fig 5).
Regarding claim 20. Sasaki discloses The semiconductor device of claim 17, wherein:
an upper surface of the semiconductor device is insulated from the inner frame (Fig 5: the unexposed surface and covered by 30).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Changhyun Yi whose telephone number is (571)270-7799. The examiner can normally be reached Monday-Friday: 8A-4P.
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/Changhyun Yi/Primary Examiner, Art Unit 2812