Prosecution Insights
Last updated: April 19, 2026
Application No. 18/396,088

DISPLAY PANELS AND MANUFACTURING METHODS THEREOF

Non-Final OA §102§103
Filed
Dec 26, 2023
Examiner
LEE, WOO KYUNG
Art Unit
2815
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Guangzhou China Star Optoelectronics Semiconductor Display Technology Co. Ltd.
OA Round
1 (Non-Final)
80%
Grant Probability
Favorable
1-2
OA Rounds
3y 4m
To Grant
98%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allow Rate
132 granted / 166 resolved
+11.5% vs TC avg
Strong +18% interview lift
Without
With
+18.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
38 currently pending
Career history
204
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
47.6%
+7.6% vs TC avg
§102
24.2%
-15.8% vs TC avg
§112
28.1%
-11.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 166 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant's election without traverse of Group I and Species C of Fig. 5, claims 1 and 4-15, in the reply filed on March 16, 2026 is acknowledged. Therefore, claims 1 and 4-15 are presented for examination. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1 and 15 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Chae et al. (US 2013/0056724, hereinafter Chae). Regarding claim 1, Chae discloses for a display panel, comprising that a substrate (substrate 100, Fig. 8B); a first device layer (layer having gate electrode 101, Fig. 8B) disposed on the substrate (100, Fig. 8B) and comprising a gate (gate electrode 101, Fig. 8B); a second device layer (layer having channel layer 114 and pixel electrode 109, Fig. 8B, channel layer 114 is labeled in Fig. 4) disposed on a side of the first device layer (layer having 101, Fig. 8B) away from the substrate (above substrate 100, Fig. 4), because both the channel layer 114 and the pixel electrode 109 are disposed directly on the gate insulation layer 112, therefore, both the channel layer 114 and pixel electrode 109 are included within the same layer, wherein the second device layer comprises an active part (channel layer 114, Fig. 8B) and a pixel electrode (pixel electrode 109, Fig. 8B) disposed on a side of the gate (101, Fig. 8B) away from the substrate (above 100, Fig. 8B); and a third device layer (layer having source electrode 115a, Fig. 8B) disposed on a side of the second device layer (layer having 114/109, Fig. 8B) away from the first device layer (above the gate electrode 101, Fig. 8B), wherein the third device layer comprises a source (source electrode 115a, Fig. 8B) disposed on a side of the active part (left side of the channel layer 114, Fig. 4) away from the gate (101, Fig. 8B), and the source (115a, Fig. 8B) is connected to the active part (114, Fig. 8B); wherein the display panel (Fig. 8A) further comprises a drain (drain electrode 115b, Fig. 8B), and the drain (115b, Fig. 8B) is electrically connected to the pixel electrode (109, Fig. 8B) and the active part (114, Fig. 8B). Regarding claim 15, Chae further discloses for the display panel of claim 1 that the active part (114, Fig. 8B) comprises an oxide semiconductor, because “the channel layer 114 can be prepared by forming an oxide layer on the entire surface of the substrate 100 provided with the gate insulation layer 102 and patterning the oxide layer” (emphasis added, [0065]] and Chae further discloses that “the oxide can be formed from an amorphous oxide which includes at least one of indium In, zinc Zn, gallium Ga, hafnium Hf and so on. For example, when an oxide semiconductor of Ga-In-Zn-O is formed through a sputtering process…” (emphasis added, [0066]), and the pixel electrode (109, Fig. 8B) comprises an oxide conductor, because “the pixel electrode 109 can be prepared by forming a transparent conductive material layer, such as indium-tin-oxide ITO, indium-zinc-oxide IZO and indium-tin-zinc-oxide ITZO” ([0067]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 11 and 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over by Chae et al. (US 2013/0056724, hereinafter Chae) in view of Kim et al. (KR 20140113157, hereinafter Kim). Regarding claim 11, Chae further discloses for the display panel of claim 1 that the third device layer (layer having source electrode 115a, Fig. 8B) further comprises a data line (data line 113, Fig. 8B) connected to the source (115a, Fig. 8B), and the display panel further comprises an (organic) insulation layer (passivation layer 119 of a SiO2-based material, Fig. 8B, [0060]) at least covering a surface of the source (115a, Fig. 8B) and the data line (113, Fig. 8B) away from the substrate (above substrate 100, Fig. 8B). Chae does not explicitly disclose an organic insulation layer. However, Kim discloses for an organic light emitting diode (OLED) display that the display panel includes the barrier rib 115e (or partition wall 115e) is disposed on a top surface of the source electrode 122a and the data line 117 over the substrate 110 (Fig. 8h), and Kim further discloses “the barrier rib 115e may also be made of a photoresist containing a black pigment…” ([0074], page 6, line 33, see attached machine-translated copy); since it is well-known in the semiconductor manufacturing art that a photoresist is made of organic materials, therefore, the barrier rib 115e by Kim corresponds to the organic insulation layer in the claimed invention; therefore, Kim teaches the use of a photoresist containing a black pigment as an alternative for forming a passivation layer in a display panel and one of ordinary skill in the semiconductor display art would have recognized that the passivation layer of Chae could be formed of a photoresist containing a black pigment taught by Kim. Since both Chae and Kim teach a display panel, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the passivation layer of Chae to include an organic material, as disclosed by Kim, in order to optimize desirable dielectric and optical properties of the passivation layer and improve the overall performance of the display panel. Regarding claim 13, Chae further discloses that an orthographic projection of the source (115a, Fig. 8B) on the substrate (100, Fig. 8B) and an orthographic projection of the data line (113, Fig. 8B) on the substrate (100, Fig. 8B) both overlap an orthographic projection of the common electrode (common line 126/common electrode 125, Fig. 8B) on the substrate (100, Fig. 8B), because “the common electrode 125 and the common line 126 are formed on the passivation layer 119 and in a single body united with each other” (emphasis added, [0054]) and the common line 126 vertically overlaps the source electrode 115 and the data line 113 (Fig. 8B), and the (organic) insulation layer (119, Fig. 8B) is disposed between the common electrode (126, Fig. 8B) and the data line (113, Fig. 8B), and between the common electrode (126, Fig. 8B) and the source (115a, Fig. 8B). Chae does not explicitly disclose an organic insulation layer. However, Kim discloses for an organic light emitting diode (OLED) display that the display panel includes the barrier rib 115e (or partition wall 115e) is disposed on a surface of the source electrode 122a and the data line 117 over the substrate 110 (Fig. 8h), and Kim further discloses “the barrier rib 115e may also be made of a photoresist containing a black pigment…” ([0074], page 6, line 33, see attached machine-translated copy); since it is well-known in the semiconductor manufacturing art that a photoresist is made of organic materials, therefore, the barrier rib 115e by Kim corresponds to the organic insulation layer in the claimed invention; therefore, Kim teaches the use of a photoresist containing a black pigment as an alternative for forming a passivation layer in a display panel and one of ordinary skill in the semiconductor display art would have recognized that the passivation layer of Chae could be formed of a photoresist containing a black pigment taught by Kim. Since both Chae and Kim teach a display panel, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the passivation layer of Chae to include an organic material, as disclosed by Kim, in order to optimize desirable dielectric and optical properties of the passivation layer and improve the overall performance of the display panel. Regarding claim 14, Kim further discloses that a material of the organic insulation layer is black photoresist, because “the barrier rib 115e may also be made of a photoresist containing a black pigment…” (emphasis added, [0074], page 6, line 33, see attached machine-translated copy). Allowable Subject Matter Claims 4-10 and 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims, because the prior arts cited in this Office Action do not teach the claimed limitation, “one end of the connection electrode is connected to the drain, and another end of the connection electrode is connected to the pixel electrode” of claim 4 and the claimed limitation, “an orthographic projection of the organic insulation layer on the substrate is located within an orthographic projection of the source and the data line on the substrate” of claim 12. Claims 5-10 depend on claim 4. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to WOO K LEE whose telephone number is (571)270-5816. The examiner can normally be reached Monday - Friday, 8:30 am - 5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JOSHUA BENITEZ can be reached at 571-270-1435. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /WOO K LEE/Examiner, Art Unit 2815
Read full office action

Prosecution Timeline

Dec 26, 2023
Application Filed
Mar 30, 2026
Non-Final Rejection — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
80%
Grant Probability
98%
With Interview (+18.4%)
3y 4m
Median Time to Grant
Low
PTA Risk
Based on 166 resolved cases by this examiner. Grant probability derived from career allow rate.

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