Prosecution Insights
Last updated: May 29, 2026
Application No. 18/396,224

SEMICONDUCTOR DEVICE

Non-Final OA §102§103
Filed
Dec 26, 2023
Priority
Feb 07, 2023 — JP 2023-016798
Examiner
BOULGHASSOUL, YOUNES
Art Unit
2814
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co. Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
451 granted / 511 resolved
+20.3% vs TC avg
Moderate +7% lift
Without
With
+7.3%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
23 currently pending
Career history
542
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
61.8%
+21.8% vs TC avg
§102
17.4%
-22.6% vs TC avg
§112
16.6%
-23.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 511 resolved cases

Office Action

§102 §103
Attorney’s Docket Number: 2663.1034 Filing Date: 12/26/2023 Claimed Foreign Priority Date: 02/07/2023 (JP2023-016798) Applicants: Saito et al. Examiner: Younes Boulghassoul DETAILED ACTION This Office action responds to the Application filed on 12/26/2023. Remarks The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The application serial no. 18/396,224 filed on 12/26/2023 has been entered. Accordingly, pending in this Office action are claims 1-7. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2 and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kuraishi et al. (US585971). Regarding Claim 1, Kuraishi (see, e.g., Figs. 2A-B and Figs. 8,10, or 13) shows all aspects of the instant invention, including a semiconductor device comprising: - a semiconductor element (e.g., semiconductor chip 24) - a terminal (e.g., conductive pattern comprising inner lead 18 and outer lead 20) to which a wire (e.g., bonding-wire 18b) is coupled - a housing (e.g., rectangular/frame-shaped solder resist 22) surrounding the semiconductor element and a coupling portion of the terminal, the coupling portion of the terminal being coupled to the wire (e.g., end portion of 18 coupled to 18b) - an encapsulant (e.g., sealing resin 26) sealing an internal space surrounded by the housing - wherein the terminal includes a recess-shaped or protrusion-shaped coupling region (e.g., recessed coupling region of 18) including the coupling portion coupled to the wire. Regarding Claim 2, Kuraishi (see, e.g., Figs. 2A-B and Figs. 8,10, or 13) shows: - wherein the terminal further includes: an embedded portion embedded in the housing (see, e.g., Figs. 2A-B: “middle” portion of conductive pattern 18,20 coated by 22 in such a manner that the gaps between adjacent leads are filled with the resist) a protrusion (see, e.g., Figs. 2A-B: “inner” portion of conductive pattern 18,20 exposed from 22) that is continuous with the embedded portion, the protrusion extending within the internal space - wherein the protrusion includes the recess-shaped or protrusion-shaped coupling region. Regarding Claim 4, Kuraishi (see, e.g., Figs. 2A-B and Figs. 8,10, or 13) shows that the recess-shaped or protrusion-shaped coupling region is continuous with an end of the terminal. Claims 1-4 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Aoki et al. (US2019/0103329). Regarding Claim 1, Aoki (see, e.g., Figs. 1-5) shows all aspects of the instant invention, including a semiconductor device (e.g., semiconductor apparatus 100) comprising: - a semiconductor element (e.g., semiconductor device 3) - a terminal (e.g., insert terminal 6 comprising external terminal portion 7 and internal terminal portion 8) to which a wire (e.g., bonding wire 9) is coupled - a housing (e.g., case 5) surrounding the semiconductor element and a coupling portion of the terminal, the coupling portion of the terminal being coupled to the wire (e.g., end portion of 8 coupled to 9) - an encapsulant sealing an internal space surrounded by the housing (see, e.g., Par. [0021],[0035]: the interior of semiconductor apparatus 100, having a side face constructed of the terminal insert case 5 and a bottom surface constructed of the integrated substrate 1, is sealed with a sealing material (not shown) which is an insulator) - wherein the terminal includes a recess-shaped or protrusion-shaped coupling region (see, e.g., Figs. 2, 4-5: portion of 8 exposed from 5 having lower recessed or protrusions) including the coupling portion coupled to the wire. Regarding Claim 2, Aoki (see, e.g., Figs. 1-5) shows: - wherein the terminal further includes: an embedded portion embedded in the housing (e.g., fixed portion 7a embedded in 5) a protrusion (e.g., internal terminal portion 8) that is continuous with the embedded portion, the protrusion extending within the internal space - wherein the protrusion includes the recess-shaped or protrusion-shaped coupling region. Regarding Claim 3, Aoki (see, e.g., Fig. 3 and Par. [0029]-[0030]) shows that the housing (e.g., 5) is an insert molded component in which a portion of the terminal (e.g., 6) is embedded. Regarding Claim 4, Aoki (see, e.g., Figs. 1-5) shows that the recess-shaped or protrusion-shaped coupling region is continuous with an end of the terminal. Regarding Claim 7, Aoki (see, e.g., Figs. 4A-B or 5A-B) shows that: - wherein the recess-shaped or protrusion-shaped coupling region is connected to a surface of the terminal via a stepped surface (see, e.g., Figs. 4B or 5B) - wherein an angle between the stepped surface and the surface of the terminal is an acute angle (see, e.g., Par. [0041] or [0044]: 30°≤α<90° or 30°≤β<90°) Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim 3 is rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Kuraishi et al. (US585971). Regarding Claim 3, Kuraishi (see, e.g., Figs. 2A-B and Figs. 8,10, or 13) shows that the housing (e.g., 22) is a component in which a portion of the terminal (e.g., “middle” portion of 18,20) is embedded. Additionally, regarding the language referring to the process by which the housing is formed, i.e., insert molded component, it has been held by the Court that the patentability of a product does not depend on its method of production. “If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” In re Thorpe, 777 F.2d 695, 698, 227 USPQ 964, 966 (Fed. Cir. 1985). Note that the applicant has a burden of proof once the examiner establishes a sound basis for believing that the products of the applicant and the prior art are the same. See In re Spada, 911 F.2d 705, 709, 15 USPQ2d 1655, 1658 (Fed, Cir. 1990). In the instant case, Kuraishi (see, e.g., Col. 5, L. 33-41) discloses that solder resist 22 is coated in a rectangular or frame shape on the leads in such a manner that the gaps between adjacent leads are filled with the resist, thus embedding the leads therein. Therefore, since the final housing structure is substantially identical to the analogous structure being claimed, a prima facie case of anticipation or obviousness has been established. Accordingly, Kuraishi also shows, or in the alternative, teaches that the housing is an insert molded component in which a portion of the terminal is embedded. Claims 1-6 are rejected under 35 U.S.C. 103 as obvious Inoue (US2020/0205292) in view of Abbott et al. (US2014/0367838). Regarding Claim 1, Inoue (see, e.g., Figs. 1 and 3) shows most aspects of the instant invention, including a semiconductor device (e.g., power conversion device 1) comprising: - a semiconductor element (e.g., semiconductor element 3) - a terminal (e.g., lead terminal 15 comprising terminal part 15a and lead part 15b) to which a wire (e.g., wiring member W2) is coupled - a housing (e.g., case 11) surrounding the semiconductor element and a coupling portion of the terminal, the coupling portion of the terminal being coupled to the wire (e.g., end portion of 15a coupled to W2) - an encapsulant sealing an internal space surrounded by the housing (e.g., sealing resin 16) - wherein the terminal includes a coupling region (see, e.g., Fig. 1,3: portion of 15a exposed from 11) including the coupling portion coupled to the wire. However, Inoue is silent about the coupling region being recess-shaped or protrusion-shaped. Abbott, (see, e.g., Figs. 6-9 and Par. [0021]-[0022],[0026]) on the other hand and in the same field of endeavor, teaches that reducing the lead tip thickness helps overcome the problem of stitch bond failure due to the relative movement of the encapsulating layer with respect to a lead and bond wire, which can cause a break in the bond wire or a broken stitch bond. Accordingly, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to have the terminal includes a recess-shaped coupling region in the structure of Inoue, as taught by Abbott, to helps overcome the problem of stitch bond failure due to the relative movement of the encapsulating layer with respect to a lead and bond wire. Therefore, Inoue in view of Abbott teaches that the terminal includes a recess-shaped or protrusion-shaped coupling region including the coupling portion coupled to the wire. Regarding Claim 2, Inoue (see, e.g., Figs. 1 and 3) shows: - wherein the terminal further includes: an embedded portion embedded in the housing (e.g., lower portion of 15b embedded in 11) a protrusion (e.g., exposed portion of 15a) that is continuous with the embedded portion, the protrusion extending within the internal space Furthermore, Abbott (see, e.g., Figs. 6-9 and Par. [0021]-[0022],[0026]) teaches reducing the lead tip thickness so as to define a recess-shaped coupling region. Regarding Claim 3, Inoue (see, e.g., Fig. 1 and Par. [0028]) shows that the housing (e.g., 11) is an insert molded component in which a portion of the terminal is embedded. Regarding Claim 4, Inoue (see, e.g., Figs. 1 and 3) shows the coupling region is continuous with an end of the terminal. Furthermore, Abbott (see, e.g., Figs. 6-9 and Par. [0021]-[0022],[0026]) teaches reducing the lead tip thickness so as to define a recess-shaped coupling region. Regarding Claim 5, Inoue (see, e.g., Figs. 1 and 3) shows that the housing is cylinder-shaped (see, e.g., Par. [0028]: The side wall 11a of the case 11 may include an annular bottom wall part 12 that surrounds the outer peripheral side of the insulated circuit board 2). Additionally, Abbott (see, e.g., Fig. 9) teaches that the recess-shaped coupling region (e.g., coined portion 130) has a rounded-rectangular shape in plan view. Accordingly, Inoue in view of Abbott teaches that the recess-shaped or protrusion-shaped coupling region has a rounded-rectangular shape in plan view in a direction of an axis of the housing. Regarding Claim 6, Abbott, (see, e.g., Figs. 6-9 and Par. [0021]-[0022],[0026]) teaches forming a coined portion 130 at the end of the lead tip, such that a difference between a level of the recess-shaped coupling region and a level of a top surface of the lead is at least 50% of the lead thickness, to overcome the problem of stitch bond failure. Therefore, Abbott clearly recognizes the difference between a level of the recess-shaped coupling region and a level of a surface of the terminal as a result effective variable. Accordingly, the particular difference between a level of the recess-shaped coupling region and a level of a surface of the terminal claimed by the applicant, i.e., corresponding to a diameter of the wire, is only considered to be the “optimum” level difference disclosed by Inoue in view of Abbott that a person having ordinary skill in the art would have been able to obtain using routine experimentation based, among other things, on bond wire current drive requirements, mechanical strain imparted by the encapsulating layer on the bond wire, etc. (see In re Boesch, 205 USPQ 215 (CCPA 1980)), and since neither non-obvious nor unexpected results, i.e., results which are different in kind and not in degree from the results of the prior art, will be obtained as long as lead tips have a recess-shaped coupling region to mitigate the issue of stitch bond failure, as already suggested by Abbott. Therefore, Inoue in view of Abbott also teaches that a difference between a level of the recess-shaped or protrusion-shaped coupling region and a level of a surface of the terminal corresponds to a diameter of the wire. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The additional references cited disclose power devices with wire-bonded connections to terminals embedded in a surrounding device housing, and having some features similar to the instant inventions. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Younes Boulghassoul at (571) 270-5514. The examiner can normally be reached on Monday-Friday 9am-6pm EST (Eastern Standard Time), or by e-mail via younes.boulghassoul@uspto.gov. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Wael Fahmy can be reached at (571) 272-1705. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YOUNES BOULGHASSOUL/Primary Examiner, Art Unit 2814
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Prosecution Timeline

Dec 26, 2023
Application Filed
Apr 06, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
96%
With Interview (+7.3%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 511 resolved cases by this examiner. Grant probability derived from career allowance rate.

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