DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-5, 9, 15-16 and 20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 4, 9, 15 and 20 recites “higher” is unclear if higher is higher in value or higher in structural position. Examiner interpret it to mean structural position.
Claims 3, 5 and 16 recites “a thickness” is unclear and indefinite as to thickness of what because a thickness of an atom is smaller than a thickness of an interconnect, for example. As such the claims are unclear and indefinite.
Claims 3, 5-6 and 16 recites “substantially” which is a relative term which renders the claim indefinite, and it is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. As such the claims are unclear and indefinite.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. 20220157690.
Regarding claim 1, fig. 5 of Lee discloses an electronic device, comprising:
a first interconnect (middle 116);
a second interconnect (left 116), wherein a lower portion of the first interconnect is laterally spaced apart from a lower portion of the second interconnect by an air gap 402; and
an insulating layer 114, disposed laterally between an upper portion of the first interconnect and an upper portion of the second interconnect.
Regarding claim 2, fig. 5 of Lee discloses wherein a top dimension (top half dimension) of the first interconnect is less than a bottom dimension (full bottom dimension) of the first interconnect.
Regarding claim 3, fig. 5 of Lee discloses wherein a top surface of the insulating layer 114 and a top surface of the first interconnect 116 are substantially coplanar, and a thickness of the insulating layer is thinner than a thickness of the first interconnect (see thickness of 114 above 402 is less than total thickness of 116).
Regarding claim 4, fig. 5 of Lee discloses wherein a thermal conductivity of the insulating layer is higher (in position) than a thermal conductivity of the first interconnect and the second interconnect, and the insulating layer is thermally coupled to the first interconnect and the second interconnect (see fig. 5 configuration).
Regarding claim 5, it is necessary the case that Lee discloses wherein a multiplication of a thickness (thickness of zero which is thickness) and the thermal conductivity of the insulating layer is substantially equal to or greater than a multiplication of a thickness (thickness of zero) and the thermal conductivity of each of the first interconnect (0 = 0).
Regarding claim 6, fig. 5 of Lee discloses wherein the first interconnect and the second interconnect are substantially identical in thickness.
Regarding claim 7, fig. 5 of Lee discloses further comprising: an insulating sustaining layer 502, extending from a sidewall of the upper portion of the first interconnect to a sidewall of the upper portion of the second interconnect.
Regarding claim 8, fig. 5 of Lee discloses further comprising: a dielectric capping layer 118, extending from a sidewall of the first interconnect to a sidewall of the second interconnect, wherein the air gap is enclosed by a portion of the insulating sustaining layer and a portion of the dielectric capping layer.
Regarding claim 9, fig. 5 of Lee discloses wherein a thermal conductivity of the dielectric capping layer is higher (in position) than a thermal conductivity of the first interconnect and the second interconnect, and the dielectric capping layer is thermal coupled to the first interconnect, the insulating layer and the second interconnect.
Regarding claim 10, fig. 5 of Lee discloses further comprising: an active device 504, wherein the first interconnect is electrically connected and thermal coupled to the active device.
Regarding claim 11, fig. 5 of Lee discloses wherein the first interconnect and the active device are structurally overlapped.
Regarding claim 12, fig. 5 of Lee discloses wherein the second interconnect is electrically insulated from the first interconnect.
Regarding claim 13, fig. 5 of Lee discloses wherein the second interconnect is a dummy pattern (as it is not connected to an active device which makes it a dummy).
Regarding claim 14, fig. 5 of Lee discloses an electronic device, comprising:
a substrate 102; an interconnect 116, disposed on the substrate;
a first insulating layer (layer portion of 114 below 402), disposed on the substrate; and
a second insulating layer (layer portion of 114 above 402 and 118 combination), disposed over the first insulating layer and surrounding the interconnect;
wherein a portion of the first insulating layer is vertically spaced apart from a portion of the second insulating layer by an air gap 402.
Regarding claim 15, fig. 5 of Lee discloses wherein a thermal conductivity of the second insulating layer is higher (in position) than a thermal conductivity of the interconnect, and the second insulating layer is thermal coupled to the interconnect.
Regarding claim 16, Lee discloses wherein a multiplication of a thickness (thickness of zero) and the thermal conductivity of the second insulating layer is substantially equal to or greater than a multiplication of a thickness (thickness of zero) and the thermal conductivity of the interconnect.
Regarding claim 17, fig. 5 of Lee discloses further comprising: an active device 504, disposed on the substrate, wherein the interconnect is electrically connected and thermal coupled to the active device, and the interconnect and the active device are structurally overlapped.
Regarding claim 18, Lee discloses a method, comprising:
providing a structure including a substrate 102 and at least one conductive layer 1102 disposed on the substrate (fig. 11);
patterning the conductive layer to form interconnects and at least one trench laterally between the interconnects (fig. 12);
forming a sacrificial layer 1502 (fig. 15) in the at least one trench;
forming a first insulating layer 604/1502 covering the at least one trench (fig. 17); and
performing a removal process to remove at least a portion of the sacrificial layer and to form an air gap 402 (fig. 18).
Regarding claim 19, Lee discloses wherein the first insulating layer comprises an insulating sustaining layer 604 disposed on the interconnects and the sacrificial layer 1502, the method further comprising: forming a second insulating layer 118 (fig. 21) disposed on the first insulating layer and laterally between the interconnects.
Regarding claim 20, fig. 17 of wherein a thermal conductivity of the first insulating layer is higher (in position) than a thermal conductivity of the interconnects.
Conclusion
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/VONGSAVANH SENGDARA/ Primary Examiner, Art Unit 2893
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