Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Amendment filed on 6/10/26 has been entered.
Response to Arguments
Applicant's arguments have been fully considered but are not persuasive.
Applicant amended independent claims 1, 6, and 11 by incorporating the limitations previously recited in dependent claims 4, 9, and 12, respectively. In view of the amendments and Applicant's arguments, the Office construes the amended independent claims as requiring the organic active layer to include both n-type and p-type materials. Consequently, the scope of the previously rejected independent claims, as well as the claims depending therefrom, has changed, requiring reconsideration of patentability under the amended claim scope. Accordingly, Applicant's amendment necessitated revision of the grounds of rejection set forth in this Office action. See MPEP § 706.07(a).
To the extent Applicant's arguments are directed to whether Dollinger teaches an organic active layer formed using both n-type and p-type materials, such arguments are moot because the present rejection additionally relies upon Gao et al. for this limitation. The remaining arguments are addressed below.
Applicant argues that Chung fails to disclose a photosensitive layer because Chung is directed to a light-emitting device.
This argument is not persuasive. The rejection does not rely upon Chung merely because it is a light-emitting device, but because Chung discloses a layer (160) that absorbs photons to generate excitons (electron-hole pairs), as described in paragraph [0075]. The claim does not require the photosensitive layer to operate exclusively as a photodetector, nor does it exclude a layer that is capable of both absorbing light and participating in electroluminescent operation. Accordingly, Chung teaches or at least suggests the claimed photosensitive layer.
Applicant argues that there is no motivation to combine Chung and Dollinger.
This argument is not persuasive. The rejection does not rely upon the references for their overall intended purposes, but for their respective teachings. Chung is relied upon for the charge transport layers and photosensitive layer, while Dollinger is relied upon for the permeable base electrode structure including the pinholes, surrounding metal oxide layer, organic active layer, and third electrode. Gao is additionally relied upon for forming the organic active layer using both p-type and n-type polymer semiconductor materials. One of ordinary skill in the art would have been motivated to combine these known teachings to improve transistor performance, including reduced leakage current, improved charge transport, and enhanced charge separation, which are recognized advantages taught by the cited references. The combination therefore represents the predictable use of known elements according to their established functions.
Applicant argues that the cited references fail to disclose the claimed layer arrangement.
This argument is not persuasive. The rejection does not rely upon either Chung or Dollinger alone to disclose the complete claimed arrangement. Rather, the rejection relies upon the combined teachings of Chung, Dollinger, and Gao. Chung provides the lower charge transport layer, photosensitive layer, and upper charge transport layer. Dollinger provides the permeable base electrode, pinholes, surrounding metal oxide layer, organic active layer disposed on the second electrode layer, and third electrode. Gao further teaches forming the organic active layer using both p-type and n-type polymer semiconductor materials. The rejection therefore relies upon the collective teachings of the references, and the proposed combination would have resulted in the claimed layer arrangement through the predictable combination of known elements for their intended purposes.
Claim Objections
Claims 3, 5, 8, 10, 13, and 15 are objected to because they contain typographical and formatting errors. Appropriate correction is required in any subsequent amendment. This objection is held in abeyance because the claims are otherwise rejected. Correction of these informalities will be required if and when the application is otherwise in condition for allowance.
Specifically, claims 3, 8, and 13 contain typographical errors in the chemical formulas (e.g., "Y203" should read "Y₂O₃," "A1203" should read "Al₂O₃," "Fe203" should read "Fe₂O₃," and "Cr203" should read "Cr₂O₃").
Claims 5, 10, and 15 contain formatting errors in the recitation of scientific notation (e.g., "1 × 101" should read "1 × 10¹," "1 × 107" should read "1 × 10⁷," "6 × 103" should read "6 × 10³," "1 × 1016" should read "1 × 10¹⁶," "1 × 10-4" should read "1 × 10⁻⁴," and "3.51 × 10-1" should read "3.51 × 10⁻¹"). The chemical formulas and scientific notation should be corrected to conform to the notation as originally disclosed.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp.
Examiner conducted a comprehensive analysis of obviousness analysis including the Graham v. Deere analysis for each claim by (A) determining the scope and content of a reference claim relative to the claim in the application at issue; (B) determining the differences between the scope and content of the reference claim as determined in (A) and the claim in the application at issue; (C) determining the level of ordinary skill in the pertinent art; and (D) evaluation any objective indicia of nonobviousness.
The examiner has concluded that there is issue of double patenting rejection in the current application. This is because the claims in this application are deemed to be patentably does not distinct from any claims in a potential double patenting reference. Moreover, the examined application's claim is either anticipated or obvious over the reference claim(s).
Claims 1-3, 6-8, 11 and 13-14 are rejected on the ground of nonstatutory double patenting as being unpatentable over U.S. Patent No. 10879476 (hereinafter Pat-76) in view of Chung (US 20160155970), and further in view of Gao et al., ‘Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse’, (ACS Photonics, Vol. 8, pp. 3094-3103, 2021).
Regarding claim 1. The claim 1 of Pat-76 discloses the claim 1. But, the claim 1 of the Pat-76 does not explicitly recite a lower charge transport layer, a photosensitive layer, and an upper charge transport layer.
However, Fig 1 of Chung discloses a vertical organic transistor device. Specifically, Chung teaches a sequence of functional layers comprising a lower charge transport layer (150) formed on a first electrode layer (140), a photosensitive layer (160, [0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) formed on the lower charge transport layer, and an upper charge transport layer (170) formed on the photosensitive layer.
Thus, it would have been obvious to a person of ordinary skill in the art at the time of the invention to incorporate the specific trilayer stack taught by Chung into the vertical transistor structure claimed in the Pat-76. One of ordinary skill would seek to include the Chung’s the lower and upper charge transport layers (150, 170) to reduce the energy barrier between the electrodes and the active photosensitive layer, thereby improving the overall current density and efficiency of the device. And, the use of a photosensitive layer (160) sandwiched between charge transport layers is a well-known and predictable configuration in the field of organic optoelectronics. Integrating these layers into the structure of the Pat-76 provides a known way to achieve light-sensing capabilities within a vertical transistor geometry.
Therefore, because the addition of these layers represents the application of a known configuration to a known device to yield predictable results, the subject matter of the present claim 1 is a patentably indistinct variation of the invention claimed in Pat-76.
But, Claim 1 of Pat-76 in view of Chung does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials."
However, Gao et al., Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse (ACS Photonics, Vol. 8, pp. 3094-3103, 2021), teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials.
Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the vertical organic transistor of Pat-76, as modified by Chung, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n semiconductor bulk heterojunction because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely applies a known organic semiconductor material system to the vertical organic transistor of Pat-76, as modified by Chung, according to its established function to achieve its recognized advantages.
Accordingly, the subject matter of claim 1 is a patentably indistinct variation of the invention claimed in Pat-76. Therefore, claim 1 is rejected on the ground of nonstatutory obviousness-type double patenting.
Regarding claim 2. The claim 1 of Pat-76 in view of Chung and Gao discloses the claim 1. Chung further discloses the claim 2, wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Regarding claim 3. The claims 1-2 of Pat-76 in view of Chung and Gao discloses the claim 3.
Regarding claim 6. The claim 1 of Pat-76 discloses the claim 6. Although the claim 6 recites the method, the claim 6 merely recites a known structural arrangement using simple forming steps that provide no patentably distinct difference over the Pat-76.
But, the claim 1 of the Pat-76 does not explicitly recite a lower charge transport layer, a photosensitive layer, and an upper charge transport layer formed in a specific vertical stack.
However, Chung discloses a method of forming vertical organic transistor device. Specifically, Fig 1 of Chung teaches a sequence of functional layers comprising a lower charge transport layer (150), a photosensitive layer (160, [0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) formed on the lower charge transport layer, and an upper charge transport layer (170) formed on the photosensitive layer.
Thus, it would have been obvious to a person of ordinary skill in the art at the time of the invention to incorporate the specific trilayer stack taught by Chung into the vertical transistor structure claimed in the Pat-76. One of ordinary skill would seek to include the Chung’s the lower and upper charge transport layers (150, 170) to reduce the energy barrier between the electrodes and the active photosensitive layer, thereby improving the overall current density and efficiency of the device. And, the use of a photosensitive layer (160) sandwiched between charge transport layers is a well-known and predictable configuration in the field of organic optoelectronics. Integrating these layers into the structure of the Pat-76 provides a known way to achieve light-sensing capabilities within a vertical transistor geometry.
Therefore, because the addition of these layers represents the application of a known configuration to a known method of forming the device to yield predictable results, the subject matter of the present claim 6 is a patentably indistinct variation of the invention claimed in Pat-76.
But, claim 1 of Pat-76 in view of Chung does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials."
However, Gao et al., Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse (ACS Photonics, Vol. 8, pp. 3094-3103, 2021), teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials. Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the method of manufacturing the vertical organic transistor of Pat-76, as modified by Chung, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n semiconductor bulk heterojunction because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely applies a known organic semiconductor material system to the method of manufacturing the vertical organic transistor of Pat-76, as modified by Chung, according to its established function to achieve its recognized advantages.
Accordingly, the subject matter of claim 6 is a patentably indistinct variation of the invention claimed in Pat-76. Therefore, claim 6 is rejected on the ground of nonstatutory obviousness-type double patenting.
Regarding claim 7. The claim 1 of Pat-76 in view of Chung and Gao discloses the claim 6. Chung further discloses the claim 7, wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Regarding claim 8. The claims 1-2 of Pat-76 in view of Chung and Gao discloses the claim 8.
Regarding claim 11. The claim 1 of Pat-76 discloses the claim 1. But, the claim 1 of the Pat-76 does not explicitly recite a lower charge transport layer, a photosensitive layer, and an upper charge transport layer.
However, Fig 1 of Chung discloses a vertical organic transistor device. Specifically, Chung teaches a sequence of functional layers comprising a lower charge transport layer (150), a photosensitive layer (160, [0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) formed on the lower charge transport layer, and an upper charge transport layer (170) formed on the photosensitive layer.
Thus, it would have been obvious to a person of ordinary skill in the art at the time of the invention to incorporate the specific trilayer stack taught by Chung into the vertical transistor structure claimed in the Pat-76. One of ordinary skill would seek to include the Chung’s the lower and upper charge transport layers (150, 170) to reduce the energy barrier between the electrodes and the active photosensitive layer, thereby improving the overall current density and efficiency of the device. And, the use of a photosensitive layer (160) sandwiched between charge transport layers is a well-known and predictable configuration in the field of organic optoelectronics. Integrating these layers into the structure of the Pat-76 provides a known way to achieve light-sensing capabilities within a vertical transistor geometry.
Therefore, because the addition of these layers represents the application of a known configuration to a known device to yield predictable results, the subject matter of the present claim 11 is a patentably indistinct variation of the invention claimed in Pat-76.
But, Claim 1 of Pat-76 in view of Chung does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials."
However, Gao et al., Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse (ACS Photonics, Vol. 8, pp. 3094-3103, 2021), teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials.
Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer.
Therefore, it would have been obvious to one of ordinary skill in the art at the time the invention was made to modify the vertical organic transistor of Pat-76, as modified by Chung, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n semiconductor bulk heterojunction because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely applies a known organic semiconductor material system to the vertical organic transistor of Pat-76, as modified by Chung, according to its established function to achieve its recognized advantages.
Accordingly, the subject matter of claim 11 is a patentably indistinct variation of the invention claimed in Pat-76. Therefore, claim 11 is rejected on the ground of nonstatutory obviousness-type double patenting.
Regarding claim 13. The claims 1-2 of Pat-76 in view of Chung and Gao discloses the claim 13.
Regarding claim 14. The claims 1-2 of Pat-76 in view of Chung and Gao discloses the claim 11. Chung further discloses the claim 14, wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6-8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Chung (US 20160155970) in view of Dollinger (“Vertical Organic Thin-Film Transistors with an Anodized Permeable Base for Very Low Leakage Current”, Applied Material, Vol 31, Pages 1-5, 03/18/2019), and further in view of Gao (“Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse”, ACS Photonics, Vol 8(10), Pages 3094-3103, 10/06/2021).
Regarding claim 1. Fig 1 of Chung discloses A vertical organic transistor [0031] comprising:
a substrate 110;
a first electrode layer 140 formed on the substrate;
a lower charge transport layer 150 formed on the first electrode layer;
a photosensitive layer 160 ([0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) formed on the lower charge transport layer;
an upper charge transport layer 170 formed on the photosensitive layer;
a second electrode layer 180 including a base electrode ([0071]: formed of conductive material (e.g., ITO)) formed on the upper charge transport layer.
But Chung does not disclose a plurality of pinholes formed in the base electrode and configured to provide a movement path of charges, and
a metal oxide layer surrounding a surface of the base electrode and the pinholes;
an organic active layer formed on the second electrode layer; and
a third electrode layer formed on the organic active layer.
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However, Figure 1 (refer to the attached Figure 1) of Dollinger discloses a plurality of pinholes (Pinholes) formed in the base electrode (Al(Base)) and configured to provide a movement path of charges (col 2, line 22-24 in page 1), and
a metal oxide layer (Anodized AlOx) surrounding a surface of the base electrode and the pinholes;
an organic active layer (Top C60) formed on the second electrode layer; and
a third electrode layer (Al (Emitter)) formed on the organic active layer.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the Chung’s device to have the Dollinger’s structure to minimize leakage current and improve the on/off ratio of the transistor while maintaining high charge permeability through the base, as taught by Dollinger (Abstract; Page 1).
But, Chung in view of Dollinger does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials."
However, Gao teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials (page 3096).
Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer (page 3100).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the vertical organic transistor of Chung, as modified by Dollinger, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n bulk heterojunction semiconductor layer because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely substitutes one known organic semiconductor material system for another to obtain its recognized advantages and represents the predictable use of prior-art elements according to their established functions.
Accordingly, it would have been obvious to modify the vertical organic transistor of Chung, as modified by Dollinger, to employ the known p/n semiconductor bulk heterojunction disclosed by Gao, thereby arriving at the claimed invention.
Regarding claim 2. Chung in view of Dollinger and Gao discloses The vertical organic transistor of claim 1, Chung discloses wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Regarding claim 3. Chung in view of Dollinger and Gao discloses The vertical organic transistor of claim 1, Dollinger discloses wherein the metal oxide layer includes at least one selected from the group consisting of yttrium oxide (Y2O3), aluminum oxide (Al2O3, AlOx, or AlxOy) (Figure 1, “AlOx”), magnesium oxide (MgOx), zinc oxide (ZnO), tin oxide (SnO), iron oxide (Fe2O3 or FeOx), titanium oxide (TiOx), zirconium oxide (ZrO2), chromium oxide (Cr2O3), hafnium oxide (HfO), beryllium oxide (BeO), tungsten oxide (WOx), copper oxide (CuOx), silicone oxide (SiOx), and nickel oxide (NiOx) (x and y are rational numbers between 1 and 3).
Regarding claim 5. Chung in view of Dollinger and Gao discloses The vertical organic transistor of claim 1. But Chung in view of Dollinger does not explicitly disclose wherein sensitivity of the vertical organic transistor including the photosensitive layer is in a range of 1×101 to 1×107, responsivity thereof is in a range of 1×101 to 6×103 A/W, detectivity thereof is in a range of 1×101 to 1×1016 Jonse, mobility thereof is in a range of 1×10−4 to 3.51×10−1 cm2/Vs, and a cutoff frequency is in a range of 100 Hz to 3 GHz.
However, the claimed ranges for sensitivity and responsivity are recognized in the art as being primarily dependent on the selection of the organic semiconductor materials and the thickness of the photosensitive layer (160). Chung explicitly teaches that layer 160 generates excitons from photons [0075]. And for the mobility range, Dollinger teaches the use of an organic active layer (e.g., C60). It is well-known in the art of organic electronics that carrier mobility is an essential property of the chosen semiconductor and its deposition quality. Selecting a material to achieve a mobility within the claimed range is a matter of routine selection of known high-performance organic semiconductors. Furthermore, the cut-off frequency of a vertical transistor is inversely proportional to the transit time of carriers across the channel. In a vertical architecture, this is defined by the nanoscale thickness of the organic layers. Dollinger and Chung both teach nanoscale vertical stacks; therefore, a cut-off frequency within the claimed range is an essential physical result of the vertical geometry already disclosed.
Therefore, the claimed ranges for these parameters represent the optimization of result-effective variables. It is well-settled that where the general conditions of a claim are disclosed in the prior art, it is within the skill of the ordinary artisan to select the particular range of a variable that yields the best results. (See In re Aller, 220 F.2d 454; In re Applied Materials, Inc., 692 F.3d 1289).
One of ordinary skill in the art, seeking to achieve "Very Low Leakage Current" while maintaining high switching speeds as taught by Dollinger, would have found it obvious to experiment with the thickness of the metal oxide layer and the choice of organic active layer to reach the optimized performance ranges recited in the claims. The differences between the claimed invention and the prior art are limited to numerical ranges for parameters that the prior art identifies as critical to device performance. In the absence of evidence showing unexpected results (i.e., that the claimed ranges produce a performance improvement that is different in kind, rather than merely in degree, from the prior art), these ranges are considered obvious to one of ordinary skill.
Further, it is further noted that the specification contains no disclosure of either the critical nature of instant claimed ranges. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Regarding claim 6. Fig 1 of Chung discloses A method of manufacturing a vertical organic transistor ([0031]: Chung discloses a plurality of part/layers of the vertical-type organic light-emitting transistor 100 are sequentially formed on a substrate. Thus, Chung discloses method of manufacturing a vertical organic transistor), comprising:
providing a substrate 110;
forming a first electrode layer 140 on the substrate;
forming a lower charge transport layer 150 on the first electrode layer;
forming a photosensitive layer 160 ([0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) on the lower charge transport layer;
forming an upper charge transport layer 170 on the photosensitive layer;
forming a second electrode layer 180 including a base electrode ([0071]: formed of conductive material (e.g., ITO)).
But Chung does not disclose a plurality of pinholes formed in the base electrode and configured to provide a movement path of charges, and a metal oxide layer surrounding a surface of the base electrode and the pinholes on the upper charge transport layer;
forming an organic active layer on the second electrode layer; and
forming a third electrode layer on the organic active layer.
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However, Figure 1 (refer to the attached Figure 1) of Dollinger discloses a plurality of pinholes (Pinholes) formed in the base electrode (Al(Base)) and configured to provide a movement path of charges (col 2, line 22-24 in page 1), and
a metal oxide layer (Anodized AlOx) surrounding a surface of the base electrode and the pinholes;
an organic active layer (Top C60) formed on the second electrode layer; and
a third electrode layer (Al (Emitter)) formed on the organic active layer.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the Chung’s device to have the Dollinger’s structure to minimize leakage current and improve the on/off ratio of the transistor while maintaining high charge permeability through the base, as taught by Dollinger (Abstract; Page 1).
But, Chung in view of Dollinger does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials."
However, Gao teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials (page 3096).
Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer (page 3100).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of manufacturing the vertical organic transistor of Chung, as modified by Dollinger, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n bulk heterojunction semiconductor layer because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely substitutes one known organic semiconductor material system for another to obtain its recognized advantages and represents the predictable use of prior-art elements according to their established functions.
Accordingly, it would have been obvious to modify the method of manufacturing the vertical organic transistor of Chung, as modified by Dollinger, to form the organic active layer using the known p/n semiconductor bulk heterojunction disclosed by Gao, thereby arriving at the claimed invention.
Regarding claim 7. Chung in view of Dollinger and Gao discloses The method of claim 6, Chung discloses wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Regarding claim 8. Chung in view of Dollinger and Gao discloses The method of claim 6, Dollinger discloses wherein the metal oxide layer includes at least one selected from the group consisting of yttrium oxide (Y2O3), aluminum oxide (Al2O3, AlOx, or AlxOy) (Figure 1, “AlOx”), magnesium oxide (MgOx), zinc oxide (ZnO), tin oxide (SnO), iron oxide (Fe2O3 or FeOx), titanium oxide (TiOx), zirconium oxide (ZrO2), chromium oxide (Cr2O3), hafnium oxide (HfO), beryllium oxide (BeO), tungsten oxide (WOx), copper oxide (CuOx), silicone oxide (SiOx), and nickel oxide (NiOx) (x and y are rational numbers between 1 and 3).
Regarding claim 10. Chung in view of Dollinger and Gao discloses The method of claim 6. But Chung in view of Dollinger does not explicitly disclose wherein sensitivity of the vertical organic transistor including the photosensitive layer is in a range of 1×101 to 1×107, responsivity thereof is in a range of 1×101 to 6×103 A/W, detectivity thereof is in a range of 1×101 to 1×1016 Jonse, mobility thereof is in a range of 1×10−4 to 3.51×10−1 cm2/Vs, and a cutoff frequency is in a range of 100 Hz to 3 GHz.
However, the claimed ranges for sensitivity and responsivity are recognized in the art as being primarily dependent on the selection of the organic semiconductor materials and the thickness of the photosensitive layer (160). Chung explicitly teaches that layer 160 generates excitons from photons [0075]. And for the mobility range, Dollinger teaches the use of an organic active layer (e.g., C60). It is well-known in the art of organic electronics that carrier mobility is an essential property of the chosen semiconductor and its deposition quality. Selecting a material to achieve a mobility within the claimed range is a matter of routine selection of known high-performance organic semiconductors. Furthermore, the cut-off frequency of a vertical transistor is inversely proportional to the transit time of carriers across the channel. In a vertical architecture, this is defined by the nanoscale thickness of the organic layers. Dollinger and Chung both teach nanoscale vertical stacks; therefore, a cut-off frequency within the claimed range is an essential physical result of the vertical geometry already disclosed.
Therefore, the claimed ranges for these parameters represent the optimization of result-effective variables. It is well-settled that where the general conditions of a claim are disclosed in the prior art, it is within the skill of the ordinary artisan to select the particular range of a variable that yields the best results. (See In re Aller, 220 F.2d 454; In re Applied Materials, Inc., 692 F.3d 1289).
One of ordinary skill in the art, seeking to achieve "Very Low Leakage Current" while maintaining high switching speeds as taught by Dollinger, would have found it obvious to experiment with the thickness of the metal oxide layer and the choice of organic active layer to reach the optimized performance ranges recited in the claims. The differences between the claimed invention and the prior art are limited to numerical ranges for parameters that the prior art identifies as critical to device performance. In the absence of evidence showing unexpected results (i.e., that the claimed ranges produce a performance improvement that is different in kind, rather than merely in degree, from the prior art), these ranges are considered obvious to one of ordinary skill.
Further, it is further noted that the specification contains no disclosure of either the critical nature of instant claimed ranges. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Claims 11 and 13-15 are rejected under 35 U.S.C. 103 as being unpatentable over in Dollinger (“Vertical Organic Thin-Film Transistors with an Anodized Permeable Base for Very Low Leakage Current”, Applied Material, Vol 31, Pages 1-5, 03/18/2019) in view of Chung (US 20160155970), and further in view of Gao et al., ‘Heterostructured Vertical Organic Transistor for High-Performance Optoelectronic Memory and Artificial Synapse’, ACS Photonics, Vol. 8(10), pp. 3094-3103, 2021).
Regarding claim 11. Figure 1 (refer to the attached annotated Figure 1) of Dollinger discloses A vertical organic transistor comprising:
a substrate (Glass);
a first electrode layer (Collector: Cr/Au) formed on the substrate;
an organic active layer (Bottom C60) formed on the first electrode layer;
a second electrode layer (Al Base) including a base electrode including a base electrode formed on the organic active layer, a plurality of pinholes formed in the base electrode and configured to provide a movement path of charges (col 2, line 22-24 in page 1), and a metal oxide layer (Anodized AlOx) surrounding a surface of the base electrode and the pinholes;
a lower charge transport layer (n-C60) formed on the second electrode layer (Dollinger discloses Top C60 and n-C60 stacked with electrodes and pinholes in the base electrode to enable vertical charge transport; The n-C60 layer is typically placed near one of the electrodes to improve injection/transport, acting analogously to a transport layer);
a third electrode layer (Emitter).
But Dollinger does not disclose a photosensitive layer formed on the lower charge transport layer;
an upper charge transport layer formed on the photosensitive layer; and
a third electrode layer formed on the upper charge transport layer.
However, Fig 1 of Chung discloses a photosensitive layer 160 ([0075]: this layer absorbs photons (light) to generate excitons (electron-hole pairs). Thus, being a photosensitive layer) formed on the lower charge transport layer 150;
an upper charge transport layer 170 formed on the photosensitive layer; and
a third electrode layer formed on the upper charge transport layer (a second/top electrode layer).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the Dollinger’s structure to incorporate the photosensitive layer, upper charge transport layer, and third electrode taught by Chung, as such a combination would provide predictable vertical charge transport and improved device characteristics, including reduced power consumption characteristics [0006].
But, Dollinger in view of Chung does not expressly teach or suggest the limitation that "the organic active layer may be formed by using n-type and p-type high-molecular materials or n-type and p-type low-molecular materials”.
However, Gao teaches a heterostructured vertical organic transistor employing a p/n semiconductor bulk heterojunction as the semiconductor layer.
Specifically, Gao teaches that the semiconductor layer comprises a blend of PDVT-10, a p-type polymer semiconductor, and N2200, an n-type polymer semiconductor, which are mixed together and employed as the semiconductor layer, thereby forming an organic active layer including both p-type and n-type polymer semiconductor materials (page 3096).
Gao further teaches forming the organic active layer by mixing the p-type semiconductor solution with the n-type semiconductor solution, followed by spin-coating and annealing to form the transistor active layer (page 3100).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the vertical organic transistor of Dollinger, as modified by Chung, by forming the organic active layer using both p-type and n-type polymer semiconductor materials as taught by Gao. One of ordinary skill in the art would have been motivated to employ Gao's p/n bulk heterojunction semiconductor layer because Gao teaches that the p/n heterointerface promotes charge separation, enhances charge trapping, and improves transistor performance. Such a modification merely substitutes one known organic semiconductor material system for another to obtain its recognized advantages and represents the predictable use of prior-art elements according to their established functions.
Accordingly, it would have been obvious to modify the vertical organic transistor of Dollinger, as modified by Chung, to employ the known p/n semiconductor bulk heterojunction disclosed by Gao, thereby arriving at the claimed invention.
Regarding claim 13. Dollinger in view Chung and Gao discloses The vertical organic transistor of claim 11, Dollinger discloses wherein the metal oxide layer includes at least one selected from the group consisting of yttrium oxide (Y2O3), aluminum oxide (Al2O3, AlOx, or AlxOy) (Figure 1, “AlOx”), magnesium oxide (MgOx), zinc oxide (ZnO), tin oxide (SnO), iron oxide (Fe2O3 or FeOx), titanium oxide (TiOx), zirconium oxide (ZrO2), chromium oxide (Cr2O3), hafnium oxide (HfO), beryllium oxide (BeO), tungsten oxide (WOx), copper oxide (CuOx), silicone oxide (SiOx), and nickel oxide (NiOx) (x and y are rational numbers between 1 and 3).
Regarding claim 14. Dollinger in view Chung and Gao discloses The vertical organic transistor of claim 11, Chung discloses wherein the photosensitive layer includes organic low-molecular and high-molecular donor materials, organic low-molecular and high-molecular acceptor materials, organic-inorganic hybrid perovskite materials, quantum dot materials [0055], or 2-dimensional (2D) semiconductor materials.
Regarding claim 15. Dollinger in view Chung and Gao discloses The vertical organic transistor of claim 11. But Dollinger in view of Chung does not explicitly disclose wherein sensitivity of the vertical organic transistor including the photosensitive layer is in a range of 1×101 to 1×107, responsivity thereof is in a range of 1×101 to 6×103 A/W, detectivity thereof is in a range of 1×101 to 1×1016 Jones, mobility thereof is in a range of 1×10−4 to 3.51×10−1 cm2/Vs, and a cutoff frequency is in a range of 100 Hz to 3 GHz.
However, the claimed ranges for sensitivity and responsivity are recognized in the art as being primarily dependent on the selection of the organic semiconductor materials and the thickness of the photosensitive layer (160). Chung explicitly teaches that layer 160 generates excitons from photons [0075]. And for the mobility range, Dollinger teaches the use of an organic active layer (e.g., C60). It is well-known in the art of organic electronics that carrier mobility is an essential property of the chosen semiconductor and its deposition quality. Selecting a material to achieve a mobility within the claimed range is a matter of routine selection of known high-performance organic semiconductors. Furthermore, the cut-off frequency of a vertical transistor is inversely proportional to the transit time of carriers across the channel. In a vertical architecture, this is defined by the nanoscale thickness of the organic layers. Dollinger and Chung both teach nanoscale vertical stacks; therefore, a cut-off frequency within the claimed range is an essential physical result of the vertical geometry already disclosed.
Therefore, the claimed ranges for these parameters represent the optimization of result-effective variables. It is well-settled that where the general conditions of a claim are disclosed in the prior art, it is within the skill of the ordinary artisan to select the particular range of a variable that yields the best results. (See In re Aller, 220 F.2d 454; In re Applied Materials, Inc., 692 F.3d 1289).
One of ordinary skill in the art, seeking to achieve "Very Low Leakage Current" while maintaining high switching speeds as taught by Dollinger, would have found it obvious to experiment with the thickness of the metal oxide layer and the choice of organic active layer to reach the optimized performance ranges recited in the claims. The differences between the claimed invention and the prior art are limited to numerical ranges for parameters that the prior art identifies as critical to device performance. In the absence of evidence showing unexpected results (i.e., that the claimed ranges produce a performance improvement that is different in kind, rather than merely in degree, from the prior art), these ranges are considered obvious to one of ordinary skill.
Further, it is further noted that the specification contains no disclosure of either the critical nature of instant claimed ranges. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
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/Changhyun Yi/Primary Examiner, Art Unit 2812
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