Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Specification
Number of figures submitted does not match the number of figures listed under Brief Description of Drawings in the specification. All of the figures with alphabets should be listed separately. For example, ‘Figs. 1A-1C’ should be ‘Figs. 1A, 1B and 1C’.
In particular, ‘FIGs. 1A-1C’ in the paragraph [0007], ‘FIGs. 2A-2D’ and ‘FIGs. 5A-C’ through FIGs 11A-11C’ in the paragraph [0011] are objected.
See MPEP 500 - Receipt and Handling of Mail and Papers, MPEP 507 - Drawing Review in the Office of Patent Application Processing (OPAP). This labeling convention ensures clarity and consistency in referencing figures throughout the patent application and publication. Improper labeling may result in an objection from OPAP and require correction.
Appropriate correction is required.
Claim Objections
Claim 1 is objected to because of the following informalities:
In line 3: the “a different second III-N material layer” in line 3 should be “a different from the first III-N material layer”. Because the following claims recite “the second III-N material layer”.
In line 4: the “top surface” should be “a top surface”.
In line 8-9: the “a different second lateral direction” should be ‘a different from the first lateral direction”. Because the following claims recite “the second lateral direction”.
Claim 8 is objected to because of the following informalities: the “the gate drive portion” in line 8 should be “the unmetalized gate drive portion”.
Claim 9 is objected to because of the following informalities: the “the gate drive portion” in line 2 should be “the unmetalized gate drive portion”.
Claim 10 is objected to because of the following informalities: the “the gate drive portion” in line 1 should be “the unmetalized gate drive portion”.
Claim 11 is objected to because of the following informalities: the “the gate drive portion” in line 2 should be “the unmetalized gate drive portion”.
Claim 12 is objected to because of the following informalities: the “the gate drive portion” in line 1 should be “the unmetalized gate drive portion”.
Claim 14 is objected to because of the following informalities: the “the gate drive portion” in line 1 should be “the unmetalized gate drive portion”.
Appropriate correction is required.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-9, 11-13 and 15-20 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chen (US 20240014307).
Regarding claim 1. Fig 1A (top plan view) and Fig 4E (a sectional view of Fig 1A along the line A-A’; [0043]: the 224 in Fig 4E is the same as the 124 in Fig 1B) of Chen disclose An integrated circuit (IC) 10, comprising:
a first III-N material layer 104 (Fig 4E, [0031]: GaN);
a different second III-N material layer 106 (Fig 4E, [0031]: AlGaN) supported by the first III-N material layer (they are sequentially stacked, thereby being supported), the second III-N material layer having top surface (Fig 4E: the top surface of 106); and
a p-doped III-N material layer 224 (Fig 4E, [0036]: p-GaN) over the top surface of the second III-N material layer,
the p-doped III-N material layer including a wider portion 224b (same as the 124b in Fig 1B, also refer to the Fig 4D for detail label) having a first width (Fig 1A: the width in D2) in a first lateral direction (D2) parallel to the top surface (Fig 1A), and
a narrower portion 224a ([0043]: same as the 124a in Fig 1B; also refer to the Fig 4D for detail label) extending from the wider portion (Fig 1A: in D1 direction, the 124a is extending from the center of the wider portion 124b’s underside) in a different second lateral direction (D1) parallel to the top surface (Fig 1A: D1 and D2 are parallel to the top surface of 106),
the narrower portion having a second width (Fig 1A: the width in D2) in the first lateral direction less than the first width (Fig 1A: because of E2 and E3).
Regarding claim 2. Chen discloses The IC of claim 1, further comprising a metal layer 226 [0045] on the p-doped III-N material layer, the metal layer confined to the wider portion (Fig 4E).
Regarding claim 3. Chen discloses The IC of claim 1, wherein the narrower portion is located between first 120 and second 122 ohmic contacts [0035] to the second III-N material layer (Fig 4E).
Regarding claim 4. Chen discloses The IC of claim 1, wherein the wider portion is a first wider portion (Fig 1A: the wider portion near the left edge of 107 facing to E4), and further comprising a second wider portion (Fig 1A: the wider portion near the right edge of 107 facing to E1), the narrower portion extending from the first wider portion to the second wider portion (Fig 1A).
Regarding claim 5. Chen discloses The IC of claim 1, wherein the narrower portion is a first narrower portion (Fig 1A: the narrower portion near the left edge of 107 facing to E4), and further comprising a second narrower portion (Fig 1A: the narrower portion near the right edge of 107 facing to E1) extending from the wider portion in the second lateral direction (Fig 1A).
Regarding claim 6. Chen discloses The IC of claim 1, wherein the second III-N material layer comprises AlGaN [0031].
Regarding claim 7. Chen discloses The IC of claim 6, wherein the p-doped III-N material layer comprises GaN [0031].
Regarding claim 8. Fig 1A (top plan view) and Fig 1B (a sectional view of Fig 1A long the line A-A’) of Chen disclose A transistor 10 ([0016]: HEMT), comprising:
a gallium nitride (GaN) layer 104 (Fig 1B, [0031]: GaN);
an aluminum-gallium nitride (AlGaN) layer 106 ([0031]: AlGaN) on the GaN layer (Fig 1B);
source 120 and drain 122 contacts [0020] spaced apart along a top surface of the AlGaN layer (Fig 1A/Fig 1B: refer to the wider top portions of 120 and 122 along a top surface of 106); and
a p-doped GaN (p-GaN) layer 124 ([0036]: p-GaN) on the AlGaN layer (Fig 1B), the p-GaN layer including a metalized gate terminal portion 124b (Fig 1B, [0017]: the gate structure 128 includes 126, 124b and 124a, and the metal layer 126 is directly formed on the upper portion of 124b. Therefore, the metal layer is formed on the upper portion is considered inherently metalized or, more precisely, characterized by a metal-semiconductor interface where Fermi level pinning occurs, often creating a Schottky barrier [0038]. The interface behavior is often heavily affected by the metal, creating a rectifying, non-ohmic contact due to a high potential barrier for holes, effectively making the immediate surface region part of the contact system. Thus, the 124b is being treated as a metalized gate terminal portion) and
an unmetalized gate drive portion 124a (Fig 1B: the 124a is not in direct contact with the metal layer. Therefore, the lower portion of 124b is, by definition, unmetallized), the gate drive portion extending from the gate terminal portion between the source and drain contacts (Fig 1A: in D1 direction, the 124a is extending from the center of the wider portion 124b’s underside).
Regarding claim 9. Chen discloses The transistor of claim 8, wherein the gate terminal portion has a first width in a lateral direction parallel to the top surface, and the gate drive portion has a smaller second width in the lateral direction (Fig 1A/Fig 1B).
Regarding claim 11. Chen discloses The transistor of claim 8, wherein the metallized gate terminal portion is a metallized first gate terminal portion (Fig 1A: near the E4 potion), and the gate drive portion extends from the first metallized gate terminal portion to a second metallized gate terminal portion (Fig 1A: near the E1 portion).
Regarding claim 12. Chen discloses The transistor of claim 8, wherein the gate drive portion is a first gate drive portion (Fig 1A: the left portion facing to the E4), and further comprising a second gate drive portion (Fig 1A: the right portion facing to the E1) extending from the gate terminal portion.
Regarding claim 13. Chen discloses The transistor of claim 11, wherein the gate terminal portion is a first gate terminal portion (Fig 1A: the portion left side of 107), and a second gate drive portion (the portion within 107) extends from the second gate terminal portion to a third gate terminal portion (the portion within 107).
Regarding claim 15. Chen discloses A method of forming an integrated circuit, comprising:
forming a gallium nitride (GaN) layer 104 [0031] over a semiconductor substrate 100 (Fig 3A, [0028]: Si, SiC);
forming an AlGaN layer 106 [0031] on the GaN layer (Fig 3A); and
forming a p-doped GaN (p-GaN) layer 124 [0036] on the AlGaN layer (Fig 3D), the p-GaN layer including a gate terminal portion 124b having a first width in a lateral direction (Fig 3D, in horizontal direction) and
a gate drive portion 124a (Fig 3D, in horizontal direction) having a second width (Fig 3D) in the lateral direction extending from the gate terminal portion, the first width greater than the second width (Fig 3D).
Regarding claim 16. Chen discloses The method of claim 15, further comprising masking the gate drive portion (Fig 3D: via the passivation 108) and forming a metal layer 126 [0038] on the gate terminal portion (Fig 3E).
Regarding claim 17. Chen discloses The method of claim 15, further comprising forming first 120 and second 122 ohmic contacts to the AlGaN layer (Fig 3E, [0035]), the gate drive portion extending between the first and second ohmic contacts (Fig 3E).
Regarding claim 18. Chen discloses The method of claim 15, wherein the gate terminal portion is a first gate terminal portion (Fig 1A, the portion of 124b near left edge of 107 facing to E4) and further comprising forming a second gate terminal portion (Fig 1A, the portion of 124b near right edge of 107 facing to E1) spaced apart from the first gate terminal portion (Fig 1A: spaced apart due to the center potion of 124b within 107, along the line E2-E3), the gate drive portion extending from the first gate terminal portion to the second gate terminal portion (Fig 1A).
Regarding claim 19. Chen discloses The method of claim 18, further comprising forming a third gate terminal portion (the center potion of 124b within 107, along the line E2-E3) spaced apart from the second gate terminal portion (Fig 1A: spaced apart due the boundary portion on 107), and forming a second gate drive portion (Fig 1A: the portion of 124a between E2 and E1) that extends from the second gate terminal portion to the third gate terminal portion (Fig 1A).
Regarding claim 20. Chen discloses The method of claim 15, wherein the gate drive portion is a first gate drive portion (Fig 1A, the first gate drive portion is between S2 and S3 facing to left edge of 107), and further comprising forming a second gate drive portion (Fig 1A, the second gate drive portion is between S2 and S3 facing to right edge of 107) extending from the gate terminal portion (Fig 1A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20240014307) in view of Tomomatsu (US 20180190777).
Regarding claim 10. Chen discloses The transistor of claim 8, wherein the gate drive portion extends between a pair of source 120 and drain contact 122 (Fig 1A).
But Chen does not disclose a plurality of pairs of source and drain contacts.
However, Fig 1 of Tomomatsu discloses gate 130 extends between a plurality of pairs of source 132 and drain contacts 136 [0013].
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the Chen’s device structure to have the Tomomatsu’s structure for the purpose of providing enhanced power handling, efficiency, and radio frequency (RF) performance.
Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 20240014307).
Regarding claim 14. Chen discloses The transistor of claim 8. Che does not explicitly disclose wherein the gate drive portion has a length of at least about 10 μm.
However, Chen discloses one of edge boundary (E3) length less than of equal to 14 μm [0023] and Fig 4A of Chen substantially shows the boundary length is less than the length of the gate drive portion, W1.
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention that Chen’s the gate drive portion has a length of at least about 10 μm for the purpose of providing enhanced high-voltage handling, device stability, and characterization accuracy. While shorter gate lengths are necessary for high-frequency (RF) performance, long gate lengths are ideal for power electronics applications.
Furthermore, the ordinary artisan would have recognized the claimed range to be an effective, albeit niche, design choice for specific purposes, such as enhancing breakdown voltage, reducing specific high-field trap effects, or managing extreme high-voltage operating conditions. Thus, it would have been obvious that Chen’s device within the claimed range, since optimum or workable ranges of such variables are discoverable through routine experimentation. see MPEP 2144.05 II.B
It is further noted that the specification contains no disclosure of either the critical nature of instant claimed range or any unexpected results arising thereof. Where patentability is said to be based upon particular chosen values or upon another variable recited in a claim, the applicant must show that the chosen values are critical. In re Woodruff, 919 F.2d 1575, 1578,16 USPQ2d 1934,1936 (Fed Cir.1990). See also In re Boesch, 205 USPQ 215 (CCPA) (discovery of optimum value of result effective variable in known process is ordinarily within skill of art).
Conclusion
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/Changhyun Yi/Primary Examiner, Art Unit 2812