DETAILED ACTION
This Action is responsive to the Amendment filed on 05/22/2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 05/22/2026 has been entered.
Election/Restrictions
Applicant’s election without traverse of Species 4, reading on, e.g., FIG. 6B and FIG. 8, in the reply filed on 08/11/2025 is acknowledged and entered into the record.
Claims 1-9 and 15, 18-19, 24-30 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species 1-3 and Species 5-7, there being no allowable generic or linking claim.
In addition to the withdrawn claims drawn to non-elected Species cited above, the Examiner has identified an additional claim to non-elected Species. Specifically, Claim 17 is also drawn to non-elected Species, and is hereby withdrawn.
For example, Claim 17 recites the limitation: a protective layer 522 disposed on the semiconductor chip 310, which reads on FIG. 5A. A “glue layer” is recited in Claim 16, so the “glue layer” is not broadly interpreted as a protective layer as is recited in Claim 17. Therefore, the “protective layer” of Claim 17 appears to identify a different layer from the glue layer 320, FIG. 6B, FIG. 8 disposed on the semiconductor chip 310, FIG. 6B, FIG. 8. The elected Species does not have both a glue layer, as recited in Claim 16, and a protective layer, as recited in Claim 17.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 14 and 23 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention.
Claim 14, which depends from Claim 10, recites the limitation: “the optical component comprises a glass layer, a patterned encapsulant layer disposed on the glass layer . . . “(emphasis added). However, Claim 10 recites the limitation: “an optical component having a patterned encapsulant layer . . . “ (emphasis added). It is unclear whether the second recitation of “a patterned encapsulant layer” recited in Claim 14 is introducing another patterned encapsulant layer to the optical component or is referring back to the patterned encapsulant layer recited in Claim 10. Therefore, Claim 14 has been rendered indefinite.
Claim 23, which depends from Claim 16, recites the limitation: “the optical component comprises a glass layer, a patterned encapsulant layer disposed on the glass layer . . . “(emphasis added). However, Claim 16 recites the limitation: “an optical component having a patterned encapsulant layer . . . “ (emphasis added). It is unclear whether the second recitation of “a patterned encapsulant layer” recited in Claim 23 is introducing another patterned encapsulant layer to the optical component or is referring back to the patterned encapsulant layer recited in Claim 16. Therefore, Claim 23 has been rendered indefinite.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 10-11 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2018/0212118), in view of Chu (US 2020/0227597).
Regarding claim 10, Chen (see, e.g., FIG. 5) discloses semiconductor laser structure comprising:
a chip 10 comprising a first surface e.g., bottom surface of 10, a second surface e.g., top surface of 10 opposing to the first surface e.g., bottom surface of 10, a side surface e.g., side surface of 10 between the first surface e.g., bottom surface of 10 and the second surface e.g., top surface of 10, a first conducting structure 14, e.g., left and a second conducting structure 14, e.g., right, wherein the first conducting structure 14, e.g., left and the second conducting structure 14, e.g., right are located on the first surface e.g., bottom surface of 10 of the chip 10 (Para 0042, Para 0059);
a protective layer 201 disposed on the second surface e.g., top surface of 10 of the chip 10 (Para 0044, Para 0065); and
an optical component 202, 203 having a patterned encapsulating layer 203 disposed on a surface of the protective layer 201 (Para 0044, Para 0065),
Although Chen shows substantial features of the claimed invention, Chen fails to expressly teach a vertical cavity surface emitting laser chip.
Chu (see, e.g., FIG. 3) teaches a vertical cavity surface emitting laser chip 140 for the purpose of utilizing a light emitting device that has low energy consumption, long life, small size, and fast switching speeds (Para 0003, Para 0072).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the LED chip of Chen for the vertical cavity surface emitting laser as described by Chu for the purpose of utilizing a light emitting device that has low energy consumption, long life, small size, and fast switching speeds (Para 0003).
Regarding claim 11, Chen (see, e.g., FIG. 5) teaches the semiconductor laser structure of claim 10, further comprising a support 40 disposed on a perimeter of the protective layer 201 (Para 0050).
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2018/0212118), in view of Chu (US 2020/0227597), and further in view of Adachi (US 2016/0336716).
Regarding claim 12, although Chen/Chu show substantial features of the claimed invention, Chen/Chu fail to expressly teach that the optical component includes a micro lens array (MLA) or a diffraction optical element (DOE).
Adachi (see, e.g., FIG. 6) teaches the semiconductor laser structure of claim 10, wherein the optical component 20 includes a micro lens array (MLA) 22 or a diffraction optical element (DOE) for the purpose of increasing the output of the laser device (Para 0058, Para 0064, Para 0068, Para 0091).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the patterned encapsulant layer of Chen/Chu for the micro lens array (MLA) as described by Adachi for the purpose of increasing the output of the laser device (Para 0091).
Claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2018/0212118), in view of Chu (US 2020/0227597), and further in view of Organesian (US 2021/0172581).
Regarding claim 13, although Chen/Chu show substantial features of the claimed invention, Chen/Chu fail to expressly teach that the optical component includes a diffraction patterned structure.
Organesian (see, e.g., FIG. 7C, FIG. 7D, FIG. 7F, FIG. 8B) teaches semiconductor laser structure of claim 10, wherein the optical component 116 includes a diffraction patterned structure 96 for the purpose of providing the desired diffraction of the output for even and non-even light distribution as needed (Para 0030-Para 0034).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the patterned encapsulant layer in the device of Chen/Chu for the diffraction pattern as described by Organesian for the purpose of providing the desired diffraction of the output for even and non-even light distribution as needed (Para 0034).
Claims 16 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Liang (US 2020/0028032), in view of Chu (US 2020/0227597), in view of Adachi (US 2016/0336716).
Regarding claim 16, Liang (see, e.g., FIG. 11) discloses a package structure comprising:
a chip 22 comprising a first surface e.g., bottom surface of 22, a second surface 221 opposing to the first surface e.g., bottom surface of 22, a side surface 222 between the first surface e.g., bottom surface of 22 and the second surface 221, a first conducting structure e.g., left pad beneath 22 and a second conducting structure e.g., right pad beneath 22, wherein the first conducting structure e.g., left pad beneath 22 and the second conducting structure e.g., right pad beneath 22 are located on the first surface e.g., bottom surface of 22 of the chip 22 (Para 0028, Para 0029);
a glue layer 5, 23 disposed directly surrounding the side surface 222 of the chip 22 (Para 0026, Para 0029, Para 0043, Para 0045-Para 0048);
a support 3 disposed on the glue layer 5, 23 (Para 0026, Para 0036); and
an optical component 6 disposed on the support 3 (Para 0026).
Although Liang show substantial features of the claimed invention, Liang fail to expressly teach a laser chip; and the optical component having a patterned encapsulant layer.
Chu (see, e.g., FIG. 3) teaches a laser chip, e.g., vertical cavity surface emitting laser chip 140 for the purpose of utilizing a light emitting device that has low energy consumption, long life, small size, and fast switching speeds (Para 0003, Para 0072).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the LED chip of Liang for the laser chip as described by Chu for the purpose of utilizing a light emitting device that has low energy consumption, long life, small size, and fast switching speeds (Para 0003).
Adachi (see, e.g., FIG. 6) teaches an optical component 20 includes a micro lens array (MLA) 22 or a diffraction optical element (DOE) for the purpose of increasing the output of the laser device (Para 0058, Para 0064, Para 0068, Para 0091).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the patterned encapsulant layer of Liang/Chu for the micro lens array (MLA) as described by Adachi for the purpose of increasing the output of the laser device (Para 0091).
Regarding claim 20, Adachi (see, e.g., FIG. 6) teaches package structure of claim 16, wherein the optical component 20 includes a micro lens array (MLA) 22 or a diffraction optical element (DOE) (Para 0058, Para 0064, Para 0068, Para 0091, Para 0129).
Claim 21 is rejected under 35 U.S.C. 103 as being unpatentable over Liang (US 2020/0028032), in view of Chu (US 2020/0227597), in view of Adachi (US 2016/0336716), and further in view of Park (KR 2019 0084807 A).
Regarding claim 21, although Liang/Chu/Adachi show substantial features of the claimed invention, Liang/Chu/Adachi fail to expressly teach a patterned layer disposed on the second surface of the chip.
Park (see, e.g., FIG. 9) teaches the package structure of claim 16, further comprising a patterned layer 310 disposed on the second surface e.g., top surface of 310 of the chip 120 for the purpose of condensing the light emitted through the upper surface of the of the light emitting chip (Para 0080, Para 0081).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to include patterned layer as described by Park to the second surface of the laser chip of Liang/Chu/Adachi for the purpose of condensing the light emitted through the upper surface of the of the light emitting chip (Para 0080, Para 0081).
Claim 22 is rejected under 35 U.S.C. 103 as being unpatentable over Liang (US 2020/0028032), in view of Chu (US 2020/0227597), in view of Adachi (US 2016/0336716), and further in view of Organesian (US 2021/0172581).
Regarding claim 22, although Liang/Chu/Adachi show substantial features of the claimed invention, Liang/Chu/Adachi fail to expressly teach that the optical component includes a diffraction patterned structure.
Organesian (see, e.g., FIG. 7C, FIG. 7D, FIG. 7F, FIG. 8B) teaches the package structure of claim 16, wherein the optical component 116 includes a diffraction patterned structure 96 for the purpose of providing the desired diffraction of the output for even and non-even light distribution as needed (Para 0030-Para 0034).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the optical component in the device of Liang for the optical component that includes a diffraction pattern as described by Organesian for the purpose of providing the desired diffraction of the output for even and non-even light distribution as needed (Para 0034).
Response to Arguments
Applicant’s arguments with respect to claims 10 and 16 have been considered but are moot because the new ground of rejection.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANTONIO CRITE whose telephone number is (571) 270-5267. The examiner can normally be reached Monday - Friday, 10:00 am - 6:30 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571) 272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ANTONIO B CRITE/Primary Examiner, Art Unit 2817
Prosecution Insights