DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Species A (Fig. 1-3; Claims 1-3, 7-11, 16-18) in the reply filed on 05/18/2026 is acknowledged. The traversal is on the ground(s) that allegations fall short of establishing a proper election requirement under M.P.E.P. § 806.04 and generic allegations are insufficient to demonstrate a prima facie case of a serious burden as required under MPEP § 808 at least because none of these reasons are applied to the present application.
. This is not found persuasive because absent of Applicants admission on record that the species are obvious variants of each other the species are considered independent or distinct because of the reasons listed in Requirement for Restriction/Election dated 04/01/2026. In addition, these species are not obvious variants of each other based on the current record.
Applicant is required under 35 U.S.C. 121 to elect a single disclosed species, or a single grouping of patentably indistinct species, for prosecution on the merits to which the claims shall be restricted if no generic claim is finally held to be allowable.
There is a search and/or examination burden for the patentably distinct species as set forth above because at least the following reason(s) apply:
the species require a different field of search (e.g., searching different classes/subclasses or electronic resources, or employing different search queries)
the prior art applicable to one species would not likely be applicable to the other species.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 8 and 18 is/are rejected under 35 U.S.C. 102(A1) as being anticipated by Cheng (US 2020/0066866 A1).
Regarding Claim 1, Cheng (Fig. 9-18) discloses a semiconductor device, comprising:
a first diffusion region (source region 12) having a longitudinal axis;
a second diffusion region parallel (drain region 14) with the first diffusion region (12);
a source/drain contact (38) contacting the first diffusion region (12) and the second diffusion region (14);
a gate (22) having a centerline in a transverse direction to the longitudinal axis (Fig 13, 14); and
a gate contact (50) connecting to the gate (22) at a position that has an offset from the centerline away from the source/drain contact (38).
The Examiner notes that 50 is offset to be closer to 14 as the entire surface of 50 can be considered as a connecting position to the gate.
Regarding Claim 2, Cheng discloses the semiconductor device as recited in claim 1, wherein
the gate (22) is positioned closer to the source/drain contact (38) than the gate contact (50) (Fig. 13).
Regarding Claim 3, Cheng discloses the semiconductor device as recited in claim 1, wherein
the gate contact (50) extends over a source/drain region (region around 12, 14).
Regarding Claim 8, Cheng discloses the semiconductor device as recited in claim 1, wherein the offset is up to 50% of a width of the gate contact.
Regarding Claim 18, Cheng (Fig. 9-18) discloses a semiconductor device, comprising:
a source/drain contact (38) contacting parallel source/drain regions (region around 12, 14).;
a gate (22) having a centerline in a transverse direction to the parallel source/drain regions (region around 12, 14).; and
a gate contact (50) connecting to the gate (22) at a position that is offset from the centerline away from the source/drain contact (38). (Fig 13, 14)
The Examiner notes that 50 is offset to be closer to 14 as the entire surface of 50 can be considered as a connecting position to the gate.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cheng (US 2020/0066866 A1) in view of Chae et al. (US 2016/0322354 A1)
Regarding Claim 7, Cheng discloses the semiconductor device as recited in claim 1, wherein
the gate contact (50) includes gate contacts on opposite sides of the source/drain contact (38) and the contacts (50) are shifted off-center.
Cheng does not explicitly disclose a plurality of gate contacts on opposite sides of the source/drain contact and the plurality of gate contacts are shifted off-center in opposite directions from the source/drain contact.
Chae (Fig. 7, 8, 9) discloses a plurality of gate contacts (235c, 235c; 335c, 336c) on opposite sides of a source/drain contact (240c, 241; 340c, 341) and the plurality of gate contacts (235c, 235c; 335c, 336c) are shifted off-center in opposite directions from the source/drain contact. (See Fig. 7, 8, 9).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor device in Cheng in view of Chae such that a plurality of gate contacts on opposite sides of the source/drain contact and the plurality of gate contacts are shifted off-center in opposite directions from the source/drain contact in order to have denser transistor layouts with better current capability and reliability [0093-0094] and allow for contact placement and layout margin [0013]-[0016], [0079]-[0084].
Allowable Subject Matter
Claims 9-11 and 16 and 17 are allowable.
The following is an examiner's statement of reasons for allowance:
With regards to claim 9, none of the prior art teaches or suggests, alone or in combination, “first gate contacts connecting to the first gates at a position that is offset from the centerline of the first gates away from the source/drain contact; and second gate contacts connecting to the second gates at a position that is offset from the centerline of the second gates away from the source/drain contact.
” in the combination required by the claim.
Claims 10, 11, 16 and 17 are allowed by virtue of their dependency on the independent claim 9.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled "Comments on Statement of Reasons for Allowance."
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DMITRIY YEMELYANOV whose telephone number is (571)270-7920. The examiner can normally be reached M-F 9a.m.-6p.m.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at (571) 272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/DMITRIY YEMELYANOV/Examiner, Art Unit 2891
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