DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement(s) (IDS) submitted on 12/28/23 was/were received by the Examiner before the issuance/mailing date of the first office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement(s) has/have been considered (except for anything in foreign language non-accompanied by an English translation) by the Examiner.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 6-11 and 18 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 6 recite “A semiconductor device comprising: a source/drain region disposed between vertically stacked channel regions; and a placeholder disposed within a portion of the source/drain region and interposed between at least one channel region and the source/drain region.”. This is undescriptive of the invention. Claim 6 appears based on [0043] of the PGPub of this application that recites “Still referring to FIG. 5, in one embodiment, a semiconductor device is provided that includes a source/drain region 50 disposed between the first channels 28 and second channels 29 that are vertically stacked. In one embodiment, the placeholder 1 is disposed within a portion of the source/drain region 50 and interposed between the first channels 28 and the source/drain region 50”. In fig. 5, the placeholder 1 is not disposed within a portion of the source/drain region 50, but rather under it, and is not interposed between at least one channel region and the source/drain region. So, the Examiner has modified claim 6 to reflect what is disclosed. Applicant should also consider amending [0043] to reflect what is really on fig. 5.
Claim 18 recites “the second placeholder does not extend to a height that contacts at least one second channel layer in the second stacked channel layers.”. A height is an abstract concept and not something concrete that can contacts something else that is concrete. As such, it is unclear how a height contacts at least one second channel layer.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 3-4, 8 and 19 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
claim 4 recites “the semiconductor device of claim 1 further comprising: a source/drain region atop the placeholder to each of the first channels and the second stacked channels.” (emphasis added). It is not understood what this limitation means, specifically how a source/drain region is atop the placeholder to each of the first channels and the second stacked channels. The Examiner has assumed “the semiconductor device of claim 1 further comprising: a source/drain region atop the placeholder
The same remarks above apply to claim 19 that recites “source/drain regions atop the placeholder to each of the first stacked channel layers and the second stacked channel layers.”
Claims 3 and 8 each recites “the group”, and claim 19 recites “the placeholder”. There is a lack of antecedent basis for those limitations in the claims.
The following is a quotation of 35 U.S.C. 112(d):
(d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph:
Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers.
Claim 19 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. Claim 19 recites “The semiconductor device of claim 12 including”. This does not further limit claim 12 and should instead be “The semiconductor device of claim 12 further including”. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 1, 4-6, 9-12 and 16-20 is/are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Chang et al. (US 2024/0282838).
a. Re claim 1, Chang et al. disclose a semiconductor device comprising: first stacked channel layers (leftmost stacked channel layers 22A-C in section 20B on fig. 8D; see fig. 8D and related text; see [0021] and remaining of disclosure for more details); second stacked channel layers (unlabeled middle stacked channel layers 22A-C in section 20B on fig. 8D); and a placeholder (unlabeled 110B or 110B&110A between the first and second stacked channel layers; [0042]-[0043]) disposed between the first stacked channel layers and the second stacked channel layers, wherein sidewalls of the placeholder directly contact sidewalls of at least one channel in the first stacked channel layers and at least one channel in the second stacked channel layers (explicit on fig. 8D).
b. Re claim 4, the semiconductor device of claim 1 further comprises: a source/drain region 82 ([0013]) atop the placeholder
c. Re claim 5, at least one of the first stacked channel layers and the second stacked channel layers includes nanosheet layers (see at least [0008], [0014], [0016]).
d. Re claim 6 and in view of the 112 1st rejection above, Chang et al. disclose a semiconductor device comprising: a source/drain region 82 (the one between the left and middle stacks 22 in section 20B on fig. 8D; see [0013], fig. 8D and related text as well as remaining of disclosure for more details) disposed between vertically stacked channel regions (left and middle stacked channels regions 22 in section 20B of fig. 8D); and a placeholder (unlabeled layer 110B or 110b&110A between the left and middle stacks 22 in section 20B of fig. 8D) disposed under a portion of the source/drain region and interposed between at least two vertically stacked channel regions
e. Re claim 9, the vertically stacked channel regions include nanosheets (see at least [0008], [0014], [0016]).
f. Re claim 10, a gate structure 200 (figs. 10A-C, [0060]) is present on vertically stacked channel regions.
g. Re claim 11, the gate structure is a gate all around gate structure (figs. 10A-C, [0008], [0056], [0069]).
h. Re claim 12, Chang et al. disclose a semiconductor device comprising: a first semiconductor device 20B including first stacked channel layers 22 (see fig. 8D and related text; see remaining of disclosure for more details); a second semiconductor device 20A including second stacked channel layers 22; a first placeholder 110B&110A disposed adjacent (near) to the first stacked channel layers (explicit on fig. 8D); and a second placeholder 110A disposed adjacent (near) to the second stacked channel layers (explicit on fig. 8D), wherein a height of the first placeholder is greater than a height of the second placeholder to provide that the first placeholder contacts at least one first channel layer 22C in the first stacked channel layers (explicit on fig. 8D).
i. Re claim 16, the second placeholder includes an intrinsic semiconductor material ([0042]-[0043]).
j. Re claim 17, the second placeholder has a smaller width than the first placeholder (this would be the case when, as per [0052], the source/drain region 82 in the second device region 20B is longer in the X direction than the source/drain region 82 in device region 20A, noting that 82 and 110A have a same width in region 20A and 82 and 110A&110B have a same width in region 20B in the X direction).
k. Re claim 18 and in view of the 112 1st rejection above, the second placeholder does not extend to a height to contact at least one second channel layer in the second stacked channel layers (explicit on fig. 8D).
l. Re claim 19 and in view of the 112 2nd rejection above, the semiconductor device of claim 12 further includes source/drain regions 82 atop the first placeholder and the second placeholder
m. Re claim 20, at least one of the first stacked channel layers and the second stacked channel layers is a nanosheet (see at least [0008], [0014], [0016]).
Allowable Subject Matter
Claims 2-3 and 13-15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zang et al. (US 9,847,391) disclose a structure similar to the claimed invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to PENIEL M GUMEDZOE whose telephone number is (571)270-3041. The examiner can normally be reached M-F: 9:00AM - 5:30PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 5712707877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/PENIEL M GUMEDZOE/Primary Examiner, Art Unit 2899