Prosecution Insights
Last updated: July 17, 2026
Application No. 18/399,871

ELECTRONIC CONTROL UNIT, MANUFACTURING METHOD THEREOF, AND ELECTRIC COMPRESSOR

Non-Final OA §103§112
Filed
Dec 29, 2023
Priority
Dec 29, 2022 — CN 202211741628.8
Examiner
LIU, XIAOMING
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Robert Bosch GmbH
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allowance Rate
514 granted / 596 resolved
+18.2% vs TC avg
Moderate +11% lift
Without
With
+10.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
36 currently pending
Career history
635
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
89.3%
+49.3% vs TC avg
§102
6.1%
-33.9% vs TC avg
§112
0.8%
-39.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 596 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-8 in the reply filed on 4/30/2026 is acknowledged. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 3-6 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. Claim 3-6 recites the optional limitation elements. The term "optionally" is a relative term which renders the claim indefinite; it is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. An “optional” element is defined as not necessary or demanded but available. It is unclear whether the optional elements must be part of the claimed invention or not. Thus, determining whether one is infringing the limitation is subjective, rather than objective, and thus the claim is unclear. Therefore, the claims are rejected as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. For the purpose of examination, the examiner will interpret claims 3-6 without the term optionally. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Sawada US 2013/0112994 in view of Yoon et al. US 2014/0104790. Re claim 1, Sawada teaches an electronic control unit (10a or 10b, fig22 or 29, [109]) comprising: a chip support (1) (40, 50a/b, 60 and 70, fig22-24, [71, 77, 78, 79]), comprising a plurality of chip cavities (10) (space between 50 and 40 holding 132, fig24), each of the chip cavities comprising a bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]); chips (2) (132 and 131, fig22 and 24, [111]) arranged in the chip cavities (10) (space between 50 and 40, fig24), each chip (2) (132 and 131, fig22 and 24, [111]) comprising: a support surface (24) (surface of 136 facing 98, 100 and 90, fig24 and 23, [78, 83, 111]) close to the bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]) and a heat dissipation surface (25) (surface under 132 facing 20, fig24, [73]) opposite the support surface (24) (surface of 136 facing 98, 100 and 90, fig24 and 23, [78, 83, 111]), wherein the bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]) of the chip cavity is provided with a plurality of support protrusions (15) (98, 100, and 90, fig24 and 23, [78, 83]), and a heat sink (4) (20, fig24, [73]) abutting and thermally contacting the heat dissipation surfaces (25) (surface under 132 facing 20, fig24, [73]) of the plurality of chips (2) (132 and 131, fig22 and 24, [111]). Sawada does not explicitly show in the case that the electronic control unit is completely assembled, the plurality of support protrusions (15) are compressed and deform. Yoon teaches plurality of support protrusions (15) (164B/C, fig2, [46]) are compressed and deform ([46]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Sawada and Yoon to form 98, 100 and 90 of Sawada as 164B/C of Yoon. The motivation to do so is to secure the device to the heatsink with a robust connection and improve heat transfer efficiency (Yoon, [50]). Re claim 5, Sawada modified above teaches the electronic control unit according to claim 1, wherein the chip support (40, 150a/b, 60 and 70, fig29 and 30, [71, 77, 78, 79, 115]) is fastened to the heat sink (4) (20, fig29, [73]) by means of a plurality of bolts (5) (200, fig29 and 32, [115]) provided around the chip cavities (fig29-31), Re claim 7, Sawada modified above teaches the electronic control unit according to claim 1, wherein each of the chip cavities is in the shape of a flat rectangle (fig22-24), and comprises a support region (110) (region under 98, 94 and 100 in fig23 and 90 in fig22 and 24) and a connecting region (120) (region with 102 or 95 in fig24) on a side of the support region (110) (region under 98 and 100 in fig23 and 90 in fig24), the connecting region (120) (region with 102 or 95 in fig24) being provided with the through hole (11, 12, 13) (102 or 95 in 50b fig24) through which the terminal of the chip passes, and in the support region (110) (region under 98 and 100 in fig23 and 90 in fig24), the support protrusion (15) (two protrusion of 94 and two protrusion of 100, fig22) being provided at each of four corners of the bottom wall (fig22), and a middle portion of the bottom wall being provided a position-limiting protruding portion (16) (42, fig24, [77]) to mate with a notch (20) of the chip (end part chip in 42, fig24), so as to limit the position of the chip in the chip cavity (fig22-24). Claim(s) 2 is rejected under 35 U.S.C. 103 as being unpatentable over Sawada US 2013/0112994 in view of Yoon et al. US 2014/0104790 and LU et al. US 2021/0398875 and Kubouchi US 2021/0134710. Re claim 2, Sawada teaches the electronic control unit according to claim 1, the bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]) of the chip cavity comprising one or more through holes (11, 12, 13) (fig21 and 5), terminals (21, 22, 23) (80-102, fig5 and 21, [80]) of the chip passing through corresponding through holes (11, 12, 13) (through holes in 70, fig5, 21, 23 and 24) and extending to the back side of the chip support (1) (40, 50a/b, 60 and 70, fig22-24, [71, 77, 78, 79]), the plurality of support protrusions (15) (98, 100, and 90, fig24 and 23, [78, 83]) of the plurality of chip cavities are compressed and deform, so that the heat dissipation surfaces (25) (surface under 132 facing 20, fig24, [73]) of the chips (2) (132 and 131, fig22 and 24, [111]) are flush with each other. Sawada does not explicitly show further comprising a circuit board (3) on a back side of the chip support (1), and the terminals (21, 22, 23) of the plurality of chips being soldered to the circuit board (3). Lu teaches a circuit board (3) (150, fig12, [79]) on a back side of the chip support (1) (110, 120, fig12, [80]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Sawada in view of Yoon and Lu to bound the terminals to the driver board as in Lu fig 12. The motivation to do so is to reduce stray inductance and interference (Lu, [36]). Kubouchi teaches the terminals (21, 22, 23) (24, fig5A, [51]) of the plurality of chips being soldered (50, fig5A, [51]) to the circuit board (3) (40, fig5A, [51]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Sawada modified above and Kubouchi to solder the pins to the circuit board. The motivation to do so is to provide a secure electrical connection when the chip cavities are compressed and deform (Kubouchi, [51]). Claim(s) 4 is rejected under 35 U.S.C. 103 as being unpatentable over Sawada US 2013/0112994 in view of Yoon et al. US 2014/0104790 and Ichikawa et al. US 2019/0067166. Re claim 4, Sawada modified above teaches the electronic control unit according to claim 1, wherein the plurality of support protrusions (15) (98, 100, 90 and 94, fig24 and 23, [78, 83]) comprises four support protrusions constituting a rectangular array (two protrusions of 100 and 94, fig22 and 23) Sawada does not explicitly show the plurality of support protrusions comprises portions having diameters less than 1 mm. Ichikawa teaches terminals with diameter between 0.98mm and 1.02mm (20, fig3, [95]) It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Sawada, Yoon and Ichikawa to adjust the diameter of the support protrusions. The motivation to do so is to secure the device to the heatsink and form a robust electrical connection (Ichikawa, [88]). Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over Blanchard et al. US 2022/0095493 in view of Sawada US 2013/0112994 and Yoon et al. US 2014/0104790. Re claim 8, Blanchard teaches an electric compressor (compressor connected with 106, fig1, [23]), characterized by comprising: a compressor body (compressor connected with 106, fig1, [23]); and the electronic control unit (106, fig1, [23]), integrated on the compressor body (fig1). Blanchard does not explicitly show the electronic control unit. Sawada teaches an electronic control unit (10a, fig22, [109]) comprising: a chip support (1) (40, 50a/b, 60 and 70, fig22-24, [71, 77, 78, 79]), comprising a plurality of chip cavities (10) (space between 50 and 40 holding 132, fig24), each of the chip cavities comprising a bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]); chips (2) (132 and 131, fig22 and 24, [111]) arranged in the chip cavities (10) (space between 50 and 40, fig24), each chip (2) (132 and 131, fig22 and 24, [111]) comprising: a support surface (24) (surface of 136 facing 98, 100 and 90, fig24 and 23, [78, 83, 111]) close to the bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]) and a heat dissipation surface (25) (surface under 132 facing 20, fig24, [73]) opposite the support surface (24) (surface of 136 facing 98, 100 and 90, fig24 and 23, [78, 83, 111]), wherein the bottom wall (130) (50b in fig23 and 70 in fig24, [71, 80]) of the chip cavity is provided with a plurality of support protrusions (15) (98, 100, and 90, fig24 and 23, [78, 83]), and a heat sink (4) (20, fig24, [73]) abutting and thermally contacting the heat dissipation surfaces (25) (surface under 132 facing 20, fig24, [73]) of the plurality of chips (2) (132 and 131, fig22 and 24, [111]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Blanchard and Sawada to use the control unit of Sawada. The motivation to do so is to form a module with high positioning accuracy between the circuit substrate and the base (Sawada, [28]). Sawada does not explicitly show in the case that the electronic control unit is completely assembled, the plurality of support protrusions (15) are compressed and deform. Yoon teaches plurality of support protrusions (15) (164B/C, fig2, [46]) are compressed and deform ([46]). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Blanchard in view of Sawada and Yoon to form 98, 100 and 90 of Sawada as 164B/C of Yoon. The motivation to do so is to secure the device to the heatsink with a robust connection and improve heat transfer efficiency (Yoon, [50]). Allowable Subject Matter Claim 3 and 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and amended to remove “optionally”. Specifically, the limitations are material to the inventive concept of the application in hand to ensure all chips form good contact with the heat sink and ensuring good heat dissipation. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIAOMING LIU whose telephone number is (571)270-0384. The examiner can normally be reached Monday-Friday, 9am-8pm, EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S Kim can be reached at (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /XIAOMING LIU/Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Dec 29, 2023
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
97%
With Interview (+10.9%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 596 resolved cases by this examiner. Grant probability derived from career allowance rate.

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