Prosecution Insights
Last updated: October 02, 2026
Application No. 18/400,792

DEVICE FOR ELECTROSTATIC DISCHARGE PROTECTION USING SILICON CONTROLLED RECTIFIER

Final Rejection §102§103
Filed
Dec 29, 2023
Priority
Jan 04, 2023 — RE 10-2023-0001332 +1 more
Examiner
WRIGHT, TUCKER J
Art Unit
2891
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
90%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
752 granted / 947 resolved
+11.4% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
30 currently pending
Career history
962
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
46.8%
+6.8% vs TC avg
§102
33.5%
-6.5% vs TC avg
§112
16.6%
-23.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 947 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 26 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Song (US Pub. No. 2013/0009204). Regarding claim 26, in FIG. 1D, Song discloses a device comprising: a first well (N-WELL) having a first conductivity type (n-type); a second well (P-WELL) configured to form a first junction with the first well and having a second conductivity type (p-type); a first region (P+) in the first well and having the second conductivity type; a second region (N+) in the second well and having the first conductivity type; and a gate electrode (154) that overlaps, along a first direction, the first well, the second well, and the first junction between the first region and the second region, wherein the first junction extends, in the first direction, from the gate electrode into a substrate (P-SUB). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-3, 21-22, and 24 is rejected under 35 U.S.C. 103 as being unpatentable over Ker (US Pub. No. 2002/0122280) in view of Song (US Pub. No. 2013/0009204). Regarding claim 1, in FIG. 17, Ker discloses a device comprising: a first clamp circuit (PSCR_1) electrically connected between a first node (VDD) and a second node (Input PAD); and a second clamp circuit (NSCR_1) electrically connected between the second node and a third node (VSS), wherein the first clamp circuit comprises: a first silicon controlled rectifier (SCR) comprising a first region (P) of a first conductivity type (p-type) electrically connected to the first node, a second region (N-well) of a second conductivity type (n-type), a third region (P+/P-well) of the first conductivity type, and a fourth region (N) of the second conductivity type electrically connected to the second node; and a first gate electrode (VGP). Ker appears not to explicitly disclose that the first SCR comprises a first gate electrode (VGP) that overlaps, along a first direction, the second region, the third region, and a junction of the second region and the third region between the first region and the fourth region, and wherein the junction extends, in the first direction, from the first gate electrode into a substrate. The art however well recognized a first SCR that comprises a first gate electrode (154) that overlaps, along a first direction, a second region (N-Well), a third region (P-Well), and a junction of the second region and the third region between the first region and the fourth region, and wherein the junction extends, in the first direction, from the first gate electrode into a substrate (P-SUB) to be suitable for use as an SCR. See, for example, Song, FIG. 1D. According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to formed the Ker disclosed first SCR to include a first gate electrode that overlaps, along a first direction, a second region, a third region, and a junction of the second region and the third region between the first region and the fourth region, and wherein the junction extends, in the first direction, from the first gate electrode into a substrate for its recognized suitability as an SCR. Regarding claim 2, in FIG. 17, Ker discloses a first resistor (Rp) electrically connected to the first gate electrode; and a first capacitor (Cp) electrically connected to the first gate electrode. Regarding claim 3, in FIG. 17, Ker discloses that the second clamp circuit (NSCR_1) comprises a second SCR and a second gate electrode (VGN), wherein the first resistor is electrically connected between the first gate electrode and the first node, wherein the first capacitor is electrically connected between the first gate electrode and the second node, and wherein the device further comprises: a second capacitor (Cn) electrically connected between the second gate electrode and the second node; and a second resistor (Rn) electrically connected between the second gate electrode and the third node. Regarding claim 21, in FIG. 17, Ker discloses a device comprising: a first clamp circuit (PSCR_1) electrically connected between a first node (VDD) and a second node (Input PAD); and a second clamp circuit (NSCR_1) electrically connected between the second node and a third node (VSS), wherein the first clamp circuit comprises: a first silicon controlled rectifier (SCR) comprising a first region (P) of a first conductivity type (p-type) electrically connected to the first node, a second region (N-well) of a second conductivity type (n-type), a third region (P+/P-well) of the first conductivity type, and a fourth region (N) of the second conductivity type electrically connected to the second node; and a first gate electrode (VGP) configured to form a channel in one of the second region and the third region according to an applied voltage in a channel region between the second region and the third region. Ker appears not to explicitly disclose that the first gate electrode overlaps, along a first direction, the second region, the third region, and a junction of the second region and the third region between the first region and the fourth region, and wherein the junction extends, in the first direction, from the first gate electrode into a substrate. The art however well recognized a first SCR that comprises a first gate electrode (154) that overlaps, along a first direction, a second region (N-Well), a third region (P-Well), and a junction of the second region and the third region between the first region (P+) and the fourth region (N+), and wherein the junction extends, in the first direction, from the first gate electrode into a substrate (P-SUB) to be suitable for use as an SCR. See, for example, Song, FIG. 1D. According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to formed the Ker disclosed first SCR to include a first gate electrode that overlaps, along a first direction, a second region, a third region, and a junction of the second region and the third region between the first region and the fourth region, and wherein the junction extends, in the first direction, from the first gate electrode into a substrate for its recognized suitability as an SCR. Regarding claim 22, in FIG. 17, Ker discloses a first resistor (Rp) electrically connected to the first gate electrode; and a first capacitor (Cp) electrically connected to the first gate electrode. Regarding claim 24, the combination of Ker and Song discloses (see Song, FIG. 1D) that the second region (N-WELL) is a first well in the substrate, wherein the third region (P-WELL) is a second well in the substrate, wherein the first region (P+) is in the first well, and wherein the fourth region (N+) is in the second well. Allowable Subject Matter Claims 25 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 25, in FIGs. 4b and 17, Ker discloses that the second region (N-well/42) is a first well in a deep well in a substrate (30), wherein the third region (P+) is a second well in the deep well, wherein the first region (P/52) is in the first well. However the prior art failed to disclose or reasonably suggest the claimed device particularly characterized by the fourth region (N) being in the second well. Response to Arguments Applicant's arguments filed 8/27/2026 have been fully considered but they are not persuasive. Applicant’s arguments with respect to claim(s) 1, 21, and 26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUCKER J WRIGHT whose telephone number is (571)270-3234. The examiner can normally be reached 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUCKER J WRIGHT/Primary Examiner, Art Unit 2891
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Prosecution Timeline

Dec 29, 2023
Application Filed
May 28, 2026
Non-Final Rejection mailed — §102, §103
Jul 17, 2026
Applicant Interview (Telephonic)
Jul 17, 2026
Examiner Interview Summary
Aug 27, 2026
Response Filed
Sep 24, 2026
Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
90%
With Interview (+10.8%)
2y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 947 resolved cases by this examiner. Grant probability derived from career allowance rate.

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