Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Species 1 and Sub-Species 1 in the reply filed on 03/26/26 is acknowledged.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4, 7-10, 13-15, 18, and 20 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Su et al., WO 2021/088156.
Su et al. shows the invention as claimed including a power semiconductor device comprising:
A semiconductor substrate 2 doped with a first element in a first element family to have a first conductive channel;
A drift layer 5 on the semiconductor substrate 2 and doped with a second element in the first element family to have the first conductive channel;
A well region 6 on the drift layer and doped with a third element in a second element family to have a second conductive channel having a polarity opposite to that of the first conductive channel;
A doped region (for example, 4) on the well region and doped with a fourth element in the first element family to have the first conductive channel;
Two dummy trenches 14 passing through the doped region and the well region, each of the dummy trenches having a dummy gate;
A gate structure (11,12) between the two dummy trenches and having a real gate; and
A dielectric layer 7 configured to isolate each dummy gate and the real gate from the doped region, the well region, and the drift layer (see figs. 2-7 and pages 4-6 of machine translation).
With respect to dependent claim 2, note that the gate structure comprises a gate trench passing through the doped region and the well region, and the real gate (11,12, for example) is in the gate trench.
Concerning dependent claim 3, note that the bottom of the gate structure is lower than or equal to a bottom end of each dummy trench (see figs. 6-7).
Regarding dependent claim 4, note that in Su et al. a distance between the bottom end of each dummy trench and the bottom of the drift layer is greater than or equal to a distance between a bottom end of the gate trench and the bottom of the drift layer (again, see figs. 6-7).
With respect to dependent claim 7, note that the gate structure is on the dielectric layer, and the bottom of the gate structure is in contact with the dielectric layer and higher than the bottom end of each dummy trench. (see figs. 6-7)
As to dependent claim 8, note that Su et al. discloses wherein the doped region comprises two doped sub-regions below the dielectric layer, a top surface of each doped sub-region is in contact with the dielectric layer, and two ends of the gate structure face the two doped sub-regions, respectively (see figs. 3-4).
Concerning dependent claim 9, note that Su et al. discloses wherein the well region comprises two well sub-regions respectively below the two doped sub-regions, and the two dummy trenches respectively pass through the two doped sub-regions and respectively pass through the two well sub-regions below the two doped sub-regions (figs. 3-4).
With respect to dependent claim 10, note that Su et al. discloses wherein the distance between the bottom end of the dummy trench and the bottom of the drift layer is greater than or equal to a distance between the bottom of each well sub-region and the bottom of the drift layer (see figs. 6-7).
As to dependent claim 13, note that Su et al. discloses two contact pads that pass through the dielectric layer to be in contact with the doped region without contacting each dummy gate (see fig. 3).
Concerning dependent claim 14, note that Su et al. discloses a metal interlayer dielectric layer on the dielectric layer, each dummy gate and the real gate, wherein the two contact pads pass through the metal interlayer dielectric layer and the dielectric layer to be in contact with the doped region without contacting the dummy gate (see particularly fig. 3).
Regarding dependent claim 15, note that Su et al. discloses a contact pad that passes through the metal interlayer dielectric layer to be in contact with the real gate (see fig. 3).
As to dependent claim 18, note that Su et al. discloses a contact pad that passes through the metal interlayer dielectric layer to be in contact with the real gate (fig. 3).
Regarding dependent claim 20, note that Su et al. discloses the use of silicon oxide as a gate oxide which has a dielectric constant of 3.9 (see machine translation at page 5).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5-6, 11-12, and 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Su et al., WO 2021/088156.
Su et al. is applied as above but does not expressly disclose the distances between the dummy trench and the drift layer and the gate and dummy trenches. However, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to determine through routine experimentation the optimum spacing of these device features based upon a variety of factors including the desired degree of isolation of the trenches, for example, and such limitations would not lend patentability to the instant application absent a showing of unexpected results.
With respect to dependent claims 16-17, Su et al. does not expressly disclose contact pads that are in connection with the dummy gate. However, a prima facie case of obviousness still exists because the omission of a process step or element would have been obvious if its function is not needed (see Ex parte Wu, 10 USPQ 2031 (Bd. Pat. App. & Inter. 1989)). Furthermore, official notice is taken that it would have been obvious to one of ordinary skill in the art at the time the invention was filed to form contact pads in connection with the dummy gate if such a device feature will simplify the overall process.
Claim(s) 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Su et al., WO 2021/088156 in view of Lage et al., U.S. Patent 5,285,093.
Su et al. does not expressly disclose where the dielectric has a dielectric constant greater than 3.9. However, Lage et al. discloses a gate electrode in a trench that includes a gate dielectric of silicon nitride which has a dielectric constant significantly more than 3.9 (see, for example, col. 5-lines 19-41). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to modify the primary reference of Su et al. so as to have the dielectric with a dielectric constant greater than 3.9 such as silicon nitride because Lage et al. shows that such a gate dielectric is suitable for a gate electrode formed within a trench.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent 11,764,295 discloses a power semiconductor device with a gate electrode formed in a trench.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RICHARD A BOOTH whose telephone number is (571)272-1668. The examiner can normally be reached Monday to Friday, 8:30 to 5:00.
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/RICHARD A BOOTH/ Primary Examiner, Art Unit 2812
May 22, 2026
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