CTNF 18/401,855 CTNF 84734 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Election/Restrictions The 4/10/2026 "Reply" elects with traverse species D2 and identifies as reading on claims 1-16 and 18-20. In the restriction requirement Examiner has set forth why the restriction requirement is proper. Applicant has not provided a basis for why the restriction is improper. Accordingly, the restriction requirement is maintained and Examiner has withdrawn claim 17 from further consideration as being drawn to a non-elected invention. See, for example, 37 CFR § 1.142(b). Claim Rejections - 35 USC § 103 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim s 1-4, 6, 15, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Woo (2011/0089403) in view of Muir (US Pub. No. 2019/0326422) . Regarding claim 1, in FIG. 6A, Woo discloses a semiconductor device comprising: a two-dimensional material (2D) layer with semiconductor characteristics (40, paragraph [0076]); and a source electrode (Vs), a drain electrode (Vd), and a gate electrode (20, paragraph [0073]) spaced apart from one another on the 2D material layer, wherein at least one of the source electrode and the drain electrode is in contact with the 2D material layer Woo appears not to explicitly disclose that at least one of the source electrode and the drain electrode comprises an alloy layer that is amorphous. The art however well recognized an amorphous metal alloy to be suitable for use as a thin film transistor source/drain electrode. See, for example, Muir, paragraphs [0010]-[0011]. According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have formed the at least one of the source electrode and the drain electrode from an alloy layer that is amorphous for its recognized suitability as a thin film transistor source/drain electrode. Regarding claim 2, the combination of Woo and Muir discloses that the alloy layer has semimetal characteristics (semimetal characteristics is broad enough to include conductivity, which is present in the combination of Woo and Muir). Regarding claim 3, the combination of Woo and Muir discloses that the alloy layer comprises a first metal and a second metal that are different from each other. See, for example, Muir, paragraphs [0010]-[0011]. Regarding claim 4, the combination of Woo and Muir discloses that the first metal is one of aluminum (Al) and titanium (Ti). See, for example, Muir, paragraphs [0010]-[0011]. Regarding claim 6, the combination of Woo and Muir discloses that a content of the first metal in the alloy layer is greater than a content of the second metal in the alloy layer. See, for example, Muir, paragraphs [0010]-[0011]. Regarding claim 15, in FIG. 6A, Woo discloses a thickness of the 2D material layer is about 5 nm or less (e.g. graphene monolayer, paragraph [0081]). Regarding claim 16, the combination of Woo and Muir appears not to explicitly disclose at least one of the source electrode and the drain electrode further comprises a metal layer on the alloy layer. However, the semiconductor art well recognized that additional metal layers are formed on the source and drain electrodes to provide interconnection to other circuits in the device or to the outside world. To provide interconnection to other circuits in the device or to the outside world it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to form at least one of the source electrode and the drain electrode such that it further comprises a metal layer on the alloy layer . 07-21-aia AIA Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Woo (2011/0089403) in view of Muir (US Pub. No. 2019/0326422), as evidenced by Lo (US Patent No. 6,042,777) . Regarding claim 12, the combination of Woo and Muir discloses that a melting point of the alloy layer (e.g. TiAl 3 ; see Muir paragraphs [0010]-[0011]) is 800 ºC or more (TiAl 3 has a melting point of 1350 ºC, see Lo, col. 3, line 47) . 07-21-aia AIA Claim s 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Woo (2011/0089403) in view of Muir (US Pub. No. 2019/0326422) as applied to claim 1, and further in view of Choi (US Pub. No. 2016/0093491) . Regarding claims 13-14, the combination of Woo and Muir appears not to explicitly disclose that the 2D material layer comprises transition metal dichalcogenide (TMD), wherein the TMD comprises a metal element and a chalcogen element, the metal element includes one of Mo, W, Nb, V, Ta, Ti, Zr, Hf, Tc, Re, Cu, Ga, In, Sn, Ge, and Pb, and the chalcogen element includes one of S, Se, and Te. The art however well recognized a TMD comprising a metal element and a chalcogen element, the metal element includes one of Mo, W, Nb, and the chalcogen element includes one of S, Se, and Te to be suitable for use as a 2D material in a field effect device. See, for example, Choi, paragraph [0041]. According to well-established patent law precedents (see, for example, M.P.E.P. § 2144.07), therefore, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to have formed the 2D material layer such that it comprises a transition metal dichalcogenide (TMD), wherein the TMD comprises a metal element and a chalcogen element, the metal element includes one of Mo, W, Nb, V, and the chalcogen element includes one of S, Se, and Te for its recognized suitability as a 2D material in a field effect device . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 5, 7, 8-11, and 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 5, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by a source electrode and a drain electrode in contact with a 2D material layer and comprising an alloy layer that is amorphous wherein the second metal of the alloy is one of samarium (Sm), europium (Eu), lanthanum (La), cerium (Ce), and lutetium (Lu). Regarding claim 7, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by a source electrode and a drain electrode in contact with a 2D material layer and comprising an alloy layer that is amorphous wherein a ratio of a content of a first metal in the alloy to a content of a second metal in the alloy is 8 to 10. Regarding claims 8-11, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by a source electrode and a drain electrode in contact with a 2D material layer and comprising an alloy layer that is amorphous wherein the alloy layer further comprises a chalcogen element. Regarding claims 18-20, the prior art failed to disclose or reasonably suggest the claimed semiconductor device particularly characterized by a source electrode and a drain electrode in contact with a 2D material layer and comprising an alloy layer that is amorphous and further comprising an alignment adjustment layer on a different region of the 2D material layer than a region of the 2D material layer in which the source electrode and the drain electrode are disposed, wherein the alignment adjustment layer is configured to adjust energy-band alignment between the 2D material layer and at least one of the source electrode and the drain electrode . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUCKER J WRIGHT whose telephone number is (571)270-3234. The examiner can normally be reached 8:30am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Landau can be reached at 571-272-1731. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUCKER J WRIGHT/ Primary Examiner, Art Unit 2891 Application/Control Number: 18/401,855 Page 2 Art Unit: 2891 Application/Control Number: 18/401,855 Page 3 Art Unit: 2891 Application/Control Number: 18/401,855 Page 4 Art Unit: 2891 Application/Control Number: 18/401,855 Page 5 Art Unit: 2891 Application/Control Number: 18/401,855 Page 6 Art Unit: 2891 Application/Control Number: 18/401,855 Page 7 Art Unit: 2891
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