Prosecution Insights
Last updated: July 17, 2026
Application No. 18/402,016

PHOTONIC ASSEMBLY INCLUDING AN EMBEDDED OPTICAL CONNECTOR DIE AND METHODS FOR FORMING THE SAME

Non-Final OA §102
Filed
Jan 02, 2024
Priority
Aug 08, 2023 — provisional 63/518,154 +1 more
Examiner
LEPISTO, RYAN A
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company, Ltd.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
1031 granted / 1173 resolved
+19.9% vs TC avg
Moderate +8% lift
Without
With
+8.2%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 10m
Avg Prosecution
34 currently pending
Career history
1202
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
66.1%
+26.1% vs TC avg
§102
19.4%
-20.6% vs TC avg
§112
4.1%
-35.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1173 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of Species D in the reply filed on 5/4/26 is acknowledged. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-8, 10-13, 16, 17, 19 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kim et al (US 2023/0204879 A1). Kim teaches: 1. A photonic assembly (Fig. 1, 18, 11A, 21G) comprising a composite die (100, 1100, 1800, 2100), wherein the composite die comprises: a photonic integrated circuits (PIC) die (110) comprising waveguides (part of 111) and photonic devices (112, 113) therein; an electronic integrated circuits (EIC) die (108) comprising semiconductor devices therein (P0054); and an embedded optical connector die (120) contacting a top surface of the PIC die (110) and laterally spaced from the EIC die (108). 2. The photonic assembly of Claim 1, wherein the embedded optical connector die (120, 130) comprises an optical deflector (135) that is configured to change a beam direction between a vertically-extending portion of the beam path within the composite die (between 111 and 135, see Fig. 1) and a horizontally-extending beam path within a first waveguide (138) in the embedded optical connector die (120, 130) (Fig. 1). 3. The photonic assembly of Claim 2, wherein the vertically-extending portion of the beam path is located entirely outside the PIC die (110) (Figs. 11A, 18, 21G). 4. The photonic assembly of Claim 1, wherein the embedded optical connector die (120) comprises at least one optical lens (122) located in a vertically-extending portion of a beam path in the composite die (100). 5. The photonic assembly of Claim 4, wherein the PIC die (110) comprises an optical deflector (part of 111) configured to change a beam direction between the vertically-extending portion of the beam path and a horizontally-extending beam path within a horizontally-extending waveguide in the PIC die (110) (P0097). 6. The photonic assembly of Claim 1, further comprising a dielectric matrix (102) laterally surrounding the embedded optical connector die (120) and contacting a sidewall of the EIC die (108). 7. The photonic assembly of Claim 2, wherein the composite die (100, 1100, 1800, 2100) comprises a support semiconductor substrate (102) overlying the EIC die (108) and the embedded optical connector die (120, 130). 8. The photonic assembly of Claim 7, wherein a vertically-extending portion of a beam path (between 111 and 135, see Fig. 1) extends through (a hole in) the support semiconductor substrate (102). 10. A photonic assembly (Fig. 1, 18, 19, 21G) comprising a composite die (100, 1800, 2100), wherein the composite die comprises: a photonic integrated circuits (PIC) die (110) comprising waveguides (part of 111) and photonic devices (112, 113) therein; an electronic integrated circuits (EIC) die (108) comprising semiconductor devices therein (P0054); a support semiconductor substrate (102) overlying the PIC die (110) and the EIC die (108), wherein the composite die (100, 1800, 2100) is configured to provide a beam path that extends through (a hole of) the support semiconductor substrate (102) (see Figs. 1, 18, 21G); and an embedded optical connector die (120, 130) comprising an optical element (122, 132, 135) located within (see Figs. 1, 18, 21G). 11. The photonic assembly of Claim 10, wherein the optical element (122, 132, 135) comprises an optical deflector (135) that is configured to change a beam direction between a vertically-extending portion of the beam path within the composite die (between 111 and 135, see Fig. 1) and a horizontally-extending beam path within a first waveguide (138) in the embedded optical connector die (120, 130) (Fig. 1). 12. The photonic assembly of Claim 10, wherein the optical element (122, 132, 135) comprises at least one optical lens (122) configured to focus a light beam within a vertically-extending portion of the beam path (Fig. 1). 13. The photonic assembly of Claim 10, wherein: the embedded optical connector die (120, 130) comprises first metallic bonding pads (copper 123) embedded within dielectric material layers (body of 120) of the embedded optical connector die (120, 130); and the PIC die (110) comprises second metallic bonding pads (copper 123) that are bonded to the first metallic bonding pads (123 of 120) by metal-to-metal bonding (P0066). 16. A method of forming a photonic assembly (Figs. 19D-F), the method comprising: providing a photonic integrated circuits (PIC) die (110) comprising waveguides (part of 111) and photonic devices (112, 113) therein; bonding an electronic integrated circuits (EIC) die (108) comprising semiconductor devices (P0054) therein to the PIC die (110); attaching an optical connector die (120) comprising an optical element (lens) to the PIC die (110); and forming a dielectric matrix (102) around the optical connector die (120) on a sidewall of the EIC die (108) (see Fig. 19D). 17. The method of Claim 16, further comprising attaching a support semiconductor substrate (not shown, below 106 or 101) to an assembly including the EIC die (108), the optical connector die (120, 130), and the dielectric matrix (102). 19. The method of Claim 16, wherein the optical element (122, 132, 135) comprises an optical deflector (135) that is configured to change a beam direction between a vertically-extending portion of a beam path (between 111 and 135, see Fig. 1) within a composite die (100, 1100, 1800, 2100) and a horizontally-extending beam path within a first waveguide (138) in the embedded optical connector die (100, 1100, 1800, 2100). 20. (Original) The method of Claim 16, wherein: the optical element (122, 132, 135) comprises at least one optical lens (132) configured to focus a light beam within a vertically-extending portion of a beam path (see Fig. 1); and the PIC die (110) comprises an optical deflector (part of 111) located at an end of the vertically-extending portion of the beam path and is configured to change a beam direction between the vertically- extending portion of the beam path and a horizontally-extending beam path within a waveguide in the PIC die (110) (P0097). Claims 1, 4-6, 16, 17 and 20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Karhade et al (US 2023/0092821 A1). Karhade teaches: 1. A photonic assembly (100, Figs. 1A-B) comprising a composite die (104), wherein the composite die (100) comprises: a photonic integrated circuits (PIC) die (102) comprising waveguides (110) and photonic devices (106, 108) therein; an electronic integrated circuits (EIC) die (114) comprising semiconductor devices therein (P0066); and an embedded optical connector die (part of 104-2, 137, 140) contacting a top surface of the PIC die (102) and laterally spaced from the EIC die (114) (P0054). 4. The photonic assembly of Claim 1, wherein the embedded optical connector die (part of 104-2, 137, 140) comprises at least one optical lens (138) located in a vertically-extending portion of a beam path in the composite die (104). 5. The photonic assembly of Claim 4, wherein the PIC die (102) comprises an optical deflector (part of 102) configured to change a beam direction between the vertically-extending portion of the beam path and a horizontally-extending beam path within a horizontally-extending waveguide in the PIC die (102) (P0054, reflector, curved glass, mirror reflector or multi-directional reflector). 6. The photonic assembly of Claim 1, further comprising a dielectric matrix (104-2) laterally surrounding the embedded optical connector die (part of 104-2, 137, 140) and contacting a sidewall of the EIC die (114) (see Fig. 1A). 16. A method of forming a photonic assembly (100, Figs. 1A-B), the method comprising: providing a photonic integrated circuits (PIC) die (102) comprising waveguides (110) and photonic devices (106, 108) therein; bonding an electronic integrated circuits (EIC) die (114) comprising semiconductor devices therein (P0066) to the PIC die (102) (P0064); attaching an optical connector die (part of 104-2, 137, 140) comprising an optical element (137, 138, 140) to the PIC die (102) (P0054); and forming a dielectric matrix (104-2) around the optical connector die (part of 104-2, 137, 140) on a sidewall of the EIC die (114) (see Fig. 1A). 17. The method of Claim 16, further comprising attaching a support semiconductor substrate (124) to an assembly including the EIC die (114), the optical connector die (part of 104-2, 137, 140), and the dielectric matrix (104-2). 20. The method of Claim 16, wherein: the optical element (137, 138, 140) comprises at least one optical lens (138) configured to focus a light beam within a vertically-extending portion of a beam path (P0055); and the PIC die (102) comprises an optical deflector (part of 102/140) located at an end of the vertically-extending portion of the beam path and is configured to change a beam direction between the vertically- extending portion of the beam path and a horizontally-extending beam path within a waveguide (110) in the PIC die (102) (P0054, reflector, curved glass, mirror reflector or multi-directional reflector). Allowable Subject Matter Claims 9, 14, 15 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: These claims would be allowable over the prior art of record if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the latter, either alone or in combination, does not disclose nor render obvious a photonic assembly comprising the claimed composite die with the claimed PIC die, EIC die and embedded optical connector die wherein the connector die has the claimed deflector, the claimed support semiconductor substrate overlying the EIC and connector die wherein the connector die contacts a bottom surface of the support substrate, or the claimed PIC die, EIC die, support substrate overlying the PIC and EIC and embedded optical connector die wherein a top surface of the EIC die contacts a first segment of a bottom surface of the support semiconductor substrate and a top surface of the embedded optical connector die contacts a second segment of the bottom surface of the support semiconductor substrate, or a method of forming a photonic assembly with the claimed PIC die, EIC die, optical connector die and dielectric matrix around the connector die on a sidewall of the EIC and support substrate wherein a first optical lens is embedded on a first side of the support semiconductor substrate that faces the assembly and a second optical lens is embedded on a second side of the support semiconductor substrate that is an opposite side of the first side, in combination with the rest of the claimed limitations. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following references teach composite dies with PICs, EICs and embedded connectors: US 10267988, US 10551577, US 10775561, US 10777430, US 11417698, US 2023/0194778, US 11686908, US 2023/0296838, US 11796735, US 11835777, US 2024/0027706, US 11906802, US 2024/0103236, US 12092861, US 12392970. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN A LEPISTO whose telephone number is (571)272-1946. The examiner can normally be reached 9AM-6PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached at 571-270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RYAN A LEPISTO/Primary Examiner, Art Unit 2874
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Prosecution Timeline

Jan 02, 2024
Application Filed
May 21, 2026
Non-Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
96%
With Interview (+8.2%)
1y 10m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1173 resolved cases by this examiner. Grant probability derived from career allowance rate.

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