DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of Specie A (Claims 1-10) in the reply filed on 4/27/2025 is acknowledged. The traversal is on the ground(s) that the Election Requirement identifies the species with respect to claims of the application rather than figures, and because the identified features are not mutually exclusive. This is not found persuasive because the Election Requirement identifies both Figures, and specific distinctions between the different species. Moreover, Specie A pertains to components of the memory dies, whereas Species B and C pertain to the relative placement of the memory dies. Rejoinder issues will be addressed upon the indication of allowable subject matter.
The requirement is still deemed proper and is therefore made FINAL.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1- 3 and 6 are rejected under 35 U.S.C. 102(a)(1) and (a)(2) as being anticipated by Kim et al (US 2016/0155724).
With respect to Claim 1, Kim et al discloses a semiconductor package (Figure 3A) comprising: a package substrate (paragraph 55, mold layer of bottom chip); a buffer die (Figure 3A, 300, paragraphs 85-88 and 122) mounted on the package substrate; and a plurality of memory layers (Figure 3A, 911, paragraphs 85-88) stacked on the buffer die (Figure 3A, 300), wherein each of the plurality of memory layers includes a pair of memory dies (Figure 3A, 100a and 200a; Figures 2A-2B, 113 and 213), wherein each memory die of the pair of memory dies includes a semiconductor substrate (Figures 2A-2B, 111 and 211), a plurality of semiconductor elements (Figures 2A-2B, 103 and 203) formed on the semiconductor substrate, a plurality of via structures (Figures 2A-2B, 115 and 215) penetrating through the semiconductor substrate, a plurality of lower pads (Figure 1F, 118 and 218) formed on a lower surface of the semiconductor substrate (Figure 1F and Figures 2A-2B, 111 and 211)and connected to the plurality of via structures (Figures 2A-2B, 115 and 215) , and a plurality of upper pads (Figure 1F and Figures 2A-2B, 117 and 217) formed on an upper surface of an insulating layer (Figures 2A-2B, 105, 106 and 205, 206) disposed on the semiconductor substrate (Figures 2A-2B, 111 and 211) and connected to the plurality of via structures (Figures 2A-2B, 115 and 215), and wherein the plurality of upper pads (Figure 1F and Figures 2A-2B, 117 and 217) included in one memory die of the pair of memory dies are directly attached to the plurality of upper pads included in another memory die of the pair of memory dies. See Figures 1F, 2A-2B and 3A and corresponding text, especially paragraphs 83-125.
With respect to Claim 2, Kim et al discloses wherein an upper surface of the insulating layer included in the one memory die of the pair of memory dies is in contact with an upper surface of the insulating layer included in the another memory die of the pair of memory dies. See Figures 2A-2B, 106 and 206)
With respect to Claim 3, Kim et al discloses wherein in each memory die of the pair of memory dies, a number of the plurality of upper pads (Figure 1F and Figures 2A-2B 117 and 217) is identical to a number of the plurality of lower pads (Figure 1F, 118 and 218).
With respect to Claim 6, Kim et al discloses wherein the plurality of memory layers includes a first memory layer (Figure 3A, 911 bottom) stacked on the buffer die (Figure 3A, 300) and a second memory layer (Figure 3A, 911 top) stacked on the first memory layer, and wherein the plurality of lower pads of the one memory die of the pair of memory dies included in the first memory layer are attached to the plurality of lower pads of the another memory die of the pair of memory dies included in the second memory layer by a plurality of bumps (Figure 3A, 219).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 4-5 and 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al (US 2016/0155724).
Kim et al is relied upon as discussed above.
With respect to Claim 4, Kim et al does not explicitly disclose “wherein in each memory die of the pair of memory dies, a gap between the plurality of upper pads is identical to a gap between the lower pads”.
Kim et al appears to disclose the gap between the plurality of upper pads is identical to a gap between the lower pads in Figure 3A, but does not explicitly state so.
With respect to Claim 4, it would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to use the same size pads for the upper and lower pads, and arrive at the presently claimed limitations, as changes in size are prima facie obvious. See In re Rose, 105 USPQ 237 (CCPA 1955).
With respect to Claim 5, Kim et al does not y disclose “wherein in each memory die of the pair of memory dies, a gap between the plurality of upper pads is less than a gap between the plurality of lower pads”.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to use larger size pads for the upper pads, and arrive at the presently claimed limitations, as changes in size are prima facie obvious, in the absence of unobvious results. See In re Rose, 105 USPQ 237 (CCPA 1955).
With respect to Claim 7, Kim et al does not disclose “ wherein the plurality of memory layers include first to sixth memory layers sequentially stacked on the buffer die”.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to use six memory layers, as duplication of parts for their known benefit is prima facie obvious, in the absence of unobvious results. See In re Harza, 86 USPQ 70 (CCPA 1950).
With respect to Claim 8, Kim et al does not disclose “wherein among the plurality of memory layers, an uppermost memory layer has a different structure from other memory layers”.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to use an uppermost memory layer with a different structure from other memory layers, as rearrangement of parts for their known benefit is prima facie obvious, in the absence of unobvious results. See In re Japikse, 86 USPQ 70 (CCPA 1950).
With respect to Claim 9, Kim et al does not disclose “wherein the one memory die of the pair of memory dies included in the uppermost memory layer has a different thickness from the another one of the pair of memory dies included in the uppermost memory layer”.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to arrive at the presently claimed limitations, as changes in size are prima facie obvious, in the absence of unobvious results. See In re Rose, 105 USPQ 237 (CCPA 1955).
With respect to Claim 10, Kim et al does not disclose “wherein the one memory die of the pair of memory dies included in the uppermost memory layer is a memory die disposed at an uppermost, and wherein a thickness of the one memory die of the pairs of memory dies included in the uppermost memory layer is greater than a thickness of each of the other memory dies”.
It would have been obvious to one of ordinary skill in the art, before the effective date of the invention, to arrive at the presently claimed limitations, as changes in size are prima facie obvious, in the absence of unobvious results. See In re Rose, 105 USPQ 237 (CCPA 1955).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALEXANDER G GHYKA whose telephone number is (571)272-1669. The examiner can normally be reached Monday-Friday 9-6.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at 571 272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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AGG
June 23, 2026
/ALEXANDER G GHYKA/Primary Examiner, Art Unit 2812
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