Prosecution Insights
Last updated: July 17, 2026
Application No. 18/403,729

Manufacturing method of electronic device

Non-Final OA §102§103§112
Filed
Jan 04, 2024
Priority
Jan 30, 2023 — TW 112102905
Examiner
RAHMAN, MOHAMMAD A
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Innolux Corporation
OA Round
1 (Non-Final)
87%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
480 granted / 553 resolved
+18.8% vs TC avg
Moderate +11% lift
Without
With
+11.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 8m
Avg Prosecution
35 currently pending
Career history
580
Total Applications
across all art units

Statute-Specific Performance

§101
1.4%
-38.6% vs TC avg
§103
63.0%
+23.0% vs TC avg
§102
17.9%
-22.1% vs TC avg
§112
15.7%
-24.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 553 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Claims 1-20 are pending and have been examined. Priority Acknowledgment is made of applicant's claim for foreign benefit based on TW112102905 filed on 01/30/2023. Claim Rejections - 35 USC § 102 The following is a quotation of 35 U.S.C. 102(a)(1) that forms the basis for the rejection set forth in this Office action: (a) NOVELTY; PRIOR ART.—A person shall be entitled to a patent unless— (1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention; Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document. Claims 8-9, 11, 15-17 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. (US 20210193630 A1 - hereinafter Chen). Regarding Claim 8, Chen teaches a manufacturing method of an electronic device (see the entire document; Fig. 3A-3D; specifically, [0024]-[0026], and as cited below), comprising: providing a first substrate (11 – Fig. 3D – [0027]), wherein the first substrate comprises a plurality of transfer regions (111), and each transfer region comprises a plurality of electronic components (LEDs – [0027]); picking up a first group of electronic components (T1) from one of the transfer regions (111); transferring the first group of electronic components (T1) to a first region on a target substrate (T1 in 20); picking up a second group of electronic components (T2) from one of the transfer regions (111); and transferring the second group of electronic components to a second region on the target substrate (T2 in 20); wherein the first region and the second region are not adjacent to each other (Fig. 3D shows that T1 and T2 are not adjacent). Regarding Claim 9, Chen teaches the method for manufacturing an electronic device according to claim 8, further comprising: picking up a third group of electronic components (T3) from one of the transfer regions; and transferring the third group of electronic components to a third region on the target substrate (T3 in 20); wherein the distance between the first region and the second region is different from the distance between the second region and the third region (as shown in Fig. 3D). Regarding Claim 11, Chen teaches the method for manufacturing an electronic device according to claim 8, further comprising: picking up a third group of electronic components (T3) from one of the transfer regions; transferring the third group of electronic components to a third region on a target substrate (T3 in 20); picking up a fourth group of electronic components (T4) from one of the transfer regions; and transferring the fourth group of electronic components to a fourth region on the target substrate (T4 in 20). Regarding Claim 15, Chen teaches the method for manufacturing an electronic device according to claim 8, wherein the first substrate comprises a wafer ([0018]). Regarding Claim 16, Chen teaches the method for manufacturing an electronic device according to claim 8, wherein the target substrate comprises a substrate of a display (as LEDs are placed in 20). Regarding Claim 17, Chen teaches the method for manufacturing an electronic device according to claim 8, wherein the plurality of electronic components comprise a plurality of light emitting diodes ([0027]). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document. Claims 1-7, 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen. Regarding Claim 1, Chen teaches a manufacturing method of an electronic device (see the entire document; Fig. 3A-3B; specifically, [0024]-[0026], and as cited below), comprising: providing a first substrate (11 – Fig. 3A – [0027]), wherein the first substrate (11) comprises a plurality of transfer regions (plurality of 111), and each transfer region comprises a plurality of electronic components (LEDs – [0027]); picking up a first group of electronic components (First Transferred) from one of the transfer regions (111); and transferring the first group of electronic components (First Transferred T1) to a target substrate (portion of 20 where the First Group is transferred, that is, the 3 x 3 matrix – Fig. 3A); wherein the diagonal length of the target substrate is L, the first group of electronic components are arranged in a matrix (3 x 3 in 20). But Chen as applied above does not expressly disclose the length M of the matrix in a horizontal direction is greater than or equal to 0.315L and less than L. However, Chen teaches that the pitches P1 can be equal to P3 and P2 can equal to P4 (see [0026]). Furthermore, Chen also states that the pitches can be adjusted (see [0024]). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to adjust the pitches such that all of them are equal – making target a square. Therefore, from known relationship of between a diagonal and sides of a square, M = D/1.41= 0.709 x D (which is greater than 0.315 x L and a side of a square is less than the diagonal. Therefore, both conditions are met in the claim. An ordinary artisan would have been motivated to adjust the pitches to have “more flexible in the manufacturing process which can improve the process efficiency or the product quality” – Chen [0024]. Regarding Claim 2, Chen teaches the method for manufacturing an electronic device according to claim 1, wherein the length N of the matrix in a vertical direction is greater than or equal to 0.315L and less than L (since N is equal to L as seen in claim 1 – this limitation is taught by Chen). Regarding Claim 3, Chen teaches the method for manufacturing an electronic device according to claim 1, wherein the plurality of electronic components comprise a plurality of light emitting diodes (see – [0027]). Regarding Claim 4, Chen teaches the method for manufacturing an electronic device according to claim 1, wherein the first substrate comprises a wafer ([0018]). Regarding Claim 5, Chen teaches the method for manufacturing an electronic device according to claim 1, wherein the target substrate comprises a substrate of a display (as LEDs are placed in 20). Regarding Claim 6, Chen teaches the method for manufacturing an electronic device according to claim 1, wherein the electronic components in each transfer region of the first substrate are arranged in a matrix ([0018]). Regarding Claim 7, Chen teaches the method for manufacturing an electronic device according to claim 6, wherein the target substrate comprises a plurality of disposing regions, and the first group of electronic components are arranged in the matrix (see Fig. 3B), wherein the size of the matrix is smaller than the size of each disposing region (Fig. 3B). Regarding Claim 14, Chen teaches claim 8 from which claim 14 depends. But Chen does not expressly disclose wherein the diagonal length of the target substrate is L, and the first group of electronic components are arranged in a matrix, and the length M of the matrix in a horizontal direction is less than 0.315L and more than 0.0035L. However, Chen teaches that the pitches P1 can be equal to P3 and P2 can equal to P4 (see [0026]). Furthermore, Chen also states that the pitches can be adjusted (see [0024]). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to adjust the pitches such that all of them are equal – making target a square. Therefore, from known relationship of between a diagonal and sides of a square, M = D/1.41= 0.709 x D (which is greater than 0.315 x L and a side of a square is less than the diagonal. Therefore, both conditions are met in the claim. An ordinary artisan would have been motivated to adjust the pitches to have “more flexible in the manufacturing process which can improve the process efficiency or the product quality” – Chen [0024]. Allowable Subject Matter Claims 10, 12-13 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is the Examiner’s Reasons for Allowance: The prior art fails to disclose and would not have rendered obvious: Regarding claim 10: The method for manufacturing an electronic device according to claim 8, wherein the first region, the second region and the third region are located in the same row on the target substrate. Regarding claim 12: The method for manufacturing an electronic device according to claim 11, wherein the first region and the second region are located on one column of the target substrate, and the third region and the fourth region are located on another column of the target substrate, and the distance between the first region and the second region is different from the distance between the third region and the fourth region. Regarding claim 13: The method for manufacturing an electronic device according to claim 11, wherein the first region and the second region are located on one row of the target substrate, and the third region and the fourth region are located on another row of the target substrate, and the distance between the first region and the second region is different from the distance between the third region and the fourth region. REASON FOR ALLOWANCE Claims 18-20 are allowed over prior art. The following is an examiner’s statement of reasons for allowance, which paraphrases and summarizes the claimed invention without intending to be limiting, wherein the legally defined scope of the claimed invention is defined by the allowed claims themselves in view of the written description under 35 USC 112. This statement is not intended to necessarily state all the reasons for allowance or all the details why the claims are allowed and has not been written to specifically or impliedly state that all the reasons for allowance are set forth (MPEP 1302.14). Regarding claim 18, the reference(s) of the Prior Art of record and considered pertinent to the applicant's disclosure and to the examiner’s knowledge do(es) not teach or render obvious, at least to the skilled artisan, the instant invention regarding a method in their entirety (the individual limitations may be found just not in combination with proper motivation). The most relevant prior art reference(s) (US 20210193630 A1 to Chen) substantially teach(es) some of limitations in claim 1 as indicated the rejection of claims 1 and 8, but not the limitations of “wherein the relative positions of the first transfer region and the second transfer region on the first substrate are the same as the relative positions of the first region and the second region on the target substrate” as recited in claim 18. Therefore, the claim 18 is deemed patentable over the prior art. Regarding claims 19-20, they are allowed due to their dependencies on claim 18. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD A. RAHMAN whose telephone number is (571) 270-0168 and email is mohammad.rahman5@uspto.gov. The examiner can normally be reached on Mon-Fri 8:00-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached on (571) 272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMAD A RAHMAN/ Primary Examiner, Art Unit 2898
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Prosecution Timeline

Jan 04, 2024
Application Filed
May 05, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
87%
Grant Probability
98%
With Interview (+11.1%)
2y 8m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 553 resolved cases by this examiner. Grant probability derived from career allowance rate.

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