Prosecution Insights
Last updated: April 19, 2026
Application No. 18/403,735

PACKAGE ASSEMBLY AND METHOD OF FORMING THE SAME

Non-Final OA §102§103
Filed
Jan 04, 2024
Examiner
CAPUTO, LISA M
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Taiwan Semiconductor Manufacturing Company Ltd.
OA Round
1 (Non-Final)
8%
Grant Probability
At Risk
1-2
OA Rounds
2y 2m
To Grant
0%
With Interview

Examiner Intelligence

Grants only 8% of cases
8%
Career Allow Rate
3 granted / 38 resolved
-60.1% vs TC avg
Minimal -8% lift
Without
With
+-7.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
22 currently pending
Career history
60
Total Applications
across all art units

Statute-Specific Performance

§101
4.5%
-35.5% vs TC avg
§103
48.0%
+8.0% vs TC avg
§102
25.4%
-14.6% vs TC avg
§112
18.6%
-21.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 38 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-16 and 21-24 (newly added) in the reply filed on 1/28/2026 is acknowledged. Claims 17-20 are cancelled. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 10, 11, 13, and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Patel et al (USPGPub No. 2019/0310431). Regarding claim 10, Patel teaches a method of forming a package assembly, comprising: bonding at least one integrated circuit structure (Fig. 1, 130 and Paragraph 32) to an interposer structure (Fig. 1, 110 and Paragraph 30); bonding a photonic structure (Figs. 1 and 3, 140 and Paragraph 30) to the interposer structure aside the at least one integrated circuit structure; providing a semiconductor substrate (Fig. 3, 305 and Paragraph 38) and placing the semiconductor substrate on the photonic structure, wherein the semiconductor substrate has at least one groove (Paragraphs 28 and 70) and at least one transparent region (Fig. 4, 420 and Fig. 14, 1405) aside the at least one groove; dispensing an optical glue (Paragraph 29, 34, etc.) into a space between the semiconductor substrate and the photonic structure; and curing the optical glue by irradiating a light (Fig. 3, 315 and Paragraph 39) through the at least one transparent region (Fig. 4, 420 and Fig. 14, 1405) of the semiconductor substrate. Regarding claim 11, Patel teaches that the optical glue comprises a UV-curable optical glue (Paragraph 29 and 34). Regarding claim 13, Patel teaches that the at least one transparent region (Fig. 4, 420 and Fig. 14, 1405) penetrates through the semiconductor substrate. Regarding claim 16, Patel teaches a method of forming the at least one groove comprises performing an etching process (Paragraph 70). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, 2, 4, 6-9, and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Patel et al (USPGPub No. 2019/0310431), in view of Zhu et al (USPGPub #2023/0053498). Regarding claim 1, Patel teaches a method of forming a package assembly, comprising: providing a semiconductor package comprising an interposer structure (Fig. 1, 110 and Paragraph 30) and an overlying photonic structure (Figs. 1 and 3, 140); placing an optical package (Figs. 1 and 3, 150) on the semiconductor package, wherein the optical package comprises a substrate (Fig. 3, 305 and Paragraph 38), a lid (Fig. 3, 310) and a fiber array unit (Fig. 3, 155 and Paragraph 40) interposed between the substrate and the lid; dispensing an optical glue (Paragraph 29, 34, etc.) into a space between the semiconductor package and the optical package; curing the optical glue by irradiating a light (Fig. 3, 315 and Paragraph 39) through the optical package. Patel does not teach adjusting a location of the optical package after dispensing the optical glue. Zhu teaches adjusting relative locations of optical components after dispensing optical glue (Paragraph 64 and 66). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjust a location of the optical package of Patel after dispensing the optical glue as taught by Zhu in order to ensure that the alignment of the package produces the maximum optical power (Paragraph 64). Regarding claim 2, Patel teaches that the optical glue comprises a UV-curable optical glue (Paragraph 29 and 34). Regarding claim 4, Patel teaches that the substrate comprises a semiconductor substrate (Paragraph 38) and at least one transparent region (Fig. 4, 420 and Fig. 14, 1405) penetrating through the semiconductor substrate. Regarding claim 6, Patel teaches that the substrate comprises a glass substrate (Paragraph 38). Regarding claim 7, Patel teaches forming at least one groove in the substrate, wherein the fiber array unit is adhered to the at least one groove (Paragraphs 28 and 70). Regarding claim 8, Patel teaches a method of forming the at least one groove comprises performing an etching process (Paragraph 70). Regarding claim 9, Patel teaches a method of forming the at least one groove comprises performing a glass cutting process (Paragraph 70). Regarding claim 12, Patel does not teach adjusting a location of the semiconductor substrate after dispensing the optical glue and before curing the optical glue. Zhu teaches adjusting relative locations of optical components after dispensing optical glue (Paragraph 64 and 66). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to adjust a location of the optical package of Patel after dispensing the optical glue and before curing the optical glue as taught by Zhu in order to ensure that the alignment of the package produces the maximum optical power (Paragraph 64). Claim 5 is rejected under 35 U.S.C. 103 as being unpatentable over Patel as modified by Zhu, further in view of Venkatesan et al (USPGPub No. 2023/0176303). Regarding claim 5, Patel teaches in at least one dielectric layer (Fig. 4, 410) over the semiconductor substrate (Fig. 4, 405 and Paragraph 41), but Patel as modified by Zhu does not teach forming at least one optical component and at least one reflector embedded in at least one dielectric layer over the semiconductor substrate. Venkatesan teaches a substrate for packaging optical fiber (Fig. 12A-12B, 1201), and forming at least one optical component (Fig. 12A-12B, guide for optical signal 1270); Fig. and at least one reflector (Fig. 12A-12B, 1202) embedded in the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form an optical component and a reflector embedded in the dielectric layer of Patel/Zhu as taught by Venkatesan in order to use the components to facilitate alignment of the substrate (Paragraph 127). Claim 14-15 and 21-22 rejected under 35 U.S.C. 103 as being unpatentable over Patel, in view of Venkatesan et al (USPGPub No. 2023/0176303). Regarding claim 14, Patel does not teach forming an optical lens in the semiconductor substrate aside the at least one transparent region. Venkatesan teaches an optical lens (Fig. 11A-11B, 1102b and Paragraph 120) in the semiconductor substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form an optical lens in the substrate of Patel aside the transparent as taught by Venkatesan in order to use the components to facilitate alignment of the substrate (Paragraph 121-122). Regarding claim 15, Patel teaches in at least one dielectric layer (Fig. 4, 410) over the semiconductor substrate (Fig. 4, 405 and Paragraph 41), but does not teach forming at least one optical component and at least one reflector embedded in at least one dielectric layer over the semiconductor substrate. Venkatesan teaches a substrate for packaging optical fiber (Fig. 12A-12B, 1201), and forming at least one optical component (Fig. 12A-12B, guide for optical signal 1270); Fig. and at least one reflector (Fig. 12A-12B, 1202) embedded in the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form an optical component and a reflector embedded in the dielectric layer of Patel as taught by Venkatesan in order to use the components to facilitate alignment of the substrate (Paragraph 127). Regarding claim 21, Patel teaches method of forming a package assembly, comprising: forming an optical package comprising: forming a light-transmitting region (Fig. 4, 420 and Fig. 14, 1405) in a substrate; grooving the substrate to form a groove (Paragraphs 28 and 70); placing a fiber array unit (Fig. 3, 155 and Paragraph 40) on the groove to align with the optical component; and placing a lid (Fig. 3, 310) over the fiber array unit; and fixing the optical package to a photonic structure of a semiconductor package with a first optical glue (Paragraph 29, 34, etc.). Patel does not teach forming an optical component over the substrate. Venkatesan teaches a substrate for packaging optical fiber (Fig. 12A-12B, 1201), and forming at least one optical component (Fig. 12A-12B, guide for optical signal 1270) over the substrate. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to form an optical component over the substrate of Patel as taught by Venkatesan in order to use the component to facilitate alignment of the substrate (Paragraph 127). Regarding claim 22, Patel teaches forming the light-transmitting region in the substrate comprises: forming a hole penetrating through the substrate to form the light light-transmitting region (Fig. 4, 420 and Fig. 14, 1405). Allowable Subject Matter Claims 3, 23, and 24 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. For example, regarding claim 23, the use of forming a second optical glue to attach the lid to the hard mask layer in concert with the other limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to LISA M CAPUTO whose telephone number is (571)272-2388. The examiner can normally be reached Monday-Friday 9-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Uyen-Chau Le can be reached at 571-272-2397. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LISA M CAPUTO/Primary Patent Examiner, Art Unit 2874
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Prosecution Timeline

Jan 04, 2024
Application Filed
Mar 13, 2026
Non-Final Rejection — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
8%
Grant Probability
0%
With Interview (-7.9%)
2y 2m
Median Time to Grant
Low
PTA Risk
Based on 38 resolved cases by this examiner. Grant probability derived from career allow rate.

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