Prosecution Insights
Last updated: August 18, 2026
Application No. 18/403,944

SEMICONDUCTOR STORAGE DEVICE

Non-Final OA §112
Filed
Jan 04, 2024
Priority
Jan 06, 2023 — JP 2023-001170
Examiner
HEISTERKAMP, JUSTIN BRYCE
Art Unit
2827
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
KIOXIA Corporation
OA Round
3 (Non-Final)
99%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 99% — above average
99%
Career Allowance Rate
80 granted / 81 resolved
+30.8% vs TC avg
Minimal +2% lift
Without
With
+2.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
13 currently pending
Career history
90
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
28.9%
-11.1% vs TC avg
§102
26.1%
-13.9% vs TC avg
§112
32.1%
-7.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 81 resolved cases

Office Action

§112
DETAILED ACTION Claims 1, 9, 15, and 17 are pending in the present application. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments, see pages 6-8, filed 04/28/2026, with respect to claims 1, 9, and 15 have been fully considered and are persuasive. The 35 U.S.C. 102 rejections of claims 1, 9, and 15 have been withdrawn. Claim Objections Claims 1, 9, and 15 are objected to because of the following informalities: Claim 1, line 9, should read as, “. . . receive unit, a second input terminal connected to the voltage generator, . . .” to maintain consistency with “the first input terminal.” Claim 9, lines 13-14, should read as, “. . . first receive unit, a second input terminal connected to the voltage adjustment circuit . . .” to maintain consistency with “the first input terminal.” (also see the following 112(b) rejection) Applicant is advised to amend claim 15, lines 15-16, to read as. “. . . in response to the first adjustment signal, performing a primary adjustment based on the first adjustment signal so as to generate the second reference potential; and . . .” Otherwise, “performing a primary adjustment” may be interpreted as an open-ended limitation and a potentially unclear, if not vastly broad. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of the first paragraph of 35 U.S.C. 112(a): (a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention. Claims 1, 9, and 17 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. Claim 1 recites, “a first receive unit configured to receive a first toggle signal, a first adjustment signal and a second adjustment signal, the first toggle signal, the first adjustment signal and the second adjustment signal being supplied outside of the semiconductor [storage] device.” The semiconductor storage device 2 (FIGs. 1-3) is interpreted to map to “the semiconductor storage device” in claim 1. The semiconductor storage device 2 is illustrated to comprise an input/output pad group 31 including pads 311 and 312 (FIG. 21), and a control pad group 32. The pad 311 in FIG. 21 is described to only receive the first toggle signal DQ0 (para. [0128]), not a first or second adjustment signal, and is interpreted to map to the first receive unit in claim 1. As best understood by the examiner, the first and second adjustment signals are intended to map to the first control signal and the second control signal disclosed in para. [0185]. These signals are transmitted from the memory controller 1 and must, presumably, be received by the control group pad 32—which is distinct from input/output pad group 31 and the pad 311 included. According the specification, it does not appear the first and second adjustment signals may be received by the same first receive unit (pad 311) that also receives the toggle signal DQ0. Claim 9 contains a similar defect. Claims 1 recites “a first comparison circuit having . . . a second terminal connected to the voltage generator, . . .” and “a second comparison circuit having . . . a second input terminal connected to the voltage generator, . . .“ As best understood by the examiner, the second input terminals of both the first and second comparison circuits are connected to the voltage adjustment circuit, according to FIG. 21 and the arguments supplied on 4/28/2026. Applicant is advised to amend the limitations to, “the voltage adjustment circuit, . . .” Claim 9 recites “a first comparison circuit having . . . a second terminal connected to a voltage generator generating a reference potential, . . .” and “a second comparison circuit having . . . a second input terminal connected to the voltage generator, . . .“ As best understood by the examiner, the second input terminals of both the first and second comparison circuits should be expressed as connected to the voltage adjustment circuit, according to FIG. 21 and the arguments supplied on 4/28/2026. Applicant is advised to amend the limitations to, “the voltage adjustment circuit, . . .” Claim 17 is rejected because it depends on claim 1; therefore, claim 17 contains at least the same defect(s). The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1, 9, 15, and 17 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation "the semiconductor device" in line 7. There is insufficient antecedent basis for this limitation in the claim. This should read as, “the semiconductor storage device” for proper antecedent basis. Claim 1 recites the limitation "the relative reference potential" in 21. There is insufficient antecedent basis for this limitation in the claim. This should read as, “the second reference potential.” Claim 17 is rejected because it depends on claim 1; therefore, claim 17 contains at least the same defect(s). Claim 9 recites the limitation "the relative reference potential" in 25. There is insufficient antecedent basis for this limitation in the claim. See recommendation above. Claim 15 recites the limitation "the relative reference potential" in 12. There is insufficient antecedent basis for this limitation in the claim. See recommendation above. Allowable Subject Matter Claims 1, 9, and 15 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Claim 17 would be allowable if rewritten to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action and to include all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827 /AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Show 1 earlier event
Jul 16, 2025
Non-Final Rejection mailed — §112
Nov 17, 2025
Response Filed
Jan 28, 2026
Final Rejection mailed — §112
Apr 28, 2026
Request for Continued Examination
May 04, 2026
Response after Non-Final Action
Jun 10, 2026
Non-Final Rejection mailed — §112
Jul 22, 2026
Applicant Interview (Telephonic)
Jul 22, 2026
Examiner Interview Summary

Precedent Cases

Applications granted by this same examiner with similar technology

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Patent 12682955
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Patent 12676192
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2y 4m to grant Granted Jul 07, 2026
Patent 12660146
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2y 10m to grant Granted Jun 16, 2026
Patent 12651635
MEMORY DEVICES SUPPORTING ENHANCED GATE-INDUCED DRAIN LEAKAGE (GIDL) ERASE OPERATION
2y 6m to grant Granted Jun 09, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
99%
Grant Probability
99%
With Interview (+2.2%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 81 resolved cases by this examiner. Grant probability derived from career allowance rate.

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