DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Hsu et al (US 11,327,228 B2) in view of Lin et al (US 11,226,506 B2).
Hsu teaches:
1, 9, 15. A semiconductor photonics device (Figs. 5-8)/method, comprising:
a substrate (412);
one or more first dielectric layers (414, DL, 250) over the substrate (414);
forming a plurality of second dielectric layers (DL, ILD0-9, OL, ESL) over the etch stop layer (260) and first dielectric layers (414, DL, 250);
forming an etch stop layer (260) over the one or more first and second dielectric layers (414, DL, 250);
forming a first portion of third dielectric layer (ILD1-9, ESL, OL);
forming an optical modulator structure (220) in the one or more first dielectric layers (DL) and above one or more first dielectric layers (404).
11. The method of claim 9, further comprising:
forming, adjacent to the optical modulator structure (220), a grating coupler structure (CG) in the semiconductor layer (DL); and
forming, through the plurality of dielectric layers (ILD1-9, ESL, OL), a grating coupler transmission region (O2).
Hsu does not teach expressly:
a modulator heater structure in one or more of the plurality of second/third dielectric layers,
wherein the modulator heater structure is located above the optical modulator structure; and
an isolation trench through the plurality of second dielectric layers,
wherein the isolation trench is terminated on the etch stop layer, and
wherein the isolation trench surrounds the modulator heater structure in a top view of the semiconductor photonics device, and
wherein forming the isolation trench comprises:
forming the isolation trench adjacent to the grating coupler transmission region; and
an isolated region of the plurality of second dielectric layers,
wherein the isolated region of the plurality of second dielectric layers is located above the optical modulator structure,
wherein the modulator heater structure is included in the isolated region of the plurality of second dielectric layers,
wherein the isolated region of the plurality of second dielectric layers is isolated from other regions of the plurality of second dielectric layers by an isolation trench, and
wherein the isolated region of the plurality of second dielectric layers has a ring top view shape in a top view of the semiconductor photonics device.
Lin teaches a semiconductor photonics device (1200, Fig. 12);
forming a modulator heater structure (118) in one or more of a plurality of second/third dielectric layers (712),
forming wherein the modulator heater structure (118) is located above an optical modulator structure (see w2 in Fig. 12); and
forming, above the first portion of the third dielectric layer (712) and above the modulator heater structure (118), a second portion (714 or 716) of the third dielectric layer and a plurality of dielectric layers (generally 706, 710, 714, 716);
forming an isolation trench (1104, 1106) through the plurality of second/third dielectric layers (712) and etch stop layers (704, 710),
wherein the isolation trench is through an etch stop layer (706, 710), and
wherein the isolation trench (1104, 1106) surrounds the modulator heater structure (118) and has a rounded top view shape (ring) in a top view of the semiconductor photonics device (see Fig. 11D);
an isolated region (between the trenches) of the plurality of second dielectric layers (700s),
wherein the isolated region (between the trenches) of the plurality of second dielectric layers (700s) is located above the optical modulator structure (w2),
wherein the modulator heater structure (118) is included in the isolated region of the plurality of second dielectric layers (712) (see Fig. 12),
wherein the isolated region (between the trenches) of the plurality of second dielectric layers (700s) is isolated from other regions of the plurality of second dielectric layers (700s not between the trenches) by an isolation trench (1104, 1106), and
wherein the isolated region (between the trenches of the plurality of second dielectric layers (700s) has a ring top view shape in a top view of the semiconductor photonics device (see Fig. 11D).
2, 19. The semiconductor photonics device of claim 1, wherein the modulator heater (118) structure is located on a top surface of the etch stop layer (710).
3. The semiconductor photonics device of claim 1, wherein the isolation trench (1104, 1106) has a ring shape in the top view of the semiconductor photonics device (see Fig. 11B).
4. The semiconductor photonics device of claim 1, wherein the isolation trench (1104, 1106) is filled with a gas (C24-31).
7, 10, 18. The semiconductor photonics device of claim 1, further comprising:
forming an oxide layer (110, Fig. 15) above the plurality of second dielectric layers (712),
wherein the isolation trench (1104, 1106) is sealed at a top of the isolation trench by the oxide layer (110) (C17 L2-37).
8. The semiconductor photonics device of claim 7, wherein the oxide layer (110) comprises a portion that is located along a side of the isolation trench (1104, 1106) (see Fig. 15, a portion goes in the trench).
16. The semiconductor photonics device of claim 15, wherein the isolation trench (1104, 1106) comprises a ring-shaped air gap (see Fig. 11D) between the plurality of second dielectric layers (700s) and the isolated region (700s between the trenches) of the plurality of second dielectric layers (700s).
Hsu and Lin are analogous art because they are from the same field of endeavor, semiconductor photonics devices.
At the time of the effective filing date of the claimed invention, it would have been obvious to a person of ordinary skill in the art to modify the device of Hsu to include the isolation trenches around a modulator heater and next to the grating coupler as taught by Lin.
The motivation for doing so would have been to localize heat generated by the heater structure (C3 L38-50).
Hsu and Lin do not teach the trench terminated on the etch stop layer.
It would have been obvious to one of ordinary skill in the art at the time of effective filing to try terminating the trench at the etch stop layer in Lin, since it has been held that rearranging parts of an invention involves only routine skill in the art (In re Japikse, 86 USPQ 70) and since it would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to try terminating the trench at this point since the trenches will still surround the heater structure (see Fig. 12), therefore a person of ordinary skill the art could rearrange the depth at this layer and since it has been held that “it is obvious to try - choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success” is a rationale for arriving at a conclusion of obviousness. In re KSR International Co. v. Teleflex Inc. One of ordinary skill in the art would identify the etch stop layer as a place to terminate the trench since the trench is formed by etching so it would be predictable to stop the etch at the etch stop and as discussed, a device with the trench to this depth should still succeed since the trenches still surround the heater structure.
Regarding claim 13:
Hsu and Lin does not state the trench is formed by an acid-based wet etch, but Hsu teaches wet or dry or a combination may be used (C7 L36-43), therefore It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to try acid-based wet etching for the trench, since it has been held that “it is obvious to try - choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success” is a rationale for arriving at a conclusion of obviousness. In re KSR International Co. v. Teleflex Inc. Acid-based wet etching is a standard technique for material removal in semiconductors so one of ordinary skill in the art would identify this as a method that would succeed in Hsu and Lin.
Regarding claims 5, 6, 12, 14, 17 and 20:
Hsu and Lin do not state what the distance between the heater and trench or a width of the trench being 5 to 15 microns.
It would have been obvious to one of ordinary skill in the art at the time of effective filing to try a distance between the heater and trench between 10 and 20 microns and a width of the trenching being 5 to 15 microns, since it has been held that “[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation.” In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955). “The normal desire of scientists or artisans to improve upon what is already generally known provides the motivation to determine where in a disclosed set of percentage ranges is the optimum combination of percentages.”); In re Hoeschele, 406 F.2d 1403, 160 USPQ 809 (CCPA 1969). For more recent cases applying this principle, see Merck & Co. Inc. v. Biocraft Laboratories Inc., 874 F.2d 804, 10 USPQ2d 1843 (Fed. Cir.), cert. denied, 493 U.S. 975 (1989); In re Kulling, 897 F.2d 1147, 14 USPQ2d 1056 (Fed. Cir. 1990); and In re Geisler, 116 F.3d 1465, 43 USPQ2d 1362 (Fed. Cir. 1997). Lin teaches a distance between the trench and modulator being w2 minus w1 (see Fig. 12), therefore it would have been obvious for a user to choose a suitable value including one between 10 and 20 microns given a specific value is not stated. Further, Lin teaches a width of the trench being 0.5 microns, but other values are also within the scope of the invention (C15 L64 – C16 L2). It would have been obvious to one of ordinary skill in the art at the time the invention was effectively filed to try a value of the width of the trench in the 5 to 15 microns range since Lin teaches different values can be used and since it has been held that “it is obvious to try - choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success” is a rationale for arriving at a conclusion of obviousness. In re KSR International Co. v. Teleflex Inc. Lin identifies a micron range and an open invitation for a user to design a trench with a width different from 0.5 microns as discussed. One of ordinary skill in the art would expect a 5 micron width trench to succeed in Hsu and Lin since such a trench would isolate the heat from the heating structure.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following references teach semiconductor photonics devices with isolation trench structures: US 7705455, US 8149890, US 8742590, US 9214374, US 9231361, US 9448422, US 9577035, US 10867908.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to RYAN A LEPISTO whose telephone number is (571)272-1946. The examiner can normally be reached on 8AM-5PM EST M-F.
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/RYAN A LEPISTO/Primary Examiner, Art Unit 2874