DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 11-12, 14, and 16-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) [Hereafter “Osada”] in view of Kwon et al. (U.S. Pub. 2017/0125393) [Hereafter “Kwon”].
Regarding claim 1, Osada [Figs.1-2] discloses a semiconductor device comprising:
a first semiconductor element [7];
a second semiconductor element [5];
an insulating element [6] [Abstract; Fig.6; Paras.84-85] including a first coil [21];
a second coil [20] magnetically coupled to the first coil [Para.79];
and a support substrate [die pads 8,9] on which the first semiconductor element and the second semiconductor element are mounted,
wherein the support substrate includes a first wiring member [18] electrically interposed between the first semiconductor element [7] and the first coil [21], and a second wiring member [15] electrically interposed between the second semiconductor element [5] and the second coil [21],
the second coil [21] is arranged between the first coil [20] and the support substrate, and
the insulating element [6] is supported by the support substrate [die pads 8,9].
Osada fails to explicitly disclose the support substrate as claimed. However, Kwon [Figs.1-2] discloses a support substrate [100] for mounting semiconductor components, wherein the support substrate includes an insulating base member [102], and a substrate wiring [110,116,122] formed on the base member. It would have been obvious to provide the support substrate as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claim 2, Osada [Figs.1-2] discloses the semiconductor device
wherein the first semiconductor element [7] is a drive element for driving a switching element [Para.66],
the second semiconductor element [5] is a control element for controlling the drive of the switching element, and
the drive element requires a higher voltage than the control element [Para.66].
Regarding claim 3, Osada [Figs.1-2] and Kwon [Figs.1-2] disclose the semiconductor device
wherein the support substrate [100] has a mounting surface on which the first semiconductor element, the second semiconductor element, and the insulating element are mounted,
the mounting surface faces in one sense of a thickness direction of the support substrate, and a portion of each of the base member [102] and the substrate wiring [110] is exposed from the mounting surface [Kwon; Fig.2].
Regarding claims 11-12 and 14, Osada [Figs.1-2,6] discloses the semiconductor device,
wherein the insulating element [6] includes the second coil [20] and a third insulating layer [28/27], and
at least a portion of the third insulating layer [28] is provided between the first coil [21] and the second coil in the thickness direction [Fig.6];
wherein the insulating element [6] has a third element obverse surface and a third element reverse surface that face away from each other in the thickness direction,
the third element reverse surface faces the mounting surface in the thickness direction, the first coil [21] is arranged on the third element obverse surface, and
the second coil [20] is arranged on the third element reverse surface [Fig.6];
wherein the third insulating layer [28/30] is made of glass [Para.84; layer 30 may comprise SiO2 (glass)].
Regarding claims 16-20, Osada [Figs.1-2,6] discloses the semiconductor device,
further comprising a first external terminal [3] electrically connected to the first semiconductor element [7], and a second external terminal [3] electrically connected to the second semiconductor element [5],
wherein the support substrate [die pads 8,9] has a terminal surface that faces away from the mounting surface in the thickness direction, and on which the first external terminal and the second external terminal are arranged;
wherein the substrate wiring includes a third wiring [19] member electrically interposed between the first semiconductor element and the first external terminal, and a fourth wiring member [12] electrically interposed between the second semiconductor element and the second external terminal,
the first external terminal is arranged outside the first semiconductor element as viewed in the thickness direction, and
the second external terminal is arranged outside the second semiconductor element as viewed in the thickness direction [Fig.1];
further comprising an insulating resin member [2] that is formed on the terminal surface, and that is located between the first external terminal [3] and the second external terminal [3] as viewed in the thickness direction [Fig.1];
wherein the first coil and the second coil are located between the first semiconductor element and the second semiconductor element as viewed in the thickness direction [Fig.1];
wherein each of the first coil and the second coil includes two winding portions wound on a plane perpendicular to the thickness direction, and
each of the two winding portions in each of the first coil and the second coil has a current input end and a current output end, and the current input ends or the current output ends of the two winding portions are connected to each other [Figs.2-6].
Claim(s) 4-5 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) in view of Kwon et al. (U.S. Pub. 2017/0125393), as applied above and further in view of Gu et al. (U.S. Pub. 2015/0221714) [Hereafter “Gu”].
Regarding claim 4, Kwon fails to explicitly disclose wherein the base member is made of glass. However, Gu [Fig.2] discloses a semiconductor device wherein the base member [201] is made of glass [Para.69]. It would have been obvious to include wherein the base member is made of glass, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Regarding claims 5 and 8, Osada fails to explicitly disclose the details of the first semiconductor element and the second semiconductor element as claimed. However, Gu [Figs.9-10] discloses a semiconductor device
wherein the first semiconductor element [902/1000] has a first element obverse surface and a first element reverse surface that face away from each other in the thickness direction, and includes a first substrate [1001], a first wiring layer [1002], a first insulating layer [1002], and a first pad [1016],
the first substrate [1001] has a first functional surface on which a first functional circuit is formed, the first wiring layer is electrically connected to the first functional circuit, and is formed on the first functional surface [Appears readily apparent as part of a semiconductor die],
the first insulating layer [1002] covers the first wiring layer, and is formed on the first functional surface, the first pad is electrically connected to the first wiring layer, and
the first insulating layer [1002] and the first pad [1016] are exposed from the first element obverse surface [Fig.10];
wherein the second semiconductor element [904/1000] has a second element obverse surface and a second element reverse surface that face away from each other in the thickness direction, and includes a second substrate, a second wiring layer, a second insulating layer, and a second pad,
the second substrate has a second functional surface on which a second functional circuit is formed, the second wiring layer is electrically connected to the second functional circuit, and is formed on the second functional surface,
the second insulating layer covers the second wiring layer, and is formed on the second functional surface, the second pad is electrically connected to the second wiring layer, and
the second insulating layer and the second pad are exposed from the second element obverse surface [Fig.10].
It would have been obvious to provide the first semiconductor element and the second semiconductor element as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 6 and 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) in view of Kwon et al. (U.S. Pub. 2017/0125393) and Gu et al. (U.S. Pub. 2015/0221714), as applied above and further in view of Kurita et al. (U.S. Pub. 2022/0077081) [Hereafter “Kurita”].
Regarding claims 6 and 9, Osada and Gu fail to explicitly disclose the bonding of the first and second semiconductor elements to the support substrate as claimed. However, Kurita [Fig.11A] discloses a semiconductor device
wherein the first element [C12] obverse surface faces the mounting surface in the thickness direction, and
the first semiconductor element and the support substrate [100] are such that the first pad [127] and the first wiring member [117] are directly joined to each other, and that the first insulating layer [23] and the base member [13] are directly joined to each other;
wherein the second element obverse surface faces the mounting surface in the thickness direction, and
the second semiconductor element and the support substrate are such that the second pad and the second wiring member are directly joined to each other, and that the second insulating layer and the base member are directly joined to each other [Discussed above].
It would have been obvious to provide the direct bonding as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 7 and 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) in view of Kwon et al. (U.S. Pub. 2017/0125393) and Gu et al. (U.S. Pub. 2015/0221714), as applied above and further in view of Cheng et al. (U.S. Pub. 2021/0183844) [Hereafter “Cheng”].
Regarding claims 7 and 10, Gu fails to explicitly disclose wherein the first insulating layer [1002] is made of glass; and wherein the second insulating layer [1002] is made of glass.
However, Cheng [Fig.2F] discloses a semiconductor element wherein the first insulating layer [136/134] is made of glass; and wherein the second insulating layer [136/134] is made of glass [Para.22 discloses the stack of dielectric layers 136 may comprise silicon oxide (glass)]. It would have been obvious to provide wherein the insulating layer is made of glass, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) in view of Kwon et al. (U.S. Pub. 2017/0125393), as applied above and further in view of Takano et al. (U.S. Pub. 2020/0027836) [Hereafter “Takano”].
Regarding claim 15, Osada fails to explicitly disclose the semiconductor device according comprises a heat dissipator. However, Takano [Fig.1] discloses a semiconductor device, wherein the support substrate includes a heat dissipator [22] [Para.65] that is arranged in an area overlapping with the first semiconductor element [20] as viewed in the thickness direction, and that penetrates through the base member [24] in the thickness direction.
It would have been obvious to provide a heat dissipator as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Osada et al. (U.S. Pub. 2015/0137314) in view of Kwon et al. (U.S. Pub. 2017/0125393), as applied above and further in view of Nakashiba (U.S. Pub. 2010/0264515).
Regarding claim 13, Osada discloses the semiconductor device wherein the insulating element [6] includes a third pad [14] connected to the first coil [21], and a fourth pad [13] connected to the second coil [20].
Osada fails to explicitly disclose the third pad, the fourth pad, and the third insulating layer are exposed from the third element reverse surface, and
the insulating element and the support substrate are such that the third pad and the first wiring member are directly joined to each other, the fourth pad and the second wiring member are directly joined to each other, and the third insulating layer and the base member are directly joined to each other.
However, Nakashiba [Figs.3-4] discloses a semiconductor device wherein the third pad, the fourth pad, and the third insulating layer are exposed from the third element reverse surface, and
the insulating element and the support substrate are such that the third pad and the first wiring member are directly joined to each other, the fourth pad and the second wiring member are directly joined to each other, and the third insulating layer and the base member are directly joined to each other.
It would have been obvious to provide the bonding connection as claimed, since it has been held that applying a known technique to a known process in order to yield predictable results would have been obvious. Further, it would have been obvious to try one of the known methods with a reasonable expectation of success. KSR International Co. v. Teleflex Inc., 82 USPQ2d 1385 (2007).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The cited prior art is considered analogous art and discloses at least some of the claimed subject matter of the current invention.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BAC H AU whose telephone number is (571)272-8795. The examiner can normally be reached M-F 9:00AM-6:00PM.
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/BAC H AU/Primary Examiner, Art Unit 2898