DETAILED ACTION
Notice of Pre-AIA or AIA Status
1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
2. This office action is in response to the Amendment filed on July 23, 2026.
Claims 1-3, 5, 8-12, 14-15, and 17-20 are amended. No claims are canceled. No claims are added.
Applicant’s amendments to the specification submitted on July 23, 2026, are acknowledged and objections to the specification are withdrawn.
Applicant’s explanation concerning the objection to the drawings (see Remarks, pages 8-10) have been fully considered and found sufficient to withdraw objections to the drawings set forth in the previous office action.
Applicant’s amendments to the claims overcome the objections and 112(b) rejections set forth in the previous office action and therefore the objections and 112(b) rejections are withdrawn.
Response to Arguments
3. Applicant's arguments filed July 23, 2026, have been fully considered but they are not persuasive.
Regarding independent claim 1, Applicant asserts the Office Action acknowledges that Shaeffer does not teach or suggest “second channels being optical channels” or that “the interface component is configured to convert between first signaling and second signaling.” However, the Office Action merely points out the Shaeffer does not specifically disclose the “second signaling” in particular is optical. From page 8 of the Office Action: “note Shaeffer teaches in ¶[0289] signals may be electrical or optical, and in ¶[0293] optical fibers or pathways may be used, but does not disclose the ‘second signaling’ is optical.” Schaeffer further teaches in ¶[0293] “signal paths described herein include one or more conducting elements, such as a plurality of wires, metal traces (internal or external), signal lines or doped regions (positively or negatively enhanced), as well as one or more optical fibers or optical pathways, singly or in combination.” A combination of electrical and optical signal paths strongly suggests a conversion between the two, although explicit definitions of which paths are electrical and which are optical is lacking.
Applicant further asserts Harris is entirely independent from Shaeffer, and Harris does not teach or suggest the same interface component as Shaeffer. However, given Shaeffer teaches a combination of electrical and optical paths, thereby suggesting conversion (one of ordinary skill in the art would conclude by Buffer Die/Interface, such as 1103 in FIG. 11), and given Harris teaches an optical die providing electrical to optical conversion (FIG. 4; ¶[0079] teaches “conductive pads 408…may be used for distributing electrical signals to and from the DRAM layers 1, 2 . . . N arranged vertically above the optical die 304” (first signaling being electrical); ¶[0081] teaches “Optical transceiver 406 may convert optical signals received through the optical fiber 208 into the electrical domain and vice versa” (second signaling being optical)), a natural point of combination is provided between the two references.
Applicant further asserts the Office Action has not considered independent claim 1 as a whole at least because the Office Action does not set forth any analysis showing how the cited optical transceiver or optical fiber of Harris could possibly be combined with the cited features of Shaeffer. However, for the aforementioned reasons, Examiner disagrees.
Applicant further submits the Office Action does not establish any technical effect from such a combination, let alone such a technical effect "for the purpose of converting optical signals received through an optical fiber into the electrical domain and vice versa." However, according to MPEP § 2145(X)(C), a teaching, suggestion, or motivation to combine references that is found in the prior art is an appropriate rationale for determining obviousness.
Regarding independent claim 10, Applicant asserts Kaeding is entirely independent from Shaeffer, and Kaeding has not been shown to teach or suggest the same second transceiver, let alone the same interface component as Shaeffer. However, as indicated in the previous office action, Schaeffer teaches in ¶[0127] “a transceiver 1875 transmits and receives a first type of signal…while transceivers 1894 (and/or transmit circuit 1893) transmits and receives a second different type of signal,” and in ¶[0293] “signal paths described herein include one or more conducting elements, such as a plurality of wires…as well as one or more optical fibers or optical pathways, singly or in combination.” That is, the “different type(s) of signal(s)” may be electrical and optical, although Schaeffer does not explicitly specify a particular one as optical. Whichever transceiver is chosen to represent the optical transceiver, it becomes a natural combination point for the optical interface of Kaeding (see FIGS. 2A and 2B and ¶[0035] as cited in the previous office action).
Applicant further asserts the Office Action has not considered independent claim 10 as a whole at least because the Office Action does not set forth any analysis showing how the cited active optical component of Kaeding could possibly be combined with the cited features of Shaeffer. However, for the aforementioned reasons, Examiner disagrees.
Applicant further submits the Office Action does not establish any technical effect from such a combination, let alone such a technical effect "for the purpose of converting electrical signals to/from the semiconductor die(s) in the package to optical signals that can be, for example, routed to external devices at higher speeds and/or bandwidths than electrical signals." However, according to MPEP § 2145(X)(C), a teaching, suggestion, or motivation to combine references that is found in the prior art is an appropriate rationale for determining obviousness.
Regarding independent claim 15, Applicant submits Harris does not teach or suggest communicating multiple optical signals or “a set of first terminals configured to communicate first optical signaling and a transceiver configured to communicate second optical signaling,” and therefore, Harris does not teach or suggest “an interface component comprising a set of first terminals configured to communicate first optical signaling and a transceiver configured to communicate second optical signaling,” as recited in amended independent claim 15. Examiner notes Harris teaches more than one optical fiber may be used (see, e.g., ¶[0085] and [0087]), necessitating multiple terminals. While the “terminals” of Harris (die to “outside”) are not identical to the terminals of the instant application (inter-die), they provide sufficient opportunity to combine with Gaul and teach the limitations of the amended claim.
Applicant further asserts the Office Action has not considered independent claim 15 as a whole for at least the reasons that the rejection of independent claim 15 relies on an improper dissection of the features of the claim and an improper evaluation of those features in isolation. However, for the aforementioned reasons, Examiner disagrees.
Applicant further asserts the Office Action does not set forth any analysis showing how the cited optical die of Harris could possibly be combined with the cited optical vias of Gaul, let alone showing why a person having ordinary skill in the art at the time of the invention would have possibly combined the cited optical die of Harris with the cited optical vias of Gaul in the manner alleged because the Office Action does not establish where the cited optical vias of Gaul would be connected in optical die of Harris. However, Examiner believes it is clear to one of ordinary skill in the art that an optical fiber may be substituted with an optical via (or an optical via containing fiber), and Gaul teaches inter-die communication may be facilitated by either an optical or electrical via. Therefore, Harris together with Gaul provide rationale for inter-die optical vias, including the optical die of Harris, in place of inter-die electrical vias.
Applicant further submits the Office Action does not establish any technical effect from such a combination, let alone such a technical effect "for the purpose of enabling surface mounted devices which are stackable." However, according to MPEP § 2145(X)(C), a teaching, suggestion, or motivation to combine references that is found in the prior art is an appropriate rationale for determining obviousness.
Regarding claims 4, 6, and 13, Applicant asserts the Office Action improperly applies the doctrine of routine experimentation because, before a claimed variable range can be deemed obvious under the doctrine of routine experimentation, the variable must be first recognized as a result-effective variable (i.e., a variable that achieves a recognized result). However, it seems clear to Examiner the claimed range was decided upon through some process that deemed this relationship necessary, and no reason for the criticality of this relationship is articulated.
4. Applicant’s arguments, see page 15, filed July 23, 2026, with respect to the rejections of claims 10 and 15 under 35 USC § 103 have been fully considered and are persuasive. Therefore, the rejections have been withdrawn.
Regarding independent claim 10, Applicant submits the previous office action has not shown that Kaeding teaches or suggests the active optical components to be “disposed on a portion of the interface component that extends horizontally from the vertical stack of the plurality of memory dies” as recited in amended independent claim 10. Examiner agrees and the rejection has been withdrawn in view of the amended claim.
Regarding independent claim 15, Applicant further submits the optical vias of Gaul do not teach or suggest “an interface component comprising a set of first terminals configured to communicate first optical signaling and a transceiver configured to communicate second optical signaling” because Gaul is silent on “a transceiver configured to communicate second optical signaling,” as recited in the amended claim. Examiner agrees as Gaul teaches a transmitter at one end of and optical via and a receiver at the other end, and therefore does not explicitly teach a transceiver at either end. However, upon further consideration, a new ground(s) of rejection is made in view of Nakano, et al (US 10141259 B1).
Claim Rejections - 35 USC § 103
5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
6. Claims 1, 7, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Lee (US 20160225414 A1), and further in view of Liao, et al (US 10333623 B1), hereinafter Liao.
Regarding independent claim 1, Harris teaches an apparatus, comprising:
a plurality of memory dies arranged in a vertical stack (FIG. 3, DRAM LAYER 1..N shown stacked vertically); and
an interface component stacked with the plurality of memory dies (FIG. 3, OPTICAL DIE 304 shown stacked with memory dies) and comprising:
a second transceiver, that is configured to communicate optical signaling via a set of optical channels (¶[0081] teaches “optical transceiver 406 may include one or more modulators for encoding bit streams into an optical carrier” and “Optical transceiver 406 may further include one or more photodetectors for extracting data from the received optical signals”),
and to convert between the electrical signaling and the optical signaling (¶[0081] teaches “Optical transceiver 406 may convert optical signals received through the optical fiber 208 into the electrical domain and vice versa.”).
Harris does not teach a plurality of first transceivers coupled with the plurality of memory dies via respective sets of conductive channels, the plurality of first transceivers configured to communicate electrical signaling with the plurality of memory dies via the respective sets of conductive channels (¶[0079] teaches “Pads 408 may be used for distributing electrical signals to and from the DRAM layers 1, 2 . . . N,” but does not teach transceivers are used to do so).
Lee teaches a plurality of first transceivers coupled with the plurality of memory dies via respective sets of conductive channels, the plurality of first transceivers configured to communicate electrical signaling with the plurality of memory dies via the respective sets of conductive channels (FIG. 4; ¶[0074-0077]).
Harris does not teach the second transceiver is on a side of the interface component opposite the plurality of memory dies.
Liao teaches the second transceiver is on a side of the interface component opposite the electrical interface (FIGS. 8D, 8E; optical input/output portion 100b in active surface AS1 is opposite the electrical interface).
Therefore, Harris as modified by Lee and Liao teaches the second transceiver is on a side of the interface component opposite the plurality of memory dies (the memory dies being on the electrical interface side of the interface component).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Lee into the method of Harris to include transceivers coupled with the plurality of memory dies. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of driving signals to the array dies (Lee ¶[0076]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Liao into the method of Harris to include installing the optical fiber adapter in close proximity with the optical transceiver and opposite the electrical interface. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of minimizing optical loss between the optical transceiver and the optical fiber (Liao Col. 15, ll. 1-19).
Regarding claim 7, Harris as modified by Lee and Liao teaches the limitations of claim 1.
Harris further teaches a plurality of conductive vias, each conductive via extending vertically through at least a subset of the plurality of memory dies and configured to carry electrical signaling between a respective memory die and the interface component (FIG. 6, 510; ¶[0005-0006] teach “an optical die bonded to the plurality of stacked memory layers and in electrical communication with at least one of the plurality of stacked memory layers through one or more interconnects…The one or more interconnects may comprise one or more through silicon vias (TSV)).
Regarding claim 9, Harris as modified by Lee and Liao teaches the limitations of claim 1.
Lee further teaches the plurality of memory dies receive power via a third channel separate from the respective sets of conductive channels and the set of optical channels (referencing FIG. 3, ¶[0053] teaches “the conduits 332 may include conduits configured to provide signals other than data signals to the die interconnects 320. For example, the conduits may include conduits configured to provide…a supply voltage signal, or a ground voltage signal to one or more die interconnects.”).
7. Claims 2-6 are rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Lee (US 20160225414 A1), further in view of Liao, et al (US 10333623 B1), hereinafter Liao, and further in view of Fryman, et al (US 20230097800 A1), hereinafter Fryman.
Regarding claim 2, Harris as modified by Lee and Liao teaches the limitations of claim 1.
Harris further teaches wherein a memory subsystem comprises the plurality of memory dies and the interface component (FIG. 3, DRAM Layers 1..N, Optical Die 304), the apparatus further comprising:
a substrate (FIG. 5A, PCB 200), wherein the memory subsystem is disposed on the substrate (FIG. 5A, the die stack is disposed on PCB 200);
an optical fiber (FIG. 5A, 208), wherein the set of second channels comprise the optical fiber; and
a processor disposed on the substrate (FIG. 2, logic unit 204 may be disposed on the same PCB 200 as the Optically Interfaced Stacked Memory (OISM) units, which include Optical Die 304 and DRAM Layers 1..N (FIG. 3, ¶[0076])) and configured to communicate the optical signaling with the second transceiver of the interface component of the memory subsystem using the set of optical channels (i.e., the communication between logic unit 204 and OISM 206 is through Optical Fiber 208 as shown in FIG. 2).
Harris does not teach the optical fiber comprises a plurality of optical fiber cores.
Fryman teaches a multicore optical fiber (FIG. 1B) comprising multiple fiber cores (FIG. 1B, Fiber Core).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Fryman into the method of Harris to include a multicore optical fiber. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of simultaneously transporting optical signals corresponding to data of multiple data lines in parallel (Fryman ¶[0031]).
Regarding claim 3, Harris as modified by Lee, Liao, and Fryman teaches the limitations of claim 2.
Harris further teaches the second transceiver comprises an array of photodetector terminals configured to convert the optical signaling to electrical signaling (¶[0081] teaches “Optical transceiver 406 may further include one or more photodetectors for extracting data from the received optical signals”; see also Fryman FIG. 1A, array 110 of photodetectors 118).
Regarding claim 4, Harris as modified by Lee, Liao, and Fryman teaches the limitations of claim 3.
Harris does not teach the range of a quantity of the plurality of optical fiber cores is greater than a quantity of the photodetector terminals of the array. However, the claimed range will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating this range is critical, which is lacking in the present disclosure. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” – In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). See MPEP 2144.05(II)(A).
Regarding claim 5, Harris as modified by Lee, Liao, and Fryman teaches the limitations of claim 2.
Fryman further teaches the second transceiver comprises an array of light emitting terminals (FIG. 1A, array 106 of emitters 116) configured to convert the electrical signaling to optical signaling (¶[0027]).
Regarding claim 6, Harris as modified by Lee, Liao, and Fryman teaches the limitations of claim 5.
Harris does not teach the range of a quantity of the plurality of optical fiber cores is greater than a quantity of the light emitting terminals of the array. However, the claimed range will not support the patentability of subject matter encompassed by the prior art unless there is evidence indicating this range is critical, which is lacking in the present disclosure. “Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the workable ranges by routine experimentation” – In re Aller, 220 F.2d 454,456,105 USPQ 233, 235 (CCPA 1955). See MPEP 2144.05(II)(A).
8. Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Lee (US 20160225414 A1), further in view of Liao, et al (US 10333623 B1), hereinafter Liao, and further in view of Gaul (US 5618752 A).
Regarding claim 8, Harris as modified by Lee and Liao teaches the limitations of claim 1.
Harris does not teach the plurality of memory dies comprises:
a plurality of optical vias, each optical via extending vertically through at least a subset of the plurality of memory dies and configured to carry second optical signaling between a respective memory die and the interface component.
Gaul teaches in Col. 11, ll. 46-58, referencing FIG. 5, “The optically conductive via 344 is disposed opposite a photoreceiver 345 on die 343 opposite one end of via 344 and a phototransmitting device 346 opposite the other end of via 344 and disposed in die 341…multiple dice 341-343 have vias 348 for electrically connecting the dies 341-343 as well as one or more optical vias 344 that interconnects the dies 341 and 343.”
Therefore, Harris as modified by Lee, Liao, and Gaul teaches a plurality of optical vias, each optical via extending vertically through at least a subset of the plurality of memory dies and configured to carry second optical signaling between a respective memory die and the interface component.
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Gaul into the method of Harris to include an optically conductive via disposed opposite a photoreceiver on a die opposite one end of the via and a phototransmitting device opposite the other end of the via and disposed in another die. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of enabling surface mounted devices which are stackable and for interconnecting surface mountable integrated circuits in the stack (Gaul Col. 1, ll. 53-67).
9. Claims 15 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Gaul (US 5618752 A), and further in view of Nakano, et al (US 10141259 B1), hereinafter Nakano.
Regarding independent claim 15, Harris teaches an apparatus (FIG. 3), comprising:
an interface component (FIGS. 3-4 and 6-7, Optical die 304); and
a plurality of memory dies (FIG. 3, DRAM Layer 1..N; ¶[0076] teaches “Each DRAM layer may be formed from a silicon die”) arranged in vertical stack with the interface component (FIG. 3 shows DRAM layers 1..N stacked vertically (Z-direction) with Optical Die 304).
Harris does not teach a set of first terminals configured to communicate first optical signaling and a transceiver configured to communicate second optical signaling (note ¶[0085] teaches “While this example illustrates a single optical fiber for the transmission and reception of data, separate optical fibers may be used” and ¶[0087] teaches “multiple optical fibers may be interfaced through optical I/O unit 802,” and so Harris at least accommodates a plurality of optical signaling);
each memory die of the plurality of memory dies comprising a respective second terminal configured to communicate the first optical signaling; and
a plurality of optical vias each extending vertically through at least a subset of the plurality of memory dies, and each configured to carry the first optical signaling between the respective second terminal of each memory die and a corresponding first terminal of the set of first terminals of the interface component.
Gaul teaches a set of first terminals configured to communicate first optical signaling, and each memory die of the plurality of memory dies comprising a respective second terminal configured to communicate the first optical signaling (Col. 11, ll. 46-54, referencing FIG. 5, teaches “The optically conductive via 344 is disposed opposite a photoreceiver 345 on die 343 opposite one end of via 344 and a phototransmitting device 346 opposite the other end of via 344 and disposed in die 341. Thus, light emitted by the optical transmitter 346, such as a laser or a light emitting diode, is conducted by the fiber optic material in optically conductive via 344 and coupled to the optical receiver 345, such as a photodiode or photosensor.”); and
a plurality of optical vias each extending vertically through at least a subset of the plurality of memory dies (Col. 11, ll. 55-58 teach “multiple dice 341-343 have vias 348 for electrically connecting the dies 341-343 as well as one or more optical vias 344 that interconnects the dies 341 and 343”), and each configured to carry the first optical signaling between the respective second terminal of each memory die and a corresponding first terminal of the set of first terminals of the interface component (Col. 11, ll. 46-58; FIG. 5).
Harris does not teach a transceiver configured to communicate second optical signaling (note Gaul specifies only a transmitter at one end of an optical via and a receiver at the other end rather than transceivers at one or both ends).
Nakano teaches a transceiver configured to communicate second optical signaling (FIG. 1A, 110; Col. 4, ll. 30-46; see also FIGS. 2A and 2B, 210).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Gaul into the method of Harris to include an optically conductive via disposed opposite a photoreceiver on a die opposite one end of the via and a phototransmitting device opposite the other end of the via and disposed in another die. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of enabling surface mounted devices which are stackable and for interconnecting surface mountable integrated circuits in the stack (Gaul Col. 1, ll. 53-67).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Nakano into the method of Harris to include optical transceivers configured to receive and transmit optical signals by way of optical vias. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of enabling direct two-way signal transfer between the semiconductor dies using optical vias (Nakano Col. 4, ll. 30-46).
Regarding claim 19, Harris as modified by Gaul and Nakano teaches the limitations of claim 15.
Gaul further teaches each terminal of the set of first terminals and each second terminal comprises a respective photodetector configured to convert the first optical signaling to electrical signaling and a respective light emitter configured to convert the electrical signaling to the first optical signaling (Col. 11, ll. 46-54, referencing FIG. 5, teaches “The optically conductive via 344 is disposed opposite a photoreceiver 345 on die 343 opposite one end of via 344 and a phototransmitting device 346 opposite the other end of via 344 and disposed in die 341. Thus, light emitted by the optical transmitter 346, such as a laser or a light emitting diode, is conducted by the fiber optic material in optically conductive via 344 and coupled to the optical receiver 345, such as a photodiode or photosensor.” Note Harris further teaches in ¶[0085], for example, photodetectors convert signals from optical signaling to the electrical signaling.).
Regarding claim 20, Harris as modified by Gaul and Nakano teaches the limitations of claim 15.
Gaul further teaches each optical via comprises a void extending vertically through the subset of the plurality of memory dies corresponding to the respective optical via (Col. 11, ll. 45-46 teaches “Via 344 may optionally be left unfilled, providing an ‘air-filled’ connection,” which constitutes a “void”; FIG. 5 shows optical via 344 extending vertically through a subset of dies).
10. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Gaul (US 5618752 A), further in view of Nakano, et al (US 10141259 B1), hereinafter Nakano, and further in view of Raghuram (US 20060126369 A1).
Regarding claim 16, Harris as modified by Gaul and Nakano teaches the limitations of claim 15.
Harris does not teach a second terminal of a memory die of the plurality of memory dies is coupled with a multiplexer configured to selectively output electrical signaling from a plurality of memory channels of the memory die.
Raghuram teaches a second terminal of a memory die (FIG. 4, e.g., DQ0 of Memory Die 4-0) of the plurality of memory dies (FIG. 4, Memory Dies 4-0..4-4) is coupled with a multiplexer (FIG. 4, 8A) configured to selectively output electrical signaling from a plurality of memory channels of the memory die (¶[0039] teaches “Each memory die 4-i is connected via a corresponding internal data bus 7-i to a DQ multiplexer/demultiplexer 8A…The internal data busses DQ-busses 7-i are provided…for reading data out of the memory cells of the stacked DRAM memory dies 4-i.” ¶[0040] teaches “the multiplexer/demultiplexer 8A which switches the internal data lines or data bus 7-i of a selected DRAM memory die...”).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Raghuram into the method of Harris to include a multiplexer coupled to the memory channels of one or more memory dies. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of switching the internal data lines or data bus of a selected memory die for output (Raghuram ¶[0040]).
11. Claims 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Harris, et al (US 20210118853 A1), hereinafter Harris, in view of Gaul (US 5618752 A), further in view of Nakano, et al (US 10141259 B1), hereinafter Nakano, further in view of Gu, et al (US 20190214365 A1), hereinafter Gu, and further in view of Fryman, et al (US 20230097800 A1), hereinafter Fryman.
Regarding claim 17, Harris as modified by Gaul and Nakano teaches the limitations of claim 15.
Harris does not teach an optical via of the plurality of optical vias comprises a plurality of optical fibers, each optical fiber configured to carry the optical signaling between a respective second terminal of a plurality of second terminals of a memory die associated with the optical via.
Gu teaches in ¶[0054], referencing FIG. 2, “the vias 226 may include an optical via, such as, for example…an optical fiber…”
Fryman teaches a multicore optical fiber (FIG. 1B) comprising multiple fiber cores (FIG. 1B, Fiber Core).
Therefore, Harris as modified by Gaul, Nakano, Gu, and Fryman teaches an optical via of the plurality of optical vias comprises a plurality of optical fibers, each optical fiber configured to carry the optical signaling between a respective second terminal of a plurality of second terminals of a memory die associated with the optical via (i.e., the optical via of Gaul implemented as the optical fiber of Gu, which is modified to include a plurality of cores by Fryman).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Gu into the method of Harris to include an optical fiber as an optical via. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of allowing high speed communication between the two elements without the need for communication over a bus or an external interface (Gu ¶[0053]).
It would have been obvious to one of ordinary skill of the art before the time of the effective filing date of the invention to incorporate the teachings of Fryman into the method of Harris to include a multicore optical fiber. The ordinary artisan would have been motivated to modify Harris in the above manner for the purpose of simultaneously transporting optical signals corresponding to data of multiple data lines in parallel (Fryman ¶[0031]).
Regarding claim 18, Harris as modified by Gaul, Nakano, Gu, and Fryman teaches the limitations of claim 17.
Gaul further teaches each second terminal of the plurality of second terminals of the memory die is configured to convert between the optical signaling and first electrical signaling associated with a respective memory channel of a plurality of memory channels of the memory die (Col. 11, ll. 46-54, referencing FIG. 5, teaches “The optically conductive via 344 is disposed opposite a photoreceiver 345 on die 343 opposite one end of via 344 and a phototransmitting device 346 opposite the other end of via 344 and disposed in die 341. Thus, light emitted by the optical transmitter 346, such as a laser or a light emitting diode, is conducted by the fiber optic material in optically conductive via 344 and coupled to the optical receiver 345, such as a photodiode or photosensor.” Note Harris further teaches in ¶[0085], for example, photodetectors convert signals from optical signaling to the electrical signaling.).
Allowable Subject Matter
12. Claims 10-14 are allowed.
13. The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 10, the prior art made of record and considered pertinent to the applicant’s disclosure does not teach or suggest the claimed limitation of a second transceiver, on a side of the interface component the same as the plurality of memory dies, that is configured to communicate second optical signaling via a set of optical channels and to convert between the electrical signaling and the optical signaling, the second transceiver disposed on a portion of the interface component that extends horizontally from the vertical stack of the plurality of memory dies. Claims 11-14 depend on claim 10.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRADLEY COON whose telephone number is (571)270-0740. The examiner can normally be reached M-F 8am-5pm (Eastern).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, AMIR ZARABIAN can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/B.S.C./Examiner, Art Unit 2827
/AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
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