Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Claims 1-20 are pending and have been examined.
Priority
Acknowledgment is made of applicant's claim for foreign benefit based on JP2021-140762 filed on 08/31/2021.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as (30A; Fig 2B; [0128]) = (element 30A; Figure No. 2B; Paragraph No. [0128]). For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. These conventions are used throughout this document.
Claims 1-7, 17, 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Ichiyanagi et al. (JP2005-064169A – hereinafter Ichiyanagi) in view of Ichiryu et al. (US 20170352603 A1 - hereinafter Ichiryu).
Regarding Claim 1, Ichiyanagi teaches a composite electronic component (60 – Figs. 1-3) including a plurality of circuit layers, each including an electronic component, which are laminated, the composite electronic component (see the entire document; Fig. 2; specifically, ([0017] - [0020]), and as cited below), comprising:
a first circuit layer (30 – Figs. 1-3 – [0017]);
a second circuit layer (54 – [0018]);
a electronic component (10 – [0017]) between the first circuit layer (30 – [0017]) and the second circuit layer (54) and including a plurality of via electrodes (15 – [0022]) extending through a body mainly including ceramic and being exposed at a corresponding one of a main surface on one side and a main surface on another side (upper and lower surfaces of 15); and
a sealing resin (52 – [0018]) covering at least the electronic component at a location between the first circuit layer (30) and the second circuit layer (54); wherein
at least one electronic component (32) included in the first circuit layer (30) and at least one electronic component (57) included in the second circuit layer (54) are electrically connected by the plurality of via electrodes (15) of the electronic component (10).
While Ichiyanagi teaches the electronic component (10) is an insulator ([0020]), Ichiyanagi does not expressly disclose the electronic component is ceramic.
It is well known in the art to form substrates/electronic components of ceramic as is also taught by Ichiryu (Ichiryu – [0065] – “ceramic substrates 20”).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to integrate the forming of a ceramic substrate as taught by Ichiryu into Ichiyanagi.
An ordinary artisan would have been motivated to integrate Ichiryu structure into Ichiyanagi structure in the manner set forth above for, at least, for the obvious benefit of improved heat control and durability.
Regarding claim 2, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 1, wherein the ceramic electronic component is a multilayer ceramic capacitor (Ichiyanagi 12 – [0020]) including a plurality of dielectric layers (14 – [0021]) and a plurality of inner electrodes (13 – [0021]) alternately laminated; and the plurality of via electrodes (15) are electrically connected to a portion of the plurality of inner electrodes (13).
Regarding claim 3, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 1, wherein the plurality of via electrodes (15) include three or more of the via electrodes (Ichiyanagi - see Fig. 2).
Regarding claim 4, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 1, wherein the plurality of via electrodes (15) include nine or more via electrodes (Fig. 3).
Regarding claim 5, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 1, wherein the plurality of via electrodes are arranged in a matrix (Fig. 3).
Regarding claim 6, the combination of Ichiyanagi and Ichiryu teaches claim 1 from which claim 6 depends.
But, the combination of Ichiyanagi and Ichiryu does not expressly disclose wherein a thickness of the ceramic electronic component is about 30 µm to about 100 µm.
The instant application specification contains no disclosure of either the critical nature of the claimed relative thickness i.e., “wherein a thickness of the ceramic electronic component is about 30 µm to about 100 µm” or of any unexpected results arising therefrom. Applicant has not disclosed that having a thickness of the ceramic electronic component is about 30 µm to about 100 µm, solves any stated problem or is for any particular purpose. "Where the issue of criticality is involved, the applicant has the burden of establishing his position by a proper showing of the facts upon which he relies." - In re Scherl, 156 F.2d 72, 74-75, 70 USPQ 204, 205 (CCPA 1946), see MPEP 2144.05.III.A.
Regarding claim 7, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 1, wherein the first circuit layer (30) includes a first wire and a first electronic component (since 30 is a chip, it has at least an wire and one transistor); and the second circuit layer (54) includes a second wire (56) and a second electronic component (57).
Regarding claim 17, the combination of Ichiyanagi and Ichiryu teaches the composite electronic component according to claim 2, wherein each of the plurality of dielectric layers (14) includes BaTiO3, CaTiO3, SrTiO3, SrZrO3, or CaZrO3 as a main component ([0021]).
Regarding claim 19, the combination of Ichiyanagi and Ichiryu teaches claim 1 from which claim 6 depends.
But the combination of Ichiyanagi and Ichiryu does not expressly disclose wherein a thickness of the ceramic electronic component is about 30 µm to about 100 µm.
The instant application specification contains no disclosure of either the critical nature of the claimed relative thickness i.e., “wherein the ceramic electronic component has a dimension in a length direction of about 0.3 mm to about 3.0 mm, a dimension in a width direction of about 0.3 mm to about 3.0 mm, and a dimension in a thickness direction of about 30 µm to about 100 µm” or of any unexpected results arising therefrom. Applicant has not disclosed that having the ceramic electronic component has a dimension in a length direction of about 0.3 mm to about 3.0 mm, a dimension in a width direction of about 0.3 mm to about 3.0 mm, and a dimension in a thickness direction of about 30 µm to about 100 µm, solves any stated problem or is for any particular purpose. "Where the issue of criticality is involved, the applicant has the burden of establishing his position by a proper showing of the facts upon which he relies." - In re Scherl, 156 F.2d 72, 74-75, 70 USPQ 204, 205 (CCPA 1946), see MPEP 2144.05.III.A.
Regarding claim 20, the combination of Ichiyanagi and Ichiryu teaches claim 1 from which claim 6 depends.
But, the combination of Ichiyanagi and Ichiryu does not expressly disclose wherein each of the plurality of inner electrodes includes Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy including at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au.
The instant application specification contains no disclosure of either the critical nature of the claimed relative composition i.e., “wherein each of the plurality of inner electrodes includes Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy including at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au” or of any unexpected results arising therefrom. Applicant has not disclosed that wherein each of the plurality of inner electrodes includes Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, or an alloy including at least one of Ni, Cu, Ag, Pd, Pt, Fe, Ti, Cr, Sn, or Au, solves any stated problem or is for any particular purpose. "Where the issue of criticality is involved, the applicant has the burden of establishing his position by a proper showing of the facts upon which he relies." - In re Scherl, 156 F.2d 72, 74-75, 70 USPQ 204, 205 (CCPA 1946), see MPEP 2144.05.III.A.
Allowable Subject Matter
Claims 8-16, 18 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is the Examiner’s Reasons for Allowance:
The prior art fails to disclose and would not have rendered obvious:
Regarding claim 8: The composite electronic component according to claim 7, wherein the first circuit layer includes a first insulating resin between the first electronic component and the ceramic electronic component.
Claims 9, 15 depend from claim 8.
Regarding claim 10: The composite electronic component according to claim 7, wherein the first wire electrically connects the first electronic component to the ceramic electronic component.
Regarding claim 11: The composite electronic component according to claim 7, wherein the second circuit layer includes a second insulating resin between the second electronic component and the ceramic electronic component.
Claims 12, 16 depend from claim 11.
Regarding claim 13: The composite electronic component according to claim 7, wherein the second wire electrically connects the second electronic component to the ceramic electronic component.
Regarding claim 14: The composite electronic component according to claim 7, wherein each of the first and second wires includes Cu.
Regarding claim 18: The composite electronic component according to claim 17, wherein each of the plurality of dielectric layers includes an Mn compound, an Fe compound, a Cr compound, a Co compound, or an Ni compound as a subcomponent.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHAMMAD A. RAHMAN whose telephone number is (571) 270-0168 and email is mohammad.rahman5@uspto.gov. The examiner can normally be reached on Mon-Fri 8:00-5:00 PM.
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/MOHAMMAD A RAHMAN/
Primary Examiner, Art Unit 2898