DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election of Invention I in the reply filed on 09/30/2025 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 8 - 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over KIWANAMI et al. (US 20140360765 A1, “KIWANAMI”) in view of KIM et al. (US 20220052080 A1, “KIM”)
Regarding claim 8, KIWANAMI discloses (Fig. 1, 7A, 7B) an electronic device (10) comprising: a first substrate; a second substrate; an adhesive layer arranged between the first substrate and the second substrate (See annotated figure below); and a lateral wiring arranged on the side surface of the first substrate and the side surface of the adhesive layer, wherein the lateral wiring having a first portion and a second portion (See annotated figure below); wherein the first portion at least partially overlaps the adhesive layer, and the second portion overlaps the side surface of the first substrate, and the first portion and the second portion respectively have a first edge and a second edge extending along a first direction, the first edge and the second edge are separated from each other, and the first direction is the arrangement direction of the first substrate and the second substrate (See annotated figure below).
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KIWANAMI is silent on the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer.
However, KIM (Fig. 4A-B, 12) discloses the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A).
KIWANAMI and KIM are both considered to be analogous to the claimed invention because they are in the same field of electronic device. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified KIWANAMI to incorporate the teachings of KIM and provide the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A). Doing so would improve wiring density, connection reliability and enhances structural stability and durability (para [0096] and [0139]).
Regarding claim 9, KIWANAMI in view of KIM discloses the electronic device according to claim 8, wherein KIWANAMI further discloses that the first portion (39 made of copper) and the second portion(57 made of copper alloy) of the lateral wiring comprise different materials (para [0034] and [0049]).
Regarding claim 10, KIWANAMI in view of KIM discloses the electronic device according to claim 8, wherein KIWANAMI further discloses that the first edge and the second edge are separated from each other by a first pitch, and the first pitch is between 5 and 15 microns (The first pitch can be defined as (the diameter of 39 minus the diameter of 57) divided by 2. From para [0034] and [0049] d39 is from 50 to 100 microns and d57 is from 50 to 75. If d39 = 100 and d57 = 75, the first pitch will be 12.5). .
Regarding claim 11, KIWANAMI in view of KIM discloses the electronic device according to claim 10, wherein KIWANAMI further discloses the first portion and the second portion respectively have a third edge and a fourth edge extending along the first direction, the first edge is opposite to the third edge, the second edge is opposite to the fourth edge, and the third edge and the fourth edge are separated from each other (See annotated figure below).
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Regarding claim 12, KIWANAMI in view of KIM discloses the electronic device according to claim 11, wherein KIWANAMI further discloses the third edge and the fourth edge are separated from each other by a second pitch, and the second pitch is between 5 and 15 microns (The second pitch can be defined as (the diameter of 39 minus the diameter of 57) divided by 2. From para [0034] and [0049] d39 is from 50 to 100 microns and d57 is from 50 to 75. If d39 = 100 and d57 = 75, the second pitch will be 12.5). .
Regarding claim 13, KIWANAMI in view of KIM discloses the electronic device according to claim 12, wherein the difference between the first pitch and the second pitch is greater than or equal to zero (The first pitch and the second pitch are equal, so the difference is zero).
Regarding claim 14, KIWANAMI in view of KIM discloses the electronic device according to claim 8, wherein KIWANAMI further discloses the first portion is separated from the edge of the first substrate far from the second substrate by a first distance greater than 80 microns (the thickness of each insulating layer 51, 53 and 55 can be up to 35 microns, which combined is more than 80 microns).
Regarding claim 15, KIWANAMI in view of KIM discloses the electronic device according to claim 8, wherein KIWANAMI further discloses the first portion is separated from the edge of the second substrate far from the second substrate by a second distance greater than 80 microns (the thickness of each insulating layer 51, 53 and 55 can be up to 35 microns, which combined is more than 80 microns).
Regarding claim 16, KIWANAMI in view of KIM discloses the electronic device of claim 8, wherein KIWANAMI further discloses a length of the first portion is greater than 600 microns (See para [0031]).
Regarding claim 17, KIWANAMI discloses (Fig. 1, 7A, 7B) an electronic device comprising: a first substrate; a second substrate; an adhesive layer arranged between the first substrate and the second substrate (See annotated figure below); and a lateral wiring arranged on the side surface of the first substrate and the side surface of the adhesive layer, the lateral wiring having a first portion and a second portion; wherein the first portion at least partially overlaps the adhesive layer, and the second portion overlaps a part of the side surface of the first substrate (See annotated figure below), and the region of the side surface of the first substrate without the lateral wiring has a third region adjacent to the first portion and a fourth region adjacent to the second portion, and there is a height difference between the third region and the fourth region.
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KIWANAMI is silent on the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer, and the region of the side surface of the first substrate without the lateral wiring has a third region adjacent to the first portion and a fourth region adjacent to the second portion, and there is a height difference between the third region and the fourth region.
However, KIM (Fig. 4A-B, 12) discloses the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A), and the region of the side surface of the first substrate without the lateral wiring has a third region (G1) adjacent to the first portion and a fourth region (G2) adjacent to the second portion, and there is a height difference between the third region and the fourth region (See para [0099]).
KIWANAMI and KIM are both considered to be analogous to the claimed invention because they are in the same field of electronic device. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified KIWANAMI to incorporate the teachings of KIM and provide the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A), and the region of the side surface of the first substrate without the lateral wiring has a third region (G1) adjacent to the first portion and a fourth region (G2) adjacent to the second portion, and there is a height difference between the third region and the fourth region (See para [0099]). Doing so would improve wiring density, connection reliability and enhances structural stability and durability (para [0096] and [0139]).
Claim(s) 8 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over OSAWA et al. (US 20180031933 A1, “OSAWA”) in view of KIM et al. (US 20220052080 A1, “KIM”)
Regarding claim 8, OSAWA discloses (Fig. 6, 10, 12) an electronic device comprising: a first substrate; a second substrate; an adhesive layer (SE) arranged between the first substrate and the second substrate (See annotated figure below); and a lateral wiring arranged on the side surface of the first substrate and the side surface of the adhesive layer, wherein the lateral wiring having a first portion and a second portion (See annotated figure below); wherein the first portion at least partially overlaps the adhesive layer, and the second portion overlaps the side surface of the first substrate, and the first portion and the second portion respectively have a first edge and a second edge extending along a first direction, the first edge and the second edge are separated from each other, and the first direction is the arrangement direction of the first substrate and the second substrate (See annotated figure below).
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OSAWA is silent on the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer.
However, KIM (Fig. 4A-B, 12) discloses the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A).
OSAWA and KIM are both considered to be analogous to the claimed invention because they are in the same field of electronic device. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified OSAWA to incorporate the teachings of KIM and provide the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A). Doing so would improve wiring density, connection reliability and enhances structural stability and durability (para [0096] and [0139]).
Regarding claim 17, OSAWA discloses (Fig. 6, 10, 12) an electronic device comprising: a first substrate; a second substrate; an adhesive layer (SE) arranged between the first substrate and the second substrate (See annotated figure below); and a lateral wiring arranged on the side surface of the first substrate and the side surface of the adhesive layer, the lateral wiring having a first portion and a second portion; wherein the first portion at least partially overlaps the adhesive layer, and the second portion overlaps a part of the side surface of the first substrate (See annotated figure below), and the region of the side surface of the first substrate without the lateral wiring has a third region adjacent to the first portion and a fourth region adjacent to the second portion, and there is a height difference between the third region and the fourth region.
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OSAWA is silent on the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer, and the region of the side surface of the first substrate without the lateral wiring has a third region adjacent to the first portion and a fourth region adjacent to the second portion, and there is a height difference between the third region and the fourth region.
However, KIM (Fig. 4A-B, 12) discloses the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A), and the region of the side surface of the first substrate without the lateral wiring has a third region (G1) adjacent to the first portion and a fourth region (G2) adjacent to the second portion, and there is a height difference between the third region and the fourth region (See para [0099]).
OSAWA and KIM are both considered to be analogous to the claimed invention because they are in the same field of electronic device. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified OSAWA to incorporate the teachings of KIM and provide the wiring being arranged on the side surface of the first substrate and the side surface of the adhesive layer (See Fig. 4A), and the region of the side surface of the first substrate without the lateral wiring has a third region (G1) adjacent to the first portion and a fourth region (G2) adjacent to the second portion, and there is a height difference between the third region and the fourth region (See para [0099]). Doing so would improve wiring density, connection reliability and enhances structural stability and durability (para [0096] and [0139]).
Allowable Subject Matter
Claim 18 - 20 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIDI MOHAMED MAIGA whose telephone number is (703)756-1870. The examiner can normally be reached Monday - Friday 8 am 5 pm.
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/SIDI M MAIGA/Examiner, Art Unit 2847
/STANLEY TSO/ Primary Examiner, Art Unit 2847