Prosecution Insights
Last updated: October 25, 2026
Application No. 18/406,634

LIGHT EMITTING DEVICES HAVING ALUMINUM INDIUM GALLIUM PHOSPHIDE DIE WITH EMBEDDED CONTACTS

Final Rejection §102§103
Filed
Jan 08, 2024
Examiner
AHMADI, MOHSEN
Art Unit
2896
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Lumileds LLC
OA Round
2 (Final)
87%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 87% — above average
87%
Career Allowance Rate
410 granted / 472 resolved
+18.9% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
23 currently pending
Career history
501
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
51.4%
+11.4% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
15.3%
-24.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 472 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Applicants’ response of 08/04/2026 has been entered in the record and considered. With respect to the rejection claims 35 USC 102 (a)(1) is withdrawn in view of applicants’ amendments. The following new rejection to claims 1-4 and 6-20 are made under 35 USC 103. Claims 1-4 and 6-20 are under consideration. Claims 1-4 and 6-20 are rejected. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-4, 6-7 and 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # US Pub # 2021/0050475 to Tsai et al. (Tsai). Regarding independent claim 1, Tsai discloses a vertical thin-film (VTF) light emitting diode (LED) (Figs. 4-10 and ¶0032-0053 and Table 1) comprising: an epitaxial stack (411-414; Table 1) comprising a plurality of group Ill-V semiconductor material layers, including binary, ternary, and quaternary alloys of gallium (Ga), aluminum (AI), indium (In), and phosphorus (P) (Table: binary GaP, ternary AllnP, quaternary AIGaInP)and a multiple quantum well layer (412) on a substrate (400), wherein at least one of the plurality of group Ill-V semiconductor material layers is a low confinement layer (LCL) (see examiner’s mark-up below) comprising aluminum indium gallium phosphide (AIInGaP), wherein the low confinement layer (LCL) has a thickness (see Table 1: and examiner’s mark-up below), Regarding the claimed limitation wherein the low confinement layer (LCL) has a thickness in a range from 2 µm to 5 µm, Tsai discloses in (Table 1 and examiner’s mark-up below) that the LCL is formed from the identified constituent sublayers having respective disclosed thickness ranges. Taking the minimum disclosed thicknesses of the constituent sublayers results in a minimum total LCL thickness of approximately 50 nm (0.05 µm), while taking the maximum disclosed thicknesses results in a maximum total LCL thickness of approximately 7000 nm (7 µm). Thus, Tsai teaches an LCL having a total thickness range of approximately 0.05 µm to 7 µm, which encompasses and overlaps the claimed range of 2 µm to 5 µm. Accordingly, the claimed LCL thickness range of 2 µm to 5 µm would have been obvious to one of ordinary skill in the art because the claimed range falls within the broader range taught by Tsai. A prior-art range that overlaps or encompasses a narrower claimed range is sufficient to establish a prima facie case of obviousness. See MPEP § 2144.05; In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). Furthermore, Tsai associates the thicknesses of the constituent semiconductor layers with their respective functions within the LED structure. Therefore, layer thickness would have been recognized as a result-effective variable, and selecting an appropriate LCL thickness within Tsai’s disclosed range would have involved no more than routine experimentation and optimization by one of ordinary skill in the art to obtain the desired balance of carrier confinement and optical performance. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to select an LCL thickness within the range of 2 µm to 5 µm from the broader thickness range taught by Tsai, because doing so would merely involve selecting a value from an overlapping prior-art range and optimizing a known result-effective variable to obtain predictable LED performance. Applicant has not provided persuasive evidence that the claimed range of 2 µm to 5 µm is critical relative to Tsai’s disclosed range or that the claimed range produces unexpected results sufficient to overcome the prima facie case of obviousness. wherein the LCL is directly on a first aluminum gallium indium phosphide (AIInGaP) semiconductor layer and an aluminum indium phosphide (AIInP) n-contact semiconductor layer is directly on the LCL; “Regarding the limitation “wherein the LCL is directly on a first aluminum gallium indium phosphide (AlInGaP) semiconductor layer and an aluminum indium phosphide (AlInP) n-contact semiconductor layer is directly on the LCL,” Tsai teaches the claimed arrangement as shown in Fig. 6 in combination with Table 1. Specifically, Fig. 6 or Fig. 10 shows first-type semiconductor layer 411, MQW active layer 412, and second-type semiconductor layer 413 arranged sequentially and directly adjacent to one another, with active layer 412 disposed between layers 411 and 413. As identified in Table 1 and the Examiner’s Mark-up below, the portion of layer 411 immediately adjacent to active layer 412 comprises AlInGaP, while layer 413 includes an AlInP n-type semiconductor sublayer directly adjacent to active layer 412. When the claimed LCL is mapped to MQW active layer 412 together with the selected adjacent portion of layer 413, the AlInGaP semiconductor layer of layer 411 is directly on one side of the LCL and the AlInP n-type semiconductor layer of layer 413 is directly on the opposite side of the LCL. Accordingly, Fig. 6 and Table 1 collectively teach the claimed structural relationship.”; a first dielectric layer (Fig. 10: 440) on the epitaxial stack (411-414); an n-contact (422) and a p-contact (421) within the first dielectric layer (440); and a metal layer (431) on the first dielectric layer (Fig. 10: 440) in electrical contact with the plurality of group Ill-V semiconductor material layers (¶0047). PNG media_image1.png 822 523 media_image1.png Greyscale Regarding claim 2, Tsai discloses wherein at least one additional layer of the plurality of group Ill-V semiconductor material layers comprise an aluminum indium phosphide (AIInP) layer (see Table 1). Regarding claim 3, Tsai discloses wherein at least one additional layer of the plurality of group Ill-V semiconductor material layers comprise an aluminum indium gallium phosphide (AIInGaP) layer (see Table 1). Regarding claim 4, Tsai discloses wherein the low confinement layer (LCL) (see Table 1), but Tsai does not explicitly disclose wherein the low confinement layer (LCL) contains in a range of from about 30% to about 40% aluminum indium gallium phosphide (AIInGaP) (see Table 1). However, Tsai does teach (Table 1) a low confinement layer (LCL) (barrier sublayer serving for optical and carrier confinement) comprising aluminum indium gallium phosphide (AIInGaP). It would have been obvious to one of ordinary skill in the art at the time of the invention to have provided the low confinement layer (LCL) of Tsai to contain in a range of from about 30% to about 40% aluminum indium gallium phosphide (AIInGaP). The motivation to do so is that the low confinement layer (LCL) contains in a range of from about 30% to about 40% aluminum indium gallium phosphide (AIInGaP) provides the predictable result of tuning the bandgap and refractive index to balance sufficient carrier confinement and to reduce optical absorption which is necessary of Tsai. While the cited prior art does not explicitly disclose the particular claimed value, the teachings therein would have led one of ordinary skill in the art at the time of invention to discover the claimed value during routine experimentation and optimization. The Applicant has not presented persuasive evidence that the claimed values are for a particular purpose that is critical to the overall claimed invention (i.e. the invention would not work without the specific claimed values). Also, the applicant has not shown that the claimed values produce a result that was new or unexpected enough to patentably distinguish the claimed invention over the cited prior art. Thus, because it has been held that where “the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation" (see MPEP 2144.05; In re Aller, 220 F.2d 454, 456, 105 USPQ 223, 225 (CCPA 1955)), it would have been obvious to add the claimed values to the rest of the claimed invention. Regarding claim 6, Tsai discloses wherein one of the plurality of group Ill-V semiconductor material layers comprise an aluminum (AI) layer (see Table 1). Regarding claim 7, Tsai discloses wherein the metal layer (431) comprises one or more of aluminum (AI), platinum (Pt), and silver (Ag) (¶0052). Regarding claim 9, Tsai discloses a bonding layer (Fig. 10: 432). Regarding claim 10, Tsai discloses wherein the P-contact (421) comprises an alloy of gold (Au) and zinc (Zn) (¶0050). Regarding claim 11, Tsai discloses herein the N-contact (422) comprises an alloy of gold (Au) and germanium (Ge) (¶0050). Regarding claim 12, Tsai discloses wherein the first dielectric layer (440) comprises one or more of silicon oxide (SiOx), titanium oxide (TiOx), niobium oxide (NbyOx), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (AIOx), and aluminum nitride (AIN) (¶0051). Claims 8, 13, 15-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2018/0138366 to Sung et al. (Sung) in view of US Pub # 2021/0050475 to Tsai et al. (Tsai). Regarding claim 8, Tsai discloses all of the limitations of claim 7 from which this claim depends. Tsai fails to explicitly disclose a second dielectric layer on the metal layer. Sung teaches a second dielectric layer (215c) on the metal layer (210a) (¶0066-0074 and Figs. 4a-4b). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have utilized the vertical thin-film (VTF) LED of Tsai with the second dielectric layer as taught by Sung so as to expose the contact electrode inside the connection groove such that the contact electrode and the bonding electrode can be electrically connected to each other inside the connection groove (¶0073). Regarding independent claim 13, Sung discloses a method of manufacturing a vertical thin-film (VTF) LED (Figs. 6a-6i and ¶0093-0106), the method comprising: sequentially forming a plurality of group Ill-V semiconductor material layers (205a, 205b, 205c), including binary, ternary, and quaternary alloys of gallium (Ga), aluminum (AI), indium (In), and phosphorus (P) (¶0031: quaternary AllnGaP layer 105a; ¶0035: ternary AlGaP and binary GaP) and a multiple quantum well layer (¶0035: 105c) to form an epitaxial stack (205) on a substrate (225), wherein at least one of the plurality of group Ill-V semiconductor material layers is a low confinement layer (LCL) (205a) comprising aluminum indium gallium phosphide (AIInGaP); wherein the low confinement layer (LCL) has a thickness (see Table 1: and examiner’s mark-up below), Regarding the claimed limitation wherein the low confinement layer (LCL) has a thickness in a range from 2 µm to 5 µm, Tsai discloses in (Table 1 and examiner’s mark-up below) that the LCL is formed from the identified constituent sublayers having respective disclosed thickness ranges. Taking the minimum disclosed thicknesses of the constituent sublayers results in a minimum total LCL thickness of approximately 50 nm (0.05 µm), while taking the maximum disclosed thicknesses results in a maximum total LCL thickness of approximately 7000 nm (7 µm). Thus, Tsai teaches an LCL having a total thickness range of approximately 0.05 µm to 7 µm, which encompasses and overlaps the claimed range of 2 µm to 5 µm. Accordingly, the claimed LCL thickness range of 2 µm to 5 µm would have been obvious to one of ordinary skill in the art because the claimed range falls within the broader range taught by Tsai. A prior-art range that overlaps or encompasses a narrower claimed range is sufficient to establish a prima facie case of obviousness. See MPEP § 2144.05; In re Peterson, 315 F.3d 1325, 1330 (Fed. Cir. 2003). Furthermore, Tsai associates the thicknesses of the constituent semiconductor layers with their respective functions within the LED structure. Therefore, layer thickness would have been recognized as a result-effective variable, and selecting an appropriate LCL thickness within Tsai’s disclosed range would have involved no more than routine experimentation and optimization by one of ordinary skill in the art to obtain the desired balance of carrier confinement and optical performance. Therefore, it would have been obvious to one of ordinary skill in the art at the time of the invention to select an LCL thickness within the range of 2 µm to 5 µm from the broader thickness range taught by Tsai, because doing so would merely involve selecting a value from an overlapping prior-art range and optimizing a known result-effective variable to obtain predictable LED performance. Applicant has not provided persuasive evidence that the claimed range of 2 µm to 5 µm is critical relative to Tsai’s disclosed range or that the claimed range produces unexpected results sufficient to overcome the prima facie case of obviousness. wherein the LCL is directly on a first aluminum gallium indium phosphide (AIInGaP) semiconductor layer and an aluminum indium phosphide (AIInP) n-contact semiconductor layer is directly on the LCL; “Regarding the limitation “wherein the LCL is directly on a first aluminum gallium indium phosphide (AlInGaP) semiconductor layer and an aluminum indium phosphide (AlInP) n-contact semiconductor layer is directly on the LCL,” Tsai teaches the claimed arrangement as shown in Fig. 6 in combination with Table 1. Specifically, Fig. 6 or Fig. 10 shows first-type semiconductor layer 411, MQW active layer 412, and second-type semiconductor layer 413 arranged sequentially and directly adjacent to one another, with active layer 412 disposed between layers 411 and 413. As identified in Table 1 and the Examiner’s Mark-up below, the portion of layer 411 immediately adjacent to active layer 412 comprises AlInGaP, while layer 413 includes an AlInP n-type semiconductor sublayer directly adjacent to active layer 412. When the claimed LCL is mapped to MQW active layer 412 together with the selected adjacent portion of layer 413, the AlInGaP semiconductor layer of layer 411 is directly on one side of the LCL and the AlInP n-type semiconductor layer of layer 413 is directly on the opposite side of the LCL. Accordingly, Fig. 6 and Table 1 collectively teach the claimed structural relationship.”; depositing a first dielectric layer (Fig. 6B: 215a) on the epitaxial stack (205); removing (Fig. 6B and ¶0095: etching step) a portion of the first dielectric layer (215a) to form openings (Fig. 6B: area between 215a) in the dielectric layer (215a), the openings exposing the plurality of group Ill-V semiconductor material layers; forming a metal layer (210a) on the first dielectric layer in electrical contact with the plurality of group Ill-V semiconductor material layers; forming a bond pad (Fig. 6e: 210b); depositing a second dielectric layer (Fig. 6F: 215c) on the metal layer; and forming an N-contact (Fig. 6c: 220a) on the epitaxial stack. Sung fails to explicitly disclose forming a P-contact in the openings in the dielectric layer. Tsai discloses forming a P-contact (Fig. 9: 421) in the openings in the dielectric layer (440). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the opening of Sung with a P-contact as taught by Tsai so as to be in ohmic contact with the epitaxial structure (¶0050). PNG media_image2.png 1284 817 media_image2.png Greyscale Regarding claim 15, Sung discloses all of the limitations of claim 13 from which this claim depends. Sung fails to explicitly disclose wherein at least one additional layer of the plurality of group Ill-V semiconductor material layers comprise an aluminum indium phosphide (AIInP) layer. Tsai discloses wherein at least one of the plurality of group Ill-V semiconductor material layers comprise an aluminum indium phosphide (AIInP) layer (¶0023). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided at least one of the plurality of group Ill-V semiconductor material layers of Sung with an aluminum indium phosphide (AIInP) layer as taught by Tsai so as to provide electrons (¶0023). Regarding claim 16, Sung discloses wherein at least one of the plurality of group Ill-V semiconductor material layers comprise an aluminum (AI) layer (¶0031). Regarding claim 17, Sung discloses wherein the metal layer (210a) comprises one or more of aluminum (AI), platinum (Pt), and silver (Ag) (¶0043). Regarding claim 18, Sung discloses all of the limitations of claim 13 from which this claim depends. Sung fails to explicitly disclose wherein the P-contact comprises an alloy of gold (Au) and zinc (Zn). Tsai discloses wherein the P-contact (Fig. 9: 421) comprises an alloy of gold (Au) and zinc (Zn) (¶0050). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the opening of Sung with a P-contact as taught by Tsai so as to be in ohmic contact with the epitaxial structure (¶0050). Regarding claim 20, Sung discloses wherein the first dielectric layer (215a) comprises one or more of silicon oxide (SiOx), titanium oxide (TiOx), niobium oxide (NbyOx), silicon nitride (SiN), silicon carbide (SiC), aluminum oxide (AIOx), and aluminum nitride (AIN) (¶0053). Claim 14 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2018/0138366 to Sung et al. (Sung) in view of US Pub # 2021/0050475 to Tsai et al. (Tsai) and further in view of US Pub # 2023/0420627 to Armitage. Regarding claim 14, Sung and Tsai discloses all of the limitations of claim 13 from which this claim depends. Sung and Tsai fails to explicitly disclose annealing the epitaxial stack prior to forming the N-contact and the P-contact in the dielectric openings. Armitage discloses annealing the epitaxial stack prior to forming the N-contact and the P-contact in the dielectric openings (¶0123). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the epitaxial stack of Sung with the annealing as taught by Armitage so as to activate the dopants (¶0077). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over US Pub # 2018/0138366 to Sung et al. (Sung) in view of US Pub # 2021/0050475 to Tsai et al. (Tsai) and further in view of US Pub # 2023/0402572 to Jia et al. (Jia). Regarding claim 19, Sung and Tsai disclose all of the limitations of claim 13 from which this claim depends. Sung and Tsai fail to explicitly disclose wherein the N-contact comprises an alloy of one or more of gold (Au), germanium (Ge), and nickel (Ni). Jia discloses wherein the N-contact comprises an alloy of one or more of gold (Au), germanium (Ge), and nickel (Ni) (¶0032). It would have been obvious to a person having ordinary skill in the art before the effective filing date of the invention to have provided the N-contact of Sung with an alloy of one or more of gold (Au), germanium (Ge), and nickel (Ni) so as to uniformly deliver current from the metal reflection layer 102 and the metal bonding layer to the semiconductor epitaxial stack (¶0032). Response to Arguments Applicant's arguments filed 08/04/2026 have been fully considered but they are not persuasive with respect to the rejection of amended independent claims 1 and 13 under 35 U.S.C. §103. The prior rejection under 35 U.S.C. §102 is withdrawn in view of the amendments to the independent claims. However, the amendments do not render the claims patentable because Tsai, when considered as a whole and particularly in view of Fig. 6 or Fig. 10 and Table 1, teaches or renders obvious the newly added limitations. Applicant argues that Tsai does not teach the claimed arrangement wherein the LCL is directly on a first aluminum gallium indium phosphide (AlInGaP) semiconductor layer and an aluminum indium phosphide (AlInP) n-contact semiconductor layer is directly on the LCL. Applicant’s argument appears to treat MQW active layer 412 alone as corresponding to the claimed LCL and further relies on the characterization of first-type semiconductor layer 411 as a p-type layer. The Office does not rely on that mapping. Rather, as shown in Fig. 6 and Table 1, Tsai teaches first-type semiconductor layer 411, MQW active layer 412, and second-type semiconductor layer 413 arranged sequentially, with active layer 412 directly between layers 411 and 413. For purposes of the present rejection, the claimed LCL corresponds to MQW active layer 412 together with the selected adjacent sublayer of second-type semiconductor layer 413. Table 1 teaches that the portion of first-type semiconductor layer 411 immediately adjacent to active layer 412 may comprise AlInGaP, thereby corresponding to the claimed first AlInGaP semiconductor layer directly adjacent to the LCL. Table 1 further teaches that second-type semiconductor layer 413 includes n-type AlInP-containing sublayers, including an n-type AlInP cladding sublayer, such that a selected AlInP n-type semiconductor sublayer of layer 413 is directly adjacent to the opposite side of the mapped LCL. Accordingly, Fig. 6 and Table 1 collectively teach the claimed structural relationship. Applicant further argues that Tsai does not teach an LCL having a thickness in the claimed range of 2 µm to 5 µm. The Office agrees that Tsai does not expressly identify the precise numerical range of 2 µm to 5 µm as a single stated LCL range. However, Table 1 teaches the constituent layers corresponding to the mapped LCL and expressly provides respective thickness ranges for those layers. Taking the minimum disclosed thicknesses of the constituent layers results in a minimum total LCL thickness of approximately 50 nm, or 0.05 µm, while taking the maximum disclosed thicknesses results in a maximum total LCL thickness of approximately 7000 nm, or 7 µm. Thus, Tsai teaches an overall LCL thickness range of approximately 0.05 µm to 7 µm, which encompasses and overlaps the claimed range of 2 µm to 5 µm. Selection of a thickness within the overlapping portion would have been obvious to one of ordinary skill in the art. In addition, Tsai expressly associates the thicknesses of the constituent semiconductor layers with their respective functions in the device. Accordingly, layer thickness is a result-effective variable, and selection of an appropriate thickness within Tsai’s disclosed range through routine optimization would have involved no more than ordinary skill and would have yielded predictable results. Applicant also argues that there would have been no motivation to modify Tsai’s disclosed 0-1 µm barrier sublayer to arrive at the claimed 2-5 µm range. This argument is not persuasive because the Office is not relying solely on the 0-1 µm barrier sublayer as corresponding to the entirety of the claimed LCL. Rather, the claimed LCL is mapped to the combination of the identified constituent layers shown in Table 1. When those constituent layers are considered together, the resulting disclosed thickness range overlaps and encompasses the claimed 2-5 µm range. Therefore, the rejection does not require increasing a single 0-1 µm layer to 2-5 µm as Applicant suggests. Applicant’s argument that the 2-5 µm limitation was previously recited in dependent claim 5 and therefore was not part of the earlier rejection is acknowledged. However, claim 1 has now been amended to incorporate that limitation. The patentability of amended claim 1 is therefore evaluated based on the claim in its present form, and the Office has addressed the newly incorporated limitation in the present rejection. With respect to amended independent claim 13, the same reasoning applies because claim 13 contains corresponding LCL limitations. Tsai therefore teaches or renders obvious the newly added LCL composition, structural relationship, and thickness limitations for the reasons discussed above. Applicant further argues that the secondary references relied upon in the rejections of the dependent claims do not cure the alleged deficiencies of Tsai. This argument is not persuasive because, as explained above, Tsai itself teaches or renders obvious the amended limitations of independent claims 1 and 13 under the mapping and rationale set forth in the present Office action. The secondary and tertiary references are relied upon for the additional limitations of their respective dependent claims, not to remedy a deficiency in Tsai concerning the amended LCL limitations. Accordingly, the rejections based on Tsai in combination with Sung, Armitage, Jia, and the other cited references, as applicable, are maintained for the reasons stated in the individual rejections. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOHSEN AHMADI whose telephone number is (571)272-5062. The examiner can normally be reached M-F: 9:00am-5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William F Kraig can be reached at 571-272-8660. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHSEN AHMADI/Primary Examiner, Art Unit 2896
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Prosecution Timeline

Jan 08, 2024
Application Filed
May 05, 2026
Non-Final Rejection mailed — §102, §103
Aug 04, 2026
Response Filed
Oct 09, 2026
Final Rejection mailed — §102, §103 (current)

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Expected OA Rounds
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