DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of the Claims
In the communication filed on 01/08/2024 claims 1-7 are pending. Claim 1 is independent.
Information Disclosure Statement
The information disclosure statement filed 01/08/2024 fails to comply with 37 CFR 1.98(a)(2), which requires a legible copy of each cited foreign patent document; each non-patent literature publication or that portion which caused it to be listed; and all other information or that portion which caused it to be listed. It has been placed in the application file, but the information referred to therein has not been considered.
Drawings
The drawings are objected to because the plot in Fig. 5 is missing x-axis and y-axis titles and units. Amend Fig. 5 to include titles and units for the x-axis and the y-axis.
The drawings are objected to because Figs. 1-5 are blurred. Resubmit the drawings taking into consideration the grayscale.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: “Power Loss Protection Integrated Circuit for Charging Storage Capacitors”.
Claim Objections
Claim 1 is objected to because of the following informalities: in line 11 replace “when” with --wherein-- for improved reading comprehension. For examination purposes below this limitation will be interpreted as “wherein”, however, appropriate correction is required.
Claim 5 is objected to because of the following informalities: in line 3 remove “the” before “M” and add additional supporting limitations supported by applicant’s specification dated 01/08/2024 found in lines 16-23 of page 11 to avoid a lack of antecedent basis issue. For examination purposes below “M” will be interpreted as supported by the applicant’s disclosure, however, appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-4 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Lu et al. (USPGPN 20230324970).
With respect to claim 1, Lu teaches a power loss protection integrated circuit for charging N (N is a natural number greater than or equal to 2) storage capacitors (Figs. 1-3; a power management integrated circuit (PMIC) 110 for charging N ≥ 2 storage capacitors 102).
Lu teaches a charge circuit generating a charge current to charge the N storage capacitors (Fig. 2; ¶[25]; bidirectional buck-boost converter 113 charges the storage capacitors 102).
Lu teaches N separate electrical paths connected in a one-to-one relationship with the N storage capacitors and supplying the charge current to the N storage capacitors therethrough (Fig. 2; N ≥ 2 paths denoted by 142-n in a one-to-one relationship with the storage capacitors 102 and for supplying the charge current to the storage capacitors 102 therethrough).
Lu teaches N switches arranged in the corresponding electrical paths and turned ON/OFF to supply (ON) the charge current through the electrical paths or interrupt (OFF) the supply of the charge current (Fig. 2; ¶[27]; N ≥ 2 switches denoted by blocking circuits 220-n arranged in the corresponding electrical paths 142-n and turned ON/OFF to supply (ON) the charge current through the path 142-n or interrupt (OFF) the supply of the charge current).
Lu teaches an overcurrent detection unit detecting whether the charge current supplied through the electrical paths is an overcurrent exceeding a predetermined critical current (Fig. 3; ¶[35]; sense circuit 301 detects overcurrent of the charging current flowing through paths 142-n and it is compared to a threshold value to determine overcurrent).
Lu teaches a control unit sequentially turning ON/OFF the N switches and immediately stopping charging the storage capacitor through a working path where the overcurrent is detected when the working path is defined as the electrical path where the switch in the ON state is arranged (Figs. 1-3; ¶[23-24]; ¶[36]; controller 112 sequentially turns ON or OFF the transistor M5 of the blocking circuit 220-n in response to the detection of overcurrent. One of ordinary skill understands a working path is one when the transistor M5 is turned ON thus a charge current reaches the corresponding capacitor 102 (i.e, a working path)).
With respect to claim 2, Lu teaches the invention as discussed above in claim 1. Further, Lu teaches wherein the switches are field effect transistor (FET) switches (Fig. 3; transistors M5 of the blocking circuits 220-n are FETs).
With respect to claim 3, Lu teaches the invention as discussed above in claim 1. Further, Lu teaches wherein the overcurrent detection unit comprises a current comparator comparing the charge current and the critical current (¶[35]; “The sense circuit 301 may include a comparator that compares the sense current to a threshold to detect overcurrent”).
With respect to claim 4, Lu teaches the invention as discussed above in claim 1. Further, Lu teaches wherein the control unit continuously turns OFF the switch arranged in the working path to block the working path when the overcurrent is detected (¶[36]; “...the sense circuit 301 sends a sense signal to the controller 112, which controls the third terminal of the transistor M5 to turn the transistor M5 OFF when the sense signal indicates overcurrent...”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 5-7 are rejected under 35 U.S.C. 103 as being unpatentable over Lu et al. (USPGPN 20230324970) and further in view of Nagayasu (Japanese Patent JP-5995420-B2).
With respect to claim 5, Lu teaches the invention as discussed above in claim 1. Further, Lu teaches wherein the power loss protection integrated circuit comprises a discharge circuit generating a sink current to discharge the M (M is a natural number greater than or equal to 2) storage capacitors charged through some or all of the N electrical paths wherein the control unit sequentially turns ON/OFF the switches arranged in the separate electrical paths connected to the M charged storage capacitors (Fig. 2; DC-DC converter 131 provides a discharge path 203 generating a current to discharge the storage capacitors 102 that were charged through the corresponding paths 142-n using the controller 112 to sequentially turn ON/OFF the M5 switches arranged in the paths 142-n connected to the storage capacitors 102 as cited above).
However, Lu fails to explicitly teach a charge capacity measurement unit measuring voltage drops in the storage capacitors during discharge and measure the charge capacity of the storage capacitor discharged through the working path based on the voltage drop measured in the storage capacitor discharged through the working path.
Nagayasu teaches a charge capacity measurement unit measuring voltage drops in the storage capacitors during discharge and measure the charge capacity of the storage capacitor discharged through the working path based on the voltage drop measured in the storage capacitor discharged through the working path (Fig. 1, a capacitor capacitance measuring device 1; ¶[09], the voltage drops of the capacitor are measured during discharge to determine the capacitance. The working path is understood by one of ordinary skill to be a circuit path with current flowing).
Measuring the voltage of a capacitor helps finds its capacity because capacity depends on how much charge it holds and how much voltage builds up. As such, it would have been obvious for one of ordinary skill in the art to have adapted Nagayasu’s charge capacity measurement method to Lu’s PMIC. The advantage of this being that capacitor capacity can be measured regularly with precision, thus improving reliability (see ¶[02] of Nagayasu).
With respect to claim 6, Lu teaches the invention as discussed above in claim 5. However, Lu fails to explicitly teach the limitations of claim 6.
Nagayasu teaches wherein when the measured charge capacity of the storage capacitor discharged through the working path is lower than the predetermined critical capacity, the control unit judges the storage capacitor as having a failure (¶[02]; aging of the capacitor may be determined based on the measurement results, thus one of ordinary skill understands the measured capacitance is compared with a predetermined critical capacity to make this judgement).
Comparing capacitance values determines aging or failure by measuring how much a capacitor’s energy storage capacity drops over time. Thus, it would have been obvious for one of ordinary skill in the art to have adapted Nagayasu’s charge capacity measurement method to Lu’s PMIC. The advantage of this being that capacitor capacity can be measured regularly with precision, thus improving reliability (see ¶[02] of Nagayasu).
With respect to claim 7, Lu teaches the invention as discussed above in claim 6. Further, Lu teaches wherein when the discharged storage capacitor is judged as having a failure, the switch arranged in the working path is continuously turned OFF to block the working path (¶[03]; “When a storage capacitor fails, a blocking transistor (e.g., metal-oxide semiconductor field-effect transistor (MOSFET)) is turned OFF to disconnect all of the storage capacitors from the PMIC, thereby preventing the resulting large inrush current from triggering over current protection and losing the bus voltage”).
Relevant Prior Art
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
The additional prior art identified by the applicant in the Information Disclosure Statement (IDS) were considered by the examiner, however, for examination purposes were not relied upon for citation purposes.
Lee et al. (USPGPN 20220199122) is about a memory/storage device that can keep working briefly when external power suddenly fails. It uses an auxiliary power device made of one or more capacitors to store backup energy. A charging circuit keeps those capacitors charged during normal operation. A state-determining circuit watches the capacitor voltage and the timing of charge/discharge cycles to tell whether the auxiliary power device is healthy.
Huang (USPGPN 20100226194) describes a backup power protection circuit and method for a non-volatile storage device such as flash memory. The device uses an energy storage unit, preferably a large capacitor, to keep the memory system alive long enough to save data when normal power fails. During ordinary operation, a main control unit monitors the capacitor’s charge level and charges it only when needed. When the external power supply becomes abnormal or drops out, the circuit switches the device over to the capacitor as the power source. The circuit is designed to keep the capacitor from being overcharged or undercharged.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Frank A Silva whose telephone number is (703)756-1698. The examiner can normally be reached Monday - Friday 09:30 am -06:30 pm ET.
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/FRANK ALEXIS SILVA/Examiner, Art Unit 2859
/DREW A DUNN/Supervisory Patent Examiner, Art Unit 2859
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