DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendment filed on 05/26/2026 has been entered. Claims 1-10, 12-30 and newly added claim 31, remain pending in the application.
Claim Rejections - 35 USC § 112(a)
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1, 15 and 29 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Claims 1, 15 and 29 require the impedance adapters to be “positioned entirely beneath the die”. In paragraph [0005 and [0007] the written specification teaches the impedance adapters disposed between the die and the package substrate and paragraph [0051] and [0052] teach the impedance adapters are positioned or attached under the die. Figures 1, 2A, 2B, 6, and 10 are side views of the IC device and no top view is provided. Furthermore, no other parts of the specification appear to include a teachings that suggests the impedance adapters are positioned entirely beneath the die. Therefore, a person skilled in the art, at the time the application was filed, would have not recognized that the inventor was in possession of the invention as claimed, in view of the disclosure of the application as filed. For the purpose of examination, the limitation “positioned entirely beneath the die” will be interpreted as “positioned entirely beneath the die, in a cross-sectional profile view”.
Claims 1-10, 12-14 and 31 are also rejected as being dependent on claim 1. Claims 15-28 are also rejected as being dependent on claim 15. Claims 28 and 30 are also rejected as being dependent on claim 29.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1, 5, 7, 10, 12, 13, 15-19, 23, 25, 28 and 29 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lim et al., (United States Patent Application Publication, US 2022/0077060 A1), hereinafter referenced as Lim.
Regarding claim 1, Lim teaches a packaged integrated circuit device comprising: a die that includes integrated radio frequency (RF) circuitry (Fig.3A, element #102, paragraph [0016], rows 1-2); a package substrate including metal layers electrically connected to the RF circuitry (Fig.3A, element #104); and two or more impedance adapters electrically connected to the RF circuitry, aligned horizontally relative to one another, (Fig.3A, elements #306 and #304, can be inductors, paragraph [0022], rows 15-18, elements #304 and #306 are equivalent to elements #204 and #206 of Fig.2A and are connected to die #102, paragraph [0020], rows 20-22 and 43-45) and positioned entirely beneath the die and in a cross-sectional profile view, above the package substrate (Fig.3A, elements #304 and #306 are positioned above the substrate, element #104 and beneath the die, element #102), an impedance adapter of the impedance adapters including a passive component disposed on or in a body of the impedance adapter (element #304 can be an inductor, paragraph [0022], rows 15-18).
Regarding claim 5, Lim teaches the packaged integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim further teaches the packaged integrated circuit device of claim 1, wherein the passive component includes one or more inductors (element #304 can be an inductor, paragraph [0022], rows 15-18).
Regarding claim 7, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim further teaches the packaged integrated circuit device of claim 1, wherein the passive component includes a three-dimensional (3D) inductor including interconnected through vias defining a solenoid, the through vias extending through the body of the impedance adapter (paragraph [0022], rows 15-18).
Regarding claim 10, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim further teaches the packaged integrated circuit device of claim 1, further comprising conductive vias through the passive component, the conductive vias electrically connected to the RF circuitry and the metal layers (Fig.3A, elements #308).
Regarding claim 12, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim further teaches the packaged integrated circuit device of claim 1, further comprising conductive interconnects electrically connected to the RF circuitry and the metal layers (Fig.3A, elements #210b) .
Regarding claim 13, Lim teaches the packaged integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim further teaches the packaged integrated circuit device of claim 1, further comprising solder balls disposed on a first side of the package substrate, wherein the impedance adapter is disposed on a second side of the package substrate that is opposite the first side (Fig.3A, solder balls are disposed on the bottom side of the substrate, while the adapters are disposed on the top side of the substrate).
Regarding claim 15, Lim teaches a method of fabrication comprising: forming a package substrate including metal layers (Fig.3A, element #104); coupling two or more impedance adapters to the package substrate (Fig.3A, elements #304 and #306 can be inductors, paragraph [0022], rows 15-18, and are coupled to element #104), the two or more impedance adapters aligned horizontally relative to one another (Fig.3A elements #304 and #306 are horizontally aligned) an impedance adapter of the two or more impedance adapters including a passive component disposed in or on a body of the impedance adapter (element #304 can be an inductor, paragraph [0022], rows 15-18); electrically connecting a die including integrated radio frequency (RF) circuitry to the impedance adapter on a side of the impedance adapter opposite the package substrate (elements #304 and #306 are equivalent to elements #204 and #206 of Fig.2A which are electrically connected to die #102, paragraph [0020], rows 20-22 and 43-45) the two or more impedance adapters positioned entirely beneath the die in a cross-sectional view (Fig.3A, elements #306 and #304 are entirely beneath the die in the cross-sectional view); and electrically connecting the die to the metal layers through one or more conductors adjacent to the impedance adapter (Fig.3A, element #102 is connected to the metal layers of element #104 through elements #210b).
Regarding claim 16, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim further teaches the method of claim 15, wherein the passive component includes conductive vias (Fig.3A, element #308), wherein the metal layers include landing pads (Fig.3A, landing pads exists on the top surface of the package), and wherein coupling the impedance adapter to the package substrate includes aligning the conductive vias with the landing pads (Fig.5I, the pads are aligned with the vias).
Regarding claim 17, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim further teaches the method of claim 15 further comprising forming the conductors on the package substrate (Fig.5I, elements #210b, labeled in Fig.3A, are formed on the package substrate).
Regarding claim 18, Lim teaches the method of claims 15 and 17 as set forth in the anticipation rejection. Lim further teaches the method of claim 17, further comprising forming landing pads including first landing pads aligned with the conductors and second landing pads aligned with conductive vias of the passive component (Fig.3A, first landing pads are aligned with elements #210b and second landing pads are aligned with elements #308).
Regarding claim 19, Lim teaches the method of claims 15, 17 and 18 as set forth in the anticipation rejection. Lim further teaches the method of claim 18, further comprising coupling first copper pads of the die to the first landing pads to electrically connect the RF circuitry to the metal layers (Fig.3A, elements #210a are made of copper, paragraph [0021], rows 3-4 and are coupled to the first landing pads).
Regarding claim 23, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim further teaches the method of claim 15, wherein the passive component includes one or more inductors (element #304 can be an inductor, paragraph [0022], rows 15-18).
Regarding claim 25, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim further teaches the method of claim 15, wherein the passive component includes a three-dimensional (3D) inductor including interconnected through vias defining a solenoid, the through vias extending through the body of the impedance adapter (paragraph [0022], rows 15-18).
Regarding claim 28, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim further teaches the method of claim 15, further comprising: coupling a second impedance adapter to the package substrate; and electrically connecting the die to the second impedance adapter on a side of the second impedance adapter opposite the package substrate (Fig.3A, element #306).
Regarding claim 29, Lim teaches a packaged integrated circuit device comprising: a die that includes integrated radio frequency (RF) circuitry (Fig.3A, element #102, paragraph [0016], rows 1-2); a package substrate including metal layers electrically connected to the RF circuitry (Fig.3A, element #104); a first impedance adapter electrically connected to the RF circuitry and disposed entirely beneath between the die in a cross-sectional profile view and above the package substrate (Fig.3A, element #304, can be inductor, paragraph [0022], rows 15-18, elements #304 is equivalent to element #204 of Fig.2A and is connected to die #102, paragraph [0020], rows 20-22 and 43-45); and a second impedance adapter electrically connected to the RF circuitry and disposed entirely beneath between the die in a cross-sectional profile view and above the package substrate (Fig.3A, element #306, which is equivalent to element #206 of Fig.2A and is connected to die #102, paragraph [0020], rows 20-22 and 43-45); , wherein the first impedance adapter and the second impedance adapter are aligned horizontally relative to one another (Fig.3A elements #304 and #306 are horizontally aligned).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Lim, in view of disclosed prior art Kim et al., (United States Patent Application Publication Number, US 2022/0013444 A1) hereinafter referenced as Kim.
Regarding claim 2, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim does not teach the packaged integrated circuit device of claim 1, further comprising one or more of a switch, a power amplifier (PA), or a low noise amplifier (LNA) electrically connected to the metal layers and disposed adjacent to the die. Kim teaches the packaged integrated circuit device, further comprising one or more of a switch, a power amplifier (PA), or a low noise amplifier (LNA) electrically connected to the metal layers and disposed adjacent to the die (Fig.3, element #308 is a power amplifier, adjacent to the die, element #304 and electrically connected to the metal layers, paragraph [0038], rows 1-3). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Kim and disclose the packaged integrated circuit device further comprising a power amplifier (PA). As disclosed by Kim, the power amplifier can be configured to amplify electrical signals from the transmission path (paragraph [0038], rows 6-8).
Claim 3, 6, 8, 9, 14, 21, 24, 26, 27 and 30 are rejected under 35 U.S.C. 103 as being unpatentable over Lim, in view of disclosed prior art Black et al., (United States Patent Application Publication, US 2012/0075216 A1), hereinafter referenced as Black.
Regarding claim 3, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim does not teach the packaged integrated circuit device of claim 1, wherein the impedance adapter also includes one or more active components. Black teaches, wherein the impedance adapter also includes one or more active components (paragraph [0102], rows 5-7 and paragraph [0103]. rows 4-11). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the impedance adapter also includes one or more active components. Active components present in an impedance adapter can dynamically adjust the matching impedance for variations in the circuit and therefore improve performance on a wider range of conditions.
Regarding claim 6, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim does not teach the packaged integrated circuit device of claim 1, wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter. Black teaches wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter (paragraph [0135], rows 15-17). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter. A two-dimensional inductor has a compact footprint and having the inductor located on a surface of the body of an impedance adapter keeps it close to the adapter, thus reducing unwanted parasitic coupling to nearby circuit elements.
Regarding claim 8, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim does not teach the packaged integrated circuit device of claim 1, wherein the passive component include a varactor. Black teaches wherein the passive component includes a varactor (paragraph [0010], rows 6-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes a varactor (paragraph [0010], rows 6-9). A varactor offers voltage controlled capacitance adjustment, which enables fast and precise tuning in RF circuits, and would eliminate the need for the capacitors #230 and #232 disclosed by Lim.
Regarding claim 9, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim teaches capacitors connected on thew bottom side of the substrate (Fig.3A, element #230 and #232). Lim does not teach the packaged integrated circuit device of claim 1, wherein the passive component includes a metal-insulator-metal (MIM) capacitor. Black further teaches wherein the passive component includes a metal-insulator-metal (MIM) capacitor (Fig.11B, element #1029 includes capacitors, elements #1125a, b and c). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes a metal-insulator-metal (MIM) capacitor. The impedance adapters disclosed by Lim have metal and insulator layers that can be easily used to form a MIM capacitor, which would eliminate the need for the capacitors #230 and #232 located on the bottom of the substrate.
Regarding claim 14, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection. Lim teaches the packaged integrated circuit device of claim 1, wherein the die includes an RF die (Fig.3A, element #102, paragraph [0016], rows 1-2). Lim does not teach the die is a CMOS die. Black teaches wherein the die includes a complementary metal oxide semiconductor (CMOS) RF die (paragraph [0089], rows 1-6). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the die includes a complementary metal oxide semiconductor (CMOS) RF die. Using a metal oxide semiconductor process to manufacture the integrated RF die, allows the manufacture and integration of other analog or digital circuits with the RF die, using the same CMOS process, thus increasing functionality.
Regarding claim 21, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim does not teach the method of claim 15, wherein the impedance adapter also includes one or more active components. Black teaches wherein the impedance adapter also includes one or more active components (paragraph [0102], rows 5-7 and paragraph [0103]. rows 4-11). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose the wherein the impedance adapter also includes one or more active components. Active components present in an impedance adapter can dynamically adjust the matching impedance for variations in the circuit and therefore improve performance on a wider range of conditions.
Regarding claim 24, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim does not teach the method of claim 15, wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter. Black teaches wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter (paragraph [0135], rows 15-17). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes at least one two-dimensional (2D) inductor disposed on a surface of the body of the impedance adapter. A two-dimensional inductor has a compact footprint and having the inductor located on a surface of the body of an impedance adapter keeps it close to the adapter, thus reducing unwanted parasitic coupling to nearby circuit elements.
Regarding claim 26, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim does not teach the method of claim 15, wherein the passive component include a varactor. Black teaches wherein the passive component includes a varactor (paragraph [0010], rows 6-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes a varactor (paragraph [0010], rows 6-9). A varactor offers voltage controlled capacitance adjustment, which enables fast and precise tuning in RF circuits, and would eliminate the need for the capacitors #230 and #232 disclosed by Lim.
Regarding claim 27, Lim teaches the method of claim 15 as set forth in the anticipation rejection. Lim teaches capacitors connected on thew bottom side of the substrate (Fig.3A, element #230 and #232). Lim does not teach the method of claim 15, wherein the passive component includes a metal-insulator-metal (MIM) capacitor. Black further teaches wherein the passive component includes a metal-insulator-metal (MIM) capacitor (Fig.11B, element #1029 includes capacitors, elements #1125a, b and c). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose wherein the passive component includes a metal-insulator-metal (MIM) capacitor. The impedance adapters disclosed by Lim have metal and insulator layers that can be easily used to form a MIM capacitor, which would eliminate the need for the capacitors #230 and #232 located on the bottom of the substrate.
Regarding claim 30, Lim teaches the package integrated circuit device of claim 29 as set forth in the anticipation rejection. Lim does not teach wherein the first impedance adapter includes a varactor and the second impedance adapter includes a metal-insulator-metal (MIM) capacitor. Black teaches the packaged integrated circuit device of claim 29, wherein the first impedance adapter includes a varactor and the second impedance adapter includes a metal-insulator-metal (MIM) capacitor (paragraph [0010], rows 6-9). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Black and disclose the first impedance adapter includes a varactor and the second impedance adapter includes a metal-insulator-metal (MIM) capacitor. A varactor offers voltage controlled capacitance adjustment, which enables fast and precise tuning in RF circuits, and would eliminate the need for the capacitor #230 connected to the first impedance adapter. Furthermore, the impedance adapters disclosed by Lim have metal and insulator layers that can be easily used to form a MIM capacitors, which would eliminate the need for the capacitor #232 connected to the second impedance adapter.
Claims 4 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Black and in view of Huang et al., (United States Patent Application Publication Number, US 2018/0102578 A1) hereinafter referenced as Huang.
Regarding claim 4, Lim teaches the package integrated circuit device of claim 1 as set forth in the anticipation rejection and the combination of Lim and Black teaches the package integrated circuit device of claim 3 as set forth in the obviousness rejection. Black further teaches that an integrated circuit can be combined with the passive devices of the impedance adapter to form an active filter (paragraph [0105], rows 4-6). The combination of Lim and Black does not teach the packaged integrated circuit device of claim 3, wherein the one or more active components are part of the impedance adapter. Huang teaches the packaged integrated circuit device, wherein the one or more active components include at least one of an amplifier, a filter, a power amplifier (PA), or a low noise amplifier (LNA) (Fig.15, element #100 is an active filter, containing active hips, element #1402). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Huang and disclose the packaged integrated circuit device, wherein the one or more active components include at least one of a filter. As disclosed by Huang, this allows filtering the signals transmitted or received by the RF circuitry (paragraph [0001]), to eliminate noise or interference.
Regarding claim 22, Lim teaches the method of claim 15 as set forth in the anticipation rejection and the combination of Lim and Black teaches the method of claim 21 as set forth in the obviousness rejection. Black further teaches that an integrated circuit can be combined with the passive devices of the impedance adapter to form an active filter (paragraph [0105], rows 4-6). The combination of Lim and Black does not teach wherein the one or more active components are part of the impedance adapter. Huang teaches wherein the one or more active components include at least one of an amplifier, a filter, a power amplifier (PA), or a low noise amplifier (LNA) (Fig.15, element #100 is an active filter, containing active hips, element #1402). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Huang and disclose the packaged integrated circuit device, wherein the one or more active components include at least one of a filter. As disclosed by Huang, this allows filtering the signals transmitted or received by the RF circuitry (paragraph [0001]), to eliminate noise or interference.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Kim
Regarding claim 20, Lim teaches the method of claims 15, 17 and 18 as set forth in the anticipation rejection. Lim does not teach the method of claim 18, further comprising coupling second copper pads of the die to the second landing pads to electrically connect the RF circuitry to the impedance adapter. Kim further teaches coupling the die to the second landing pads to electrically connect the die to the impedance adapter (Fig.6 the die element #508 is connected to the pad on top of element #330b, which is part of the inductor 605b). It would have been obvious to one ordinary skilled in the art, before the effective filing date of the claimed invention, to incorporate the teachings of Kim and disclose the method further comprising coupling the die to the second landing pads to electrically connect the die to the impedance adapter. This connection ensures the impedance matching between the die and the rest of the integrated circuit, which results in maximum power transfer to or from the die.
Allowable Subject Matter
Claim 31 is allowed if written in independent form and if independent claim 1 is amended to overcome the 112(a) rejection.
The following is a statement of reasons for the indication of allowable subject matter.
Regarding claim 31 the cited prior art does not teach or fairly suggests, along with other claimed features: “wherein a first impedance adapter of the two or more impedance adapters is configured to adapt an output impedance of a filter to an input impedance of a power amplifier, and wherein a second impedance adapter of the two or more impedance adapters is configured to adapt an output impedance of the power amplifier”.
Kim et al., (United States Patent Application Number, US 2024/0162861 A1) teaches a first impedance adapter configured to adapt an output impedance of a filter to an input impedance of a power amplifier, and wherein a second impedance adapter configured to adapt an output impedance of the power amplifier (Fig.1, filter element #110, impedance adapters, elements #120 and #170, and power amplifier element #130). However, this teaching of Kim cannot be combined with the teaching of Lim, since the two adapters do not satisfy the limitations of claim 1, and Lim does not teach a filter or a power amplifier.
Response to Arguments
Applicant’s arguments filed on 05/26/2026 have been fully considered but they
are not persuasive. Applicant’s arguments with respect to claims have been considered but are moot because the new ground of rejection does not rely on any reference as applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/CRISTIAN A TIVARUS/Examiner, Art Unit 2899 /DALE E PAGE/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights