DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1 – 2, 7 – 9 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fujita et al. (US 20150222003 A1, “Fujita”) in view of Kashiwakura (US 20080121421 A1, “Kashiwakura”).
Regarding claim 1, Fujita discloses (Fig. 1 & 2) a circuit board (1) comprising: a core layer (3); a first via structure (15 or 17) penetrating the core layer; a circuit wiring (25) disposed on one surface of the core layer, the circuit wiring comprising a head portion (27, 29) in contact with the first via structure (15 or 17), a connection portion extending from the head portion, and an extension portion electrically connected to the head portion through the connection portion (see annotated figure below); and a first ground pattern (42) disposed on the one surface of the core layer and disposed around the circuit wiring to be spaced apart from the circuit wiring (para [0029]), wherein a shortest distance between the extension portion and the first ground pattern is greater than a shortest distance between the head portion and the first ground pattern (see annotated figure below).
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Fujita is silent on the connection portion includes an inclined portion having an increasing width in a direction from the extension portion to the head portion wherein a width of the head portion is greater than the maximum width of the connection portion.
However, Kashiwakura discloses (Fig. 1A) the connection portion (12b) includes an inclined portion having an increasing width in a direction from the extension portion to the head portion (12a) wherein a width of the head portion is greater than the maximum width of the connection portion (See annotated figure below).
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Fujita and Kashiwakura are both considered to be analogous to the claimed invention because they are in the same field of circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fujita to incorporate the teachings of Kashiwakura and provide the connection portion (12b) includes an inclined portion having an increasing width in a direction from the extension portion to the head portion (12a) wherein a width of the head portion is greater than the maximum width of the connection portion (See annotated figure above). Doing so would minimize the impedance mismatch, suppresses the stub effects and reduce insertion loss (See para [0026], [0048] – [0049]).
Regarding claim 2, Fujita in view of Kashiwakura discloses the circuit board of claim 1, Fujita further discloses further comprising a via land (4 or 6) disposed on the other surface of the core layer (3) and electrically connected to the head portion (27, 29) through the first via structure (15 or 17).
Regarding claim 7, Fujita in view of Kashiwakura discloses the circuit board of claim 1, wherein the width of the head portion is greater than a width of the extension portion (see annotated figure below).
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Regarding claim 8, Fujita in view of Kashiwakura discloses the circuit board of claim 1, wherein a width of the connection portion is greater than or equal to a width of the extension portion (see annotated figure above).
Regarding claim 9, Fujita in view of Kashiwakura discloses the circuit board of claim 1, further comprising a separation space in a trench shape formed between the first ground pattern and the circuit wiring (See Fujita Fig. 2).
Claim(s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fujita et al. (US 20150222003 A1, “Fujita”) in view of Kashiwakura (US 20080121421 A1, “Kashiwakura”) as applied to claim 2 above, and further in view of Brunette et al. (US 20060125573 A1, “Brunette”).
Regarding claim 3, Fujita in view of Kashiwakura discloses the circuit board of claim 2,
Fujita in view of Kashiwakura is silent wherein the via land is formed integrally with the head portion and the first via structure.
However, Brunette discloses (Fig. 4, 5A) wherein the via land (412) is formed integrally with the head portion (475) and the first via structure (430) (para [0041]).
Fujita in view of Kashiwakura and Brunette are both considered to be analogous to the claimed invention because they are in the same field of circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fujita in view of Kashiwakura to incorporate the teachings of Brunette and provide wherein the via land (412) is formed integrally with the head portion (475) and the first via structure (430) (para [0041]). Doing so would minimize the impact of impedance discontinuities on signal integrity (para [0041]).
Claim(s) 4 – 6, 10 – 13 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fujita et al. (US 20150222003 A1, “Fujita”) in view of Kashiwakura (US 20080121421 A1, “Kashiwakura”) as applied to claim 1 and 2 above, and further in view of Kim et al. (US 20130175077 A1, “Kim”).
Regarding claim 4, Fujita in view of Kashiwakura discloses the circuit board of claim 2,
Fujita in view of Kashiwakura is silent on further comprising a second ground pattern disposed on the other surface of the core layer and disposed around the via land to be spaced apart from the via land.
However, Kim discloses (Fig. 1) further comprising a second ground pattern (16) disposed on the other surface of the core layer and disposed around the via land (30) to be spaced apart from the via land (see Fig. 1).
Fujita in view of Kashiwakura and Kim are both considered to be analogous to the claimed invention because they are in the same field of circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fujita in view of Kashiwakura to incorporate the teachings of Kim and provide further comprising a second ground pattern (16) disposed on the other surface of the core layer and disposed around the via land (30) to be spaced apart from the via land (see Fig. 1). Doing so would reduce cross-talk and improve signal integrity.
Regarding claim 5, Fujita in view of Kashiwakura and Kim discloses the circuit board of claim 4, Fujita further discloses further comprising a second via structure (71b) penetrating the core layer to electrically connect the first ground pattern and the second ground pattern (para [0004], Kin also discloses a 2nd via structure 30 connecting 1st ground 60 to 2nd ground 16).
Regarding claim 6, , Fujita in view of Kashiwakura discloses the circuit board of claim 1,
Fujita in view of Kashiwakura is silent wherein the shortest distance between the extension portion and the first ground pattern is greater than a shortest distance between the connection portion and the first ground pattern.
However, Kim discloses (Fig. 2) wherein the shortest distance between the extension portion and the first ground pattern is greater than a shortest distance between the connection portion and the first ground pattern (see annotated figure below).
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Fujita in view of Kashiwakura and Kim are both considered to be analogous to the claimed invention because they are in the same field of circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fujita in view of Kashiwakura to incorporate the teachings of Kim and provide wherein the shortest distance between the extension portion and the first ground pattern is greater than a shortest distance between the connection portion and the first ground pattern (see annotated figure above). Doing so would Doing so would improve signal integrity by providing targeted shielding, reducing signal loss.
Regarding claim 10, Fujita in view of Kashiwakura discloses the circuit board of claim 1,
Fujita in view of Kashiwakura is silent wherein the first ground pattern includes a first recess and a second recess formed around the connection portion to face each other with the connection portion there between.
However, Kim discloses (Fig. 2) wherein the first ground pattern (60) includes a first recess and a second recess formed around the connection portion to face each other with the connection portion there between (see annotated figure below).
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Fujita in view of Kashiwakura and Kim are both considered to be analogous to the claimed invention because they are in the same field of circuit board. Therefore, it would have been obvious to someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified Fujita in view of Kashiwakura to incorporate the teachings of Kim and provide wherein the first ground pattern (60) includes a first recess and a second recess formed around the connection portion to face each other with the connection portion there between (see annotated figure above). Doing so would improve signal integrity by providing targeted shielding, reducing signal loss.
Regarding claim 11, Fujita in view of Kashiwakura and Kim discloses the circuit board of claim 10, wherein the connection portion includes one end portion directly connected to the head portion, and the first recess and the second recess are adjacent to the one end portion of the connection portion (see annotated figure above).
Regarding claim 12, Fujita in view of Kashiwakura and Kim discloses the circuit board of claim 10, Kim further discloses wherein a shortest distance between the connection portion and the first recess and a shortest distance between the connection portion and the second recess are each smaller than the shortest distance between the extension portion and the first ground pattern (see annotated figure below).
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Regarding claim 13, Fujita in view of Kashiwakura and Kim discloses the circuit board of claim 10, wherein the first recess and the second recess are each spaced apart from the extension portion in an extension direction of the circuit wiring (see annotated figure below).
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Regarding claim 15, Fujita in view of Kashiwakura and Kim discloses the circuit board of claim 10, wherein Kim further discloses that a shortest distance between the connection portion and the first recess and a shortest distance between the connection portion and the second recess are each smaller than the shortest distance between the head portion and the first ground pattern (see annotated figure below).
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Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SIDI MOHAMED MAIGA whose telephone number is (703)756-1870. The examiner can normally be reached Monday - Friday 8 am 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached on 571-272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/SIDI M MAIGA/
Examiner, Art Unit 2847
/TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847