CTNF 18/407,893 CTNF 87887 DETAILED ACTION Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. 07-06 AIA 15-10-15 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election/Restrictions 08-25-01 AIA Applicant's election without traverse of Invention I (claims 1-17) in the reply filed on May 4th, 2026 is acknowledged. 08-06 AIA Claim s 18-20 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species , there being no allowable generic or linking claim. Election was made without traverse in the reply filed on February 29th, 2012 . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. 07-34-01 AIA Claim 17 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, or for pre-AIA the applicant regards as the invention. 07-34-05 AIA Claim 17 recites the limitation “ the side surface of the radio communication die ” in lines 2-3 . There is insufficient antecedent basis for this limitation in the claim. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-23-aia AIA The factual inquiries set forth in Graham v. John Deere Co. , 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: a. Determining the scope and contents of the prior art. b. Ascertaining the differences between the prior art and the claims at issue. c. Resolving the level of ordinary skill in the pertinent art. d. Considering objective evidence present in the application indicating obviousness or nonobviousness. 07-21-aia AIA Claim s 1-5 and 9 are rejected under 35 U.S.C. 103 as being unpatentable over CHANG et al. (Pub. No.: US 2024/0338507 A1), hereinafter as CHANG in view of SHEKHAR et al. (Pub. No.: US 2021/0398944 A1), hereinafter as SHEKHAR and further in view of CHEN et al. (Pub. No.: US 2019/0333879 A1), hereinafter as CHEN . Regarding claim 1 , CHANG discloses a semiconductor package in Fig. 5C comprising: a first three-dimensional (3D) integrated circuit structure (combination of CPU chiplets 410A, 410B and SRAM chiplets 410C, 410D), the first 3D integrated circuit structure including a baseband die (CPU chiplets 410A/410B) and a memory die (SRAM 410C/410D) on the baseband die (see [0039]); and a second 3D integrated circuit structure (internet chiplet 410E and RF chiplet 410F) on the first 3D integrated circuit structure, the second 3D integrated circuit structure including a communication die (internet chiplet 410E) and a radio communication die (RF chiplet 410F) on the communication die (see [0039]). CHANG fails to disclose the communication die including a transceiver die and wherein one or more metal patterns are formed on an upper surface of the radio communication die. SHEKHAR discloses a semiconductor package in Fig. 1A comprising a communication die (communication chip 105) including a transceiver die (transceiver) (see [0026]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the communication die of CHANG to include a transceiver die as same as the semiconductor package of SHEKHAR because it is well known to have transceiver die in the internet or communication die for sending and receiving signals. The combination of CHANG and SHEKHAR fails to disclose wherein one or more metal patterns are formed on an upper surface of the radio communication die. CHEN discloses a semiconductor package in Figs. 12-13 comprising wherein one or more metal patterns (metal antennas 162) are formed on an upper surface of a radio communication die (upper surface of RF chip 12) (see [0071] and [0108-0109]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the one or more metal patterns of CHEN into CHANG’s radio communication die because the modified structure would provide an antenna for communication die to effectively receiving RF signals. Regarding claim 2 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 1, the radio communication die includes a RF chip (RF chiplet 410F) (see CHANG and Fig. 5C). Regarding claim 3 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 1, wherein: each metal pattern of the one or more metal patterns includes a PIFA antenna or a patch antenna (metal antenna 162) (see CHEN, Fig. 12-13 and [0108-0109]). Regarding claim 4 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 1, wherein the transceiver die (communication chip 105) includes: a transmitter TX (transceiver includes transmitter) configured to generate a first radio frequency (RF) signal and transmit the generated first radio frequency (RF) signal (see SHEKHAR, Fig. 1A and [0026]); and a receiver RX (transceiver includes receiver) configured to receive a second radio frequency (RF) signal and process the received second radio frequency (RF) signal (see SHEKHAR, Fig. 1A and [0026]). Regarding claim 5 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 1, wherein the first 3D integrated circuit structure includes: a first redistribution layer (bonds 554) structure on the lower surface of the baseband die (see CHANG, Fig. 5C and [0040]); and a second redistribution layer structure (pad bonding 558) between the baseband die and the memory die (see CHANG and Fig. 5C and [0042]). Regarding claim 9 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 1, wherein the second 3D integrated circuit structure includes: a third redistribution layer (pad bonding 558) structure on the lower surface of the transceiver die (lower surface of internet chiplet 410E) (see CHANG, Fig. 5C and [0042]); and a fourth redistribution layer structure (pad bonding 558) between the transceiver die and the radio communication die (see Fig. 5C of CHANG) . 07-21-aia AIA Claim s 6 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over CHANG et al. (Pub. No.: US 2024/0338507 A1), hereinafter as CHANG in view of SHEKHAR et al. (Pub. No.: US 2021/0398944 A1), hereinafter as SHEKHAR and further in view of CHEN et al. (Pub. No.: US 2019/0333879 A1), hereinafter as CHEN, as applied to claim 5 and further in view of Wang et al. (Patent No.: US 9,099,999 B1), hereinafter as Wang . Regarding claim 6 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 5, fails to disclose wherein: the baseband die includes a plurality of first through silicon vias, and the plurality of first through silicon vias electrically connects the memory die to the first redistribution layer structure. Wang discloses a semiconductor package comprising: a baseband die (die 10-1 includes processing circuitry) includes a plurality of first through silicon vias (TSV 119), and the plurality of first through silicon vias electrically connects a memory die (die 10-2) (see Fig. 4, column 6 line 48 through column 8, line 19). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the plurality of firs through silicon vias of Wang into the baseband die of CHANG for electrically connects the memory die to the first redistribution layer structure because having the modified structure would provide an affective and reliable electrical connections and compact way for the semiconductor package. Regarding claim 10 , the combination of CHANG, SHEKHAR and CHEN discloses the semiconductor package of claim 5, fails to disclose wherein: the transceiver die includes a plurality of first through silicon vias, and the plurality of first through silicon vias electrically connects the radio communication die to the third redistribution layer structure. Wang discloses a semiconductor package comprising: a transceiver die (die 10-1 includes communication chip) includes a plurality of first through silicon vias (TSV 119), and the plurality of first through silicon vias electrically connects a memory die (die 10-4) (see Fig. 4, column 6 line 48 through column 8, line 19). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to incorporate the plurality of firs through silicon vias of Wang into the baseband die of CHANG for electrically connects the memory die to the first redistribution layer structure because having the modified structure would provide an affective and reliable electrical connections and compact way for the semiconductor package . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 7-8 and 11-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner's statement of reasons for the indication of allowable subject matter: The cited art, whether taken singularly or in combination, especially when all limitations are considered within the claimed specific combination, fails to disclose or suggest the claimed invention having: Wherein the first 3D integrated circuit structure further includes a plurality of first connection members electrically connecting the second redistribution layer structure to the baseband die as recited in claim 7. Claim 8 depend on claim 7, and therefore also include said claimed limitation. Wherein the radio communication die includes a plurality of third through silicon vias, and the plurality of third through silicon vias electrically connects the one or more metal patterns to the fourth redistribution layer structure as recited in claim 11. Claim 12 depend on claim 11, and therefore also include said claimed limitation. Wherein the second 3D integrated circuit structure further includes a plurality of second connection members electrically connecting the fourth redistribution layer structure to the transceiver die as recited in claim 13. Claim 14 depend on claim 13, and therefore also include said claimed limitation. Claims 15-17 are allowed over prior art of record. The following is an examiner' s statement of reason for allowance: the prior art made of record does not teach or fairly suggest the following: and a first molding material on the baseband die and covering the memory die, the second redistribution layer structure and a second molding material on the transceiver die and covering the radio communication die and the fourth redistribution layer structure as recited in claim 1. Claims 16-17 depend on claim 15, and therefore also include said claimed limitation. 13-03 Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to CUONG B NGUYEN whose telephone number is (571)270-1509 (Email: CuongB.Nguyen@uspto.gov) . The examiner can normally be reached Monday-Friday, 8:30 AM-5:00 PM Eastern Standard Time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven H. Loke can be reached on (571) 272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CUONG B NGUYEN/Primary Examiner, Art Unit 2818 Application/Control Number: 18/407,893 Page 2 Art Unit: 2818 Application/Control Number: 18/407,893 Page 4 Art Unit: 2818 Application/Control Number: 18/407,893 Page 5 Art Unit: 2818 Application/Control Number: 18/407,893 Page 6 Art Unit: 2818 Application/Control Number: 18/407,893 Page 7 Art Unit: 2818 Application/Control Number: 18/407,893 Page 8 Art Unit: 2818 Application/Control Number: 18/407,893 Page 9 Art Unit: 2818 Application/Control Number: 18/407,893 Page 10 Art Unit: 2818
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