DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
In view of the amendment, the 35 U.S.C. § 112(b) rejection of indefiniteness for lacking antecedent basis of Claim 3 has been withdrawn.
Applicant's arguments filed 07-02-2026 have been fully considered but they are not persuasive.
Regarding argument pertaining independent Claim 1, 14, 22
In response to applicant's argument that the references fail to show certain features of the invention, it is noted that the features upon which applicant relies (i.e., pre-formed dielectric layer and/ or hot-press operation) are not recited in the rejected claim(s). Although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993).
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claim 1-30 rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention. The added material which is not supported by the original disclosure is as follows: “pre-formed dielectric layer”. Examiner does not find support in the written specification or drawings to suggest the pre-formed nature of the dielectric layer.
Claim Rejections - 35 USC § 102 / 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-21 is/are rejected under 35 U.S.C. 102(a)(1) as anticipated by Kuiwon Kang et al, (US20200388573 A1) hereinafter referred to as “Kang” or, in the alternative, under 35 U.S.C. 103 as obvious over Kang in view of David Patten et al, (GB 2618627 A) using (US 20240128235 A1) as the written description, hereinafter referred to as “Patten”
Regarding claim 1 Kang teaches
An electronic device (Fig 9 Para [0018]), comprising:
a substrate (200 or 600, Para [0015]), the substrate comprising:
at least two stacked embedded trace substrates (ETS) (Fig 6D element 610 and 650 Para [0040] [0015]);
a first pre-formed dielectric layer (632 Para [0103] the term pre-formed does not result in a structural difference in the final product and therefore the resulting device is the same, see MPEP 2113) joining (connecting) an internally facing surface (bottom edge of 610 Fig 6A) of a first ETS (610) of the at least two stacked ETS with an internally facing surface (top edge of 650 Fig 6B) of a second ETS(650) of the at least two stacked ETS; and
a first set of one or more metal connectors(630 and 634) that extends through the first pre-formed dielectric layer (632) and couples a first set of one or more metal structures at the internally facing surface of the first ETS (620 and the material, that goes deeper into 610, that it is attached to in Fig 6A) with a second set of one or more metal structures at the internally facing surface of the second ETS. (620 and the material, that goes deeper into 650, that it is attached to in Fig 6B)
Alternatively, Patten teaches two similar electrical layers (106 and 101) being connected by a dielectric layer (108). Patten teaches, interchangeably, both applying the dielectric as a liquid as alleged in Kang or as a preformed film and them heated and applied with pressure as claimed in the instant application (Patten Para[0025]) therefore
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to include a pre-formed dielectric layer, as described in Patten in the device of Kang, because the modification has been noted as a simple substitution of two known methods of applying the dielectric material previously in the art (Patten Para [0025])
Regarding claim 2 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 1, wherein:
Kang further teaches
the first set of one or more metal structures at the internally facing surface of the first ETS comprises one or more raised pads (the portion of 620 in 610 of fig 6a that is protruding out from the insulating layers.); and
the second set of one or more metal structures at the internally facing surface of the second ETS comprises one or more embedded pads (the portion of 620 in 650 of fig 6b that sits recessed and further deep in the insulating layers ).
Regarding claim 3 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 2,
wherein the first set of one or more metal connectors (Kang 630 and 634) extending through the first pre-formed dielectric layer comprises:
at least one metallized bump (Kang 634 Para [0101][0027]) disposed between at least one of the one or more embedded pads of the second ETS and at least one of the one or more raised pads of the first ETS. (Kang fig 2 or fig 6A-6D)
Regarding claim 4 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 3, wherein:
Kang further teaches
the at least one metallized bump (fig 6A-D element 634 Para [0027][0101] )is formed from a metal different (Para [0030][0097]) than a metal used to form the one or more embedded pads and the one or more raised pads.
Regarding claim 5 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 1, wherein:
Kang further teaches
the first ETS (610) includes a first outer surface (top edge of 610 of Fig 6A or 210 of Fig 2) including one or more embedded pads (220) disposed in a second dielectric layer (216 or 616 Para [0044]) where the plurality of layers may look like a layer between each metallization layers giving the invention three layers, like the sister embodiment shown and labeled in figure 5e, or some other configuration).
Regarding claim 6 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 5, further comprising:
Kang further teaches
an integrated circuit (IC) component (404b of Fig 4) disposed on the first outer surface of the first ETS (the top surface of 610 corresponds to the top edge of 400 Para [0078][0104]) and electrically connected to the one or more embedded pads of the first ETS. (Para [0104])
Regarding claim 7 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 6, wherein:
Kang further teaches
the IC component is disposed on the first outer surface of the first ETS (Para [0104]) without a solder mask layer (Kang makes no mention of a solder mask layer) at the first outer surface of the first ETS.
Regarding claim 8 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 1, wherein:
Kang further teaches
the second ETS (650) includes a second outer surface (lower edge of 650 fig 6B) including one or more exposed embedded pads disposed in a third dielectric layer. (256 or 656 Para [0099] where the plurality of layers may look like a layer between each metallization layers giving the invention three layers, like the sister embodiment shown and labeled in figure 5e, or some other configuration).
Regarding claim 9 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 8, further comprising:
Kang further teaches
one or more solder joints (Para [0038][0027] Fig 1) connecting the one or more exposed embedded pads (Para [0038]) to one or more metal terminals (Para[0081]) of a printed circuit board. (116 Para [0041][0027][0038][0037][0081])
Regarding claim 10 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 9, wherein:
Kang further teaches
the second outer surface of the second ETS (bottom of 650) is disposed on the printed circuit board (116 Para [0041][0027][0038][0037][0081]) without an intermediate solder mask layer (Kang make no mention of a solder mask) formed on the second outer surface of the second ETS.
Regarding claim 11 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 1, wherein:
Kang further teaches
the first ETS and the second ETS are each multilayer ETS structures. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Regarding claim 12 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 11, wherein:
Kang further teaches
the first ETS is a three-layer ETS structure;
the second ETS is a three-layer ETS structure; or
a combination thereof. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Regarding claim 13 Kang or alternatively Kang in view of Patten teaches
The electronic device of claim 1,
Kang further teaches
wherein the electronic device comprises at least one of:
a music player; a video player; an entertainment unit; a navigation device; a communications device; a mobile device; a mobile phone; a smartphone (Para[0118] Fig 9);
a personal digital assistant; a fixed location terminal; a tablet computer, a computer; a wearable device; a laptop computer; a server; an internet of things (IoT) device; or a device in an automotive vehicle.
Regarding claim 14 Kang teaches
A substrate (200 or 600, Para [0015]) comprising:
at least two stacked embedded trace substrates (ETS) overlying one another (Fig 6D element 610 and 650 Para[0040] [0015]);
a first pre-formed dielectric layer (632 Para[0103] the term pre-formed does not result in a structural difference in the final product and therefore the resulting device is the same) joining an internally facing surface (bottom edge of 610 Fig 6A) of a first ETS (610) of the at least two stacked ETS with an internally facing surface (top edge of 650 Fig 6B) of a second ETS (650) of the at least two stacked ETS; and
a first set of one or more metal structures extending through the first pre-formed dielectric layer (630 and 634 extend through 632) and connecting a first set of one or more metal structures at the internally facing surface of the first ETS (620 and the material, that goes deeper into 610, that it is attached to in Fig 6A) with a second set of one or more metal structures at the internally facing surface of the second ETS. (620 and the material, that goes deeper into 650, that it is attached to in Fig 6B)
Alternatively, Patten teaches two similar electrical layers (106 and 101) being connected by a dielectric layer (108). Patten teaches, interchangeably, both applying the dielectric as a liquid as alleged in Kang or as a preformed film and them heated and applied with pressure as claimed in the instant application (Patten Para[0025]) therefore
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to include a pre-formed dielectric layer, as described in Patten because the modification has been noted as a simple substitution of two known methods of applying the dielectric material previously in the art (Patten Para [0025])
Regarding claim 15 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 14, wherein:
Kang further teaches
the first set of one or more metal structures at the internally facing surface of the first ETS comprises one or more raised pads (the portion of 620 in 610 of fig 6a that is protruding out from the insulating layers); and
the second set of one or more metal structures at the internally facing surface of the second ETS comprises one or more embedded pads. (the portion of 620 in 650 of fig 6b that sits recessed and further deep in the insulating layers )
Regarding claim 16 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 15,
wherein the first set of one or more metal structures (Kang Fig 6A-D elements 630 and 634) extending through the first pre-formed dielectric layer comprises:
at least one metallized bump (Kang 634) disposed between at least one of the one or more embedded pads of the second ETS and at least one of the one or more raised pads of the first ETS. (Kang Fig 2 or fig 6A-6D)
Regarding claim 17 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 16, wherein:
Kang further teaches
the at least one metallized bump(fig 6A-D element 634 Para [0027][0101] ) is formed from a metal different (Para [0030][0097]) than a metal used to form the one or more embedded pads and the one or more raised pads.
Regarding claim 18 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 14, wherein:
Kang further teaches
the first ETS (610) includes a first outer surface (top edge of 610 of Fig 6A) including one or more embedded pads (620) disposed in a second dielectric layer. (616 Para [0044])
Regarding claim 19 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 14, wherein:
Kang further teaches
the second ETS (650) includes a second outer surface ((lower edge of 650 fig 6B) including one or more exposed embedded pads disposed in a third dielectric layer. (656 Para [0099])
Regarding claim 20 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 14, wherein:
Kang further teaches
the first ETS and the second ETS are each multilayer ETS structures. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Regarding claim 21 Kang or alternatively Kang in view of Patten teaches
The substrate of claim 20, wherein:
Kang further teaches
the first ETS is a three-layer ETS structure;
the second ETS is a three-layer ETS structure; or
a combination thereof. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Claim(s) 22-30 is/are rejected under 35 U.S.C. 103 as being unpatentable over Kang, and further in view of Patten.
Regarding claim 22 Kang teaches
A method of fabricating a substrate, comprising:
aligning at least two stacked embedded trace substrates (ETS) (Fig 6D element 610 and 650 Para[0040] [0015]) to overlie one another, wherein the at least two stacked ETS include a first ETS (610) having an internally facing surface (bottom edge of 610 Fig 6A) having a first set of one or more metal connectors (620 and the material, that goes deeper into 610, that it is attached to in Fig 6A), and a second ETS(650) having an internally facing surface (top edge of 650 Fig 6B) having a first set of one or more metal structures (620 and the material, that goes deeper into 650, that it is attached to in Fig 6B);
aligning a first dielectric layer (632 Para[0103]) between the internally facing surface of the first ETS and the internally facing surface of the second ETS; and
joining, the internally facing surface of the first ETS and the internally facing surface of the second ETS with the first dielectric layer, wherein the joining connects at least one metal structure of the first set of one or more metal connectors (620 of 610) at the internally facing surface of the first ETS with at least one metal structure of the first set of one or more metal structures at the internally facing surface of the second ETS. (620 of both 610 and 650 are joined)
Kang although describes the same device the method is not relied upon to teach
a first pre-formed dielectric layer and joining, using a hot-press operation with the first pre-formed dielectric layer
teaches two similar electrical layers (106 and 101) being connected by a dielectric layer (108). Patten teaches, interchangeably, both applying the dielectric as a liquid as alleged in Kang or as a preformed film and them heated and applied with pressure as claimed in the instant application (Patten Para[0025]) therefore teaches
a first pre-formed dielectric layer(108) and joining, using a hot-press operation(Patten Para[0025]) with the first pre-formed dielectric layer
It would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to include a pre-formed dielectric layer, as described in Patten because the modification has been noted as a simple substitution of two known methods of applying the dielectric material previously in the art (Patten Para [0025])
Regarding claim 23 Kang in view of Patten teaches
The method of claim 22, wherein:
Kang further teaches
the first set of one or more metal connectors at the internally facing surface of the first ETS includes one or more raised pads (the portion of 620 in 610 of fig 6a that is protruding out from the insulating layers.); and
the first set of one or more metal structures at the internally facing surface of the second ETS include one or more embedded pads. (the portion of 620 in 650 of fig 6b that sits recessed and further deep in the insulating layers )
Regarding claim 24 Kang in view of Patten teaches
The method of claim 23, further comprising:
Kang further teaches
forming at least one metallized bump (fig 6A-D element 634 Para [0027][0101] )disposed between at least one embedded pad of the second ETS and at least one raised pad of the first ETS. (fig 2 or fig 6A-6D)
Regarding claim 25 Kang in view of Patten teaches
The method of claim 24, wherein:
Kang further teaches
the at least one metallized bump (fig 6A-D element 634 Para [0027][0101] ) is formed from a metal different (Para [0030][0097]) than a metal used to form the at least one embedded pad of the second ETS and the at least one raised pad of the first ETS.
Regarding claim 26 Kang in view of Patten teaches
The method of claim 22, wherein:
Kang further teaches
the first ETS (610)includes a first outer surface (top edge of 610 of Fig 6A) having one or more embedded pads (620)disposed in a second dielectric layer. (616 Para [0044])
Regarding claim 27 Kang in view of Patten teaches
The method of claim 22, wherein:
Kang further teaches
the second ETS (650) includes a second outer surface (lower edge of 650 fig 6B) having one or more exposed embedded pads disposed in a third dielectric layer. (656 Para [0099] where the plurality of layers may look like a layer between each metallization layers giving the invention three layers, like the sister embodiment shown and labeled in figure 5e, or some other configuration).
Regarding claim 28 Kang in view of Patten teaches
The method of claim 22, wherein:
Kang further teaches
the first ETS and the second ETS are each multilayer ETS structures. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Regarding claim 29 Kang in view of Patten teaches
The method of claim 22,
Kang further teaches
further comprising: forming the first ETS(Fig 6A-D 610); and forming the second ETS. (650) (they exist therefore they were formed)
Regarding claim 30 Kang in view of Patten teaches
The method of claim 29, wherein:
Kang further teaches
the first ETS is formed as a three-layer ETS structure;
the second ETS is formed as a three-layer ETS structure; or
the first ETS and second ETS are each formed as three-layer structures. (250 and 210 and thusly 610 and 650 each could have a three-layer ETS structure defined by the three dielectric layers Para [0044][0099])
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAIME LYNN SPRENGER whose telephone number is (571)272-8444. The examiner can normally be reached Monday - Friday, 9:00a.m. - 5:00p.m. ET..
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, SUE PURVIS can be reached at 571-272-1236. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/JAIME LYNN SPRENGER/ Examiner, Art Unit 2893
/SUE A PURVIS/ Supervisory Patent Examiner, Art Unit 2893
Prosecution Insights