Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-9, 11-20 is/are rejected under 35 U.S.C. 103 as being obvious over Kim (hereinafter Kim, US 2022/0399296) in view of Yim et al. (hereinafter Yim, US 2021/0257305).
In regards to independent claim 1, Kim teaches a semiconductor package comprising:
a substrate (101) (Kim, Fig. 1);
an element (200) on the substrate (101) (Kim, Fig. 1); and
a connection terminal (PS) connecting the substrate (101) to the element (210) (Kim, Fig. 2),
the substrate (101) comprising
a base portion (103) comprising an element pad (130) connected to the connection terminal (PSU) (Kim, Fig. 2); and
an upper insulating layer (140) on the base portion (103) to expose at least a portion of the base portion (Kim, Fig. 6),
the element (210) in contact (240) with the upper insulating layer (140) (Kim, Fig. 6), and
a thickness of the connection terminal (PS) and a thickness of the upper insulating layer (140) being equal to each other (Kim, Fig. 6, The top and bottom of the PSU and layer 140 are flush).
Kim fails to explicitly teach that the element is a passive element.
Yim teaches that the attached element could be a passive element (Yim, [0031], a plurality of individual devices of various types may be formed on the active surface of the semiconductor substrate 110. The plurality of individual devices may include…a passive device”).
It would have been obvious to one of ordinary skill in the art, having the teachings of Kim and Yim before him before the effective filing date of the claimed invention, to modify the semiconductor package connection taught by Kim to include the passive element of Yim in order to obtain a semiconductor package connection that includes a passive device. One would have been motivated to make such a combination because it allows reduced PCB space and enhanced performance via shorter electrical paths by applying passive elements through a semiconductor package to a substrate.
In regards to dependent claim 2, Yim teaches wherein the thickness of the upper insulating layer is 30 μm or less (Yim, [0054]). It would have been obvious to one of ordinary skill in the art, having the teachings of Kim and Yim before him before the effective filing date of the claimed invention, to modify the semiconductor package connection taught by Kim to include the passive element of Yim in order to obtain a semiconductor package connection that includes a passive device. One would have been motivated to make such a combination because it allows reduced PCB space and enhanced performance via shorter electrical paths by applying passive elements through a semiconductor package to a substrate.
In regards to dependent claim 3, Kim teaches wherein
the passive element includes an insulating portion and a conductive portion surrounding the insulating portion (Kim, Fig. 1, 400), and
the conductive portion is electrically connected to the connection terminal (Kim, Fig. 2, 204).
In regards to dependent claim 4, Kim teaches wherein comprising:
a semiconductor chip on the substrate and spaced apart from the passive element in a first direction (Kim, Fig. 5, Item 200-2); and
a connection structure connecting the substrate to the semiconductor chip (Kim, Fig. 5, 205),
wherein the upper insulating layer is spaced apart from the semiconductor chip (Kim, Fig. 5, 203).
In regards to dependent claim 5, Kim teaches wherein the semiconductor package of claim 1, wherein
the substrate further comprises vias penetrating the base portion (Kimg, Fig. 1, 130), and
the passive element is electrically connected to the vias through the connection terminal and the element pad (Kim, Fig. 2, PS).
In regards to dependent claim 6, Kim teaches wherein, wherein
the upper insulating layer comprises an insulating structure and a dam (Kim Fig. 2, 106),
the passive element is in contact with the dam (Kim, Fig. 2, 106 and 240), and
the passive element is spaced apart from the insulating structure (Kim, Fig. 4A, 140).
In regards to dependent claim 7, Kim teaches wherein a shape of the dam is a polygonal shape (Kim, Fig. 4A, 140).
In regards to dependent claim 8, Kim teaches wherein the dam includes a plurality of dams (Kim, Fig. 2, 106 left and right).
In regards to dependent claim 9, Kim teaches wherein
the insulating structure includes:
a first sidewall extending in a first direction (Kim, Fig. 4A, Y axis);
a second sidewall extending in a second direction intersecting the first direction (Kim, Fig. 4A, x axis); and
a corner at which the first sidewall meets the second sidewall, and the dam is in contact with the corner (Kim, Fig. 4A, the corner of 106).
In regards to independent claim 11, Kim teaches a semiconductor package comprising:
a substrate (101) (Kim, Fig. 2);
a element (210) on the substrate (Kim, Fig. 2); and
a connection terminal (PS) connecting the substrate to the passive element (Kim, Fig. 2),
the substrate comprising a base portion (103) comprising an element pad (130) connected to the connection terminal (PS) (Kim, Fig. 2); and
an upper insulating layer (140) on the base portion to expose at least a portion of the base portion (130) (Kim, Fig. 2),
the upper insulating layer (140) comprising
a dam (106) in contact with the element (Kim, Fig. 2); and
an insulating structure (140) spaced apart from the element (Kim, Fig. 2, Fig. 1 extends beyond 200), and
the dam being surrounded by the insulating structure (Kim, Fig. 4A, Item 106 is surround by 107).
Kim fails to explicitly teach that the element is a passive element.
Yim teaches that the attached element could be a passive element (Yim, [0031], a plurality of individual devices of various types may be formed on the active surface of the semiconductor substrate 110. The plurality of individual devices may include…a passive device”).
It would have been obvious to one of ordinary skill in the art, having the teachings of Kim and Yim before him before the effective filing date of the claimed invention, to modify the semiconductor package connection taught by Kim to include the passive element of Yim in order to obtain a semiconductor package connection that includes a passive device. One would have been motivated to make such a combination because it allows reduced PCB space and enhanced performance via shorter electrical paths by applying passive elements through a semiconductor package to a substrate.
In regards to dependent claim 12, Kim teaches the semiconductor package of claim 11, wherein
the insulating structure includes:
a first sidewall extending in a first direction; a second sidewall extending in a second direction intersecting the first direction; a third sidewall spaced apart from the first sidewall in the second direction; a fourth sidewall spaced apart from the second sidewall in the first direction (Kim, Fig, 4A, 140 has a sidewall on x axis and yaxis),
a first corner at which the first sidewall meets the second sidewall; a second corner at which the second sidewall meets the third sidewall; a third corner at which the third sidewall meets the fourth sidewall; and a fourth corner at which the first sidewall meets the fourth sidewall (Kim, Fig. 4A, 106 has four corners that touch different sidwalls).
Kim fails to explicitly teach that the element is a passive element.
Yim teaches that the attached element could be a passive element (Yim, [0031], a plurality of individual devices of various types may be formed on the active surface of the semiconductor substrate 110. The plurality of individual devices may include…a passive device”).
It would have been obvious to one of ordinary skill in the art, having the teachings of Kim and Yim before him before the effective filing date of the claimed invention, to modify the semiconductor package connection taught by Kim to include the passive element of Yim in order to obtain a semiconductor package connection that includes a passive device. One would have been motivated to make such a combination because it allows reduced PCB space and enhanced performance via shorter electrical paths by applying passive elements through a semiconductor package to a substrate.
In regards to dependent claim 13, Kim teaches the semiconductor package of claim 12, wherein
the dam includes first to fourth dams on the substrate (Fig. 2, 4 106s),
the first dam is in contact with the first corner, the second dam is in contact with the second corner,
the third dam is in contact with the third corner, and the fourth dam is in contact with the fourth corner (Kim, Fig. 4A, Corner of 106).
In regards to dependent claim 14, Kim teaches the semiconductor package of claim 12, wherein
the element pad includes a plurality of element pads (Fig. 2 multiple PS),
the dam includes first and second dams on the element pads (Fig. 2, Left and right 106),
the first dam is in contact with the second sidewall and is spaced apart from the first corner and the second corner, and the second dam is in contact with the fourth sidewall and is spaced apart from the third corner and the fourth corner (Kim, Fig. 4A, Corner of 106)..
In regards to dependent claim 15, Kim teaches the semiconductor package of claim 12, wherein
the element pad includes a plurality of element pads, (Fig. 2 multiple PS)
the dam includes first to fourth dams on the element pads (Fig. 2, 4 106s)
the first dam is in contact with the first sidewall and is spaced apart from the first corner and the fourth corner, the second dam is in contact with the second sidewall and is spaced apart from the first corner and the second corner, the third dam is in contact with the third sidewall and is spaced apart from the second corner and the third corner, and the fourth dam is in contact with the fourth sidewall and is spaced apart from the third corner and the fourth corner (Kim, Fig. 4A, Corner of 106).
In regards to dependent claim 16, Kim teaches the semiconductor package of claim 11, wherein
a width of the dam in a first direction is 3 mm or less, and a length of the dam in a second direction intersecting the first direction is 3 mm or less (Kim, [0027-0029]).
In regards to dependent claim 17, Kim teaches the semiconductor package of claim 11, wherein a level of a top surface of the insulating structure is a same level as a level of a bottom surface of the passive element (Kim, Fig. 2, 240, 140).
In regards to dependent claim 18, Kim teaches the semiconductor package of claim 11, wherein thicknesses of the connection terminal, the insulating structure and the dam are equal to each other (Kim, Fig. 6, The top and bottom of the PSU and layer 140 are flush).
In regards to independent claim 19, Kim teaches a semiconductor package comprising:
a substrate (101) (Kim, Fig. 2);
a element (210) on the substrate (101) (Kim, Fig. 2);
a connection terminal (PS) connecting the substrate to the element (Kim, Fig. 2); and
a molding layer (400) surrounding the element and the connection terminal (Kim, Fig. 1),
the substrate (101) comprising
a base portion (103) comprising an element pad (130) connected to the connection terminal (PS) (Kim, Fig. 2); and
an upper insulating layer (140) on the base portion (103) to expose at least a portion of the base portion (Kim, Fig. 2),
the upper insulating layer (140) comprising
a dam (106) in contact with the element (Kim, Fig. 2); and
an insulating structure (140) spaced apart from the element (Kim, Fig. 4A),
the insulating structure including
a first sidewall extending in a first direction (Kim, Fig. 4A, Along Y-axis);
a second sidewall extending in a second direction intersecting the first direction (Kim, Fig. 4A, Along X-axis); and
a corner at which the first sidewall meets the second sidewall, the dam in contact with the corner (Kim, Fig. 4A, Corner on 106)), and
the connection terminal (PS), the insulating structure (140) and the dam (106) are at a same level (Kim, Fig. 2, the top of PS, 140 and 160 are flush).
Kim fails to explicitly teach that the element is a passive element.
Yim teaches that the attached element could be a passive element (Yim, [0031], a plurality of individual devices of various types may be formed on the active surface of the semiconductor substrate 110. The plurality of individual devices may include…a passive device”).
It would have been obvious to one of ordinary skill in the art, having the teachings of Kim and Yim before him before the effective filing date of the claimed invention, to modify the semiconductor package connection taught by Kim to include the passive element of Yim in order to obtain a semiconductor package connection that includes a passive device. One would have been motivated to make such a combination because it allows reduced PCB space and enhanced performance via shorter electrical paths by applying passive elements through a semiconductor package to a substrate.
In regards to dependent claim 20, Kim teaches wherein the insulating structure and the dam include different insulating materials (Kim, [0033], [0026]).
Allowable Subject Matter
Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to disclose or teach an obvious combination of the following limitations when taken with the claim as a whole:
Claim 10:
wherein the insulating structure and the dam include a same material, and the insulating structure and the dam are connected to each other without a boundary therebetween.
.
Conclusion
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/WILLIAM C TRAPANESE/Primary Examiner, Art Unit 2812
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