Prosecution Insights
Last updated: August 18, 2026
Application No. 18/410,886

SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Final Rejection §102§103
Filed
Jan 11, 2024
Priority
Feb 24, 2023 — JP 2023-027256
Examiner
AHMED, SHAHED
Art Unit
2813
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Mitsubishi Electric Corporation
OA Round
2 (Final)
91%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
91%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
903 granted / 995 resolved
+22.8% vs TC avg
Minimal -0% lift
Without
With
+-0.1%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
51 currently pending
Career history
1034
Total Applications
across all art units

Statute-Specific Performance

§101
2.4%
-37.6% vs TC avg
§103
53.9%
+13.9% vs TC avg
§102
21.8%
-18.2% vs TC avg
§112
17.6%
-22.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 995 resolved cases

Office Action

§102 §103
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The amendment filed on 05/27/2026 under 37 CFR 1.131 has been considered but is ineffective to overcome the cited references below. Applicant argues that Chen fails to teach amended limitation “the source electrode is disposed on the TEOS film”. The examiner would like to note that Chen teaches the amended limitation as shown in the annotated figure below: PNG media_image1.png 678 816 media_image1.png Greyscale DETAILED ACTION This action is responsive to application No. 18410886 filed on 01/11/2024. Information Disclosure Statement Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS has been considered. Priority Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file. Allowable subject matter Claims 13-15 are objected to as being dependent upon a rejected base claim (independent claim 1), but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is an examiner’s statement of reasons for allowance: The closest prior art known to the Examiner is listed on the PTO 892 forms of record. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Chen (US 2021/0125889). With respect to dependent claims 13-15, the cited prior art does not anticipate or make obvious, inter alia, the step of: “a buffer film interposed between the electrode and the semi-insulating film, wherein the buffer film is lower in hardness than the semi-insulating film”. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-2, 4-5, 10-11 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen (US 2021/0125889). Regarding independent claim 1, Chen teaches a semiconductor device comprising: PNG media_image1.png 678 816 media_image1.png Greyscale a semiconductor substrate (Fig. 2, elements 2, 3); a TEOS film (Fig. 2, element 51, paragraph 0038); and an electrode (Fig. 2, element 15), wherein the semiconductor substrate has a first principal surface and a second principal surface opposite to the first principal surface (Fig. 2), the semiconductor substrate has an active region (Fig. 2, element CR) and a termination region (Fig. 2, element TR) surrounding the active region when the second principal surface is viewed along a direction of a normal to the second principal surface, the electrode has a source electrode (Fig. 2, element 15), and the TEOS film is disposed on a part of the second principal surface located in the active region (Fig. 2), and the source electrode is disposed on the TEOS film (see annotated figure). Regarding claim 2, Chen teaches further comprising a thermal oxide film interposed between the second principal surface and the TEOS film (paragraph 0038 discloses “The silicon oxide films 5 and 51 can be made up of a thermo-oxidative silicon oxide film (thermal oxide film), a tetraethylorthosilicate (TEOS) oxide film containing boron (B) and phosphorus (P) (BPTEOS film), or a multilayer film of thermal oxide film and BPTEOS film”. Regarding claim 4, Chen teaches further comprising a semi-insulating film (Fig. 2, element 7, paragraph 0040) disposed on the TEOS film to cover the electrode. Regarding claim 5, Chen teaches further comprising a semi-insulating film (Fig. 2, element 7, paragraph 0040) disposed on the TEOS film to cover the electrode. Regarding claim 10, Chen teaches further comprising an organic insulating film disposed on a part of the semi-insulating film disposed on the electrode (paragraph 0078 discloses polyimide resin). Regarding claim 11, Chen teaches further comprising an organic insulating film disposed on a part of the semi-insulating film disposed on the electrode (paragraph 0078 discloses polyimide resin). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3, 6, 9, 12 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2021/0125889) in view of Takahashi (US 2014/0299962). Regarding claim 3, Chen teaches all of the limitations as discussed above. Chen does not explicitly disclose further comprising a conductor portion disposed in the thermal oxide film, wherein the conductor portion is electrically floating. Takahashi teaches an IGBT comprising a conductor portion (Fig. 1, element 18) disposed in the oxide film (Fig. 1, element 16), wherein the conductor portion is electrically floating (paragraph 0029). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Chen according to the teachings of Takahashi with the motivation to provide a stable withstand voltage (paragraph 0002). Regarding claim 6, Chen modified by Takahashi teach further comprising a semi-insulating film (Fig. 2, element 7, paragraph 0040 of Chen) disposed on the TEOS film to cover the electrode. Regarding claim 9, Chen modified by Takahashi teach wherein a thickness of the semi-insulating film is greater than or equal to 1.2 μm (paragraph 0072-0073 of Chen discloses that the thickness of the semi-insulating layer can vary with the motivation to suppress reduction in withstand voltage. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness as Chen has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at claimed thickness, in order to achieve the desired withstand voltage, as taught by Chen, MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the thickness is for a particular purpose that is critical to the overall claimed invention). Regarding claim 12, Chen modified by Takahashi teach further comprising an organic insulating film disposed on a part of the semi-insulating film disposed on the electrode (paragraph 0078 of Chen discloses polyimide resin). Claims 7-8 are rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2021/0125889) in view of Takahashi (US 2014/0299962). Regarding claim 7, Chen teaches wherein a thickness of the semi-insulating film is greater than or equal to 1.2 μm (paragraph 0072-0073 discloses that the thickness of the semi-insulating layer can vary with the motivation to suppress reduction in withstand voltage. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness as Chen has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at claimed thickness, in order to achieve the desired withstand voltage, as taught by Chen, MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the thickness is for a particular purpose that is critical to the overall claimed invention). Regarding claim 8, Chen teaches wherein a thickness of the semi-insulating film is greater than or equal to 1.2 μm (paragraph 0072-0073 discloses that the thickness of the semi-insulating layer can vary with the motivation to suppress reduction in withstand voltage. Therefore, the thickness is an art recognized variable. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the thickness as Chen has identified the thickness as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at claimed thickness, in order to achieve the desired withstand voltage, as taught by Chen, MPEP 2144.05. Furthermore, the applicant has not presented persuasive evidence that the thickness is for a particular purpose that is critical to the overall claimed invention). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Chen (US 2021/0125889) in view of Zhang et al. (CN 203481237 U). Regarding Independent claim 16, Chen teaches a method for manufacturing a semiconductor device, comprising: PNG media_image1.png 678 816 media_image1.png Greyscale preparing a semiconductor substrate (Fig. 2, elements 2, 3) having a first principal surface and a second principal surface opposite to the first principal surface, the semiconductor substrate having an active region (Fig. 2, element CR) and a termination region (Fig. 2, element TR) surrounding the active region when the second principal surface is viewed along a direction of a normal to the second principal surface; forming a TEOS film (Fig. 2, element 51, paragraph 0038) on a part of the second principal surface located in the active region; and forming an electrode (Fig. 2, element 15) on the TEOS film, the electrode having a source electrode (Fig. 2, element 15), and the source electrode being disposed on the TEOS film (see annotated figure). Chen does not explicitly disclose the electrode being formed by sputtering of a constituent material of the electrode with the semiconductor substrate heated to 400° C. or higher. Zhang et al. teach a method of forming an IGBT comprising forming by sputtering of a constituent material of the electrode with the semiconductor substrate heated to 400° C. or higher (paragraph 0065). It would have been obvious to one of ordinary skill in the art before the effective filling date of the invention to modify the teachings of Chen according to the teachings of Zhang et al. with the motivation to provide a fully self-aligned device with the field stop layer (paragraph 0015). Conclusion THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SHAHED AHMED whose telephone number is (571)272-3477. The examiner can normally be reached M-F 9-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Steven Gauthier can be reached on 571-270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SHAHED AHMED/Primary Examiner, Art Unit 2813
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Prosecution Timeline

Jan 11, 2024
Application Filed
Feb 27, 2026
Non-Final Rejection mailed — §102, §103
May 27, 2026
Response Filed
Jul 21, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
91%
Grant Probability
91%
With Interview (-0.1%)
1y 11m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 995 resolved cases by this examiner. Grant probability derived from career allowance rate.

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