Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Objections
Claim 6 is objected to because of the following informalities: in line 2 the word layer is misspelled. Appropriate correction is required.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Shima et al., US 2023/0178569 in view of Ohshima, US 2010/0072574.
Shima et al. shows the invention substantially as claimed including a semiconductor device comprising:
An oxide semiconductor layer including a polycrystalline structure 108;
A gate electrode 112 facing the oxide semiconductor layer;
A gate insulating layer 110 between the oxide semiconductor layer and the gate electrode;
A first transparent conductive layer 120a connected to the oxide semiconductor layer; and
A second transparent conductive layer 120b arranged in the same layer as the first transparent conductive layer and separated from the first transparent conductive layer (see fig. 1 and paragraphs 0093-0195).
Shima et al. does not expressly disclose where crystallizability of the first transparent conductive layer is different from the crystallizability of the second transparent conductive layer. However, Ohshima discloses forming different layers of different crystallinity values (see, for example, paragraph 0038). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the transparent conductive layer of Shima et al. using different crystallinity values because in such a way different ITO layers can be electrically disconnected from each other without requiring other processing steps such as photolithography to isolate the different layers.
Regarding dependent claims 2 and 8, note that in Shima et al. each of the first transparent conductive layer and the second transparent conductive layer includes indium and tin (see, for example, paragraphs 0113-0122).
Concerning dependent claims 3 and 9 and the specific concentration of the oxide semiconductor layer, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to determine through routine experimentation the optimum concentration of the indium and tin elements in the semiconductor layer and such limitation would not lend patentability to the instant invention absent a showing of unexpected results.
As to dependent claims 4 and 10, note that Shima et al. discloses wherein the gate electrode 112, the first transparent conductive layer 120a, and the second transparent conductive layer 120b are arranged above the semiconductor layer.
With respect to dependent claims 5 and 11, note that Shima et al. discloses: a first insulating layer (for example, insulating layer above gate electrode 112 in fig. 3A) arranged above the oxide semiconductor layer and the gate electrode and arranged with a first opening;
A metal layer (for example, 120a/320a) arranged above the first insulating layer and connected to the oxide semiconductor layer via the first opening, and a second insulating layer arranged above the first insulating layer, wherein the first insulating layer and the second insulating layer are arranged with a second opening, and the first transparent conductive layer is connected to the oxide semiconductor layer via the first opening (see figs. 3a-3b and 4a-4b and their descriptions).
Concerning dependent claim 6, note that the device of Shima et al. modified by Ohshima further comprises: an insulating layer (for example, 110) in contact with bottom surfaces of the first and second transparent conductive layers.
Regarding independent claim 7, Shima et al. discloses a semiconductor device comprising:
An oxide semiconductor layer 108 including a polycrystalline structure;
A gate electrode 112 opposed to the oxide semiconductor layer;
A gate insulating layer 110 between the oxide semiconductor layer and the gate electrode; and a first transparent conductive layer connected to the oxide semiconductor layer in a first region in a plan view (see fig. 1 and paragraphs 0093-0195) .
Shima et al. does not expressly disclose where crystallizability of the first transparent conductive layer is different from the crystallizability of the second transparent conductive layer. However, Ohshima discloses forming different layers of different crystallinity values so as to separate different device features (see, for example, paragraph 0038). In view of this disclosure, it would have been obvious to one of ordinary skill in the art at the time the invention was filed to form the transparent conductive layer of Shima et al. using different crystallinity values because in such a way different ITO layers can be electrically disconnected from each other without requiring other processing steps such as photolithography to isolate the different layers.
As to dependent claim 12, note that in the semiconductor device of Shima et al. modified by Ohshima the first transparent conductive layer in the first region and the first transparent conductive layer in the second region are continuous.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
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/RICHARD A BOOTH/ Primary Examiner, Art Unit 2812
July 23, 2026
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