DETAILED ACTION
1. This Office Action is responsive to the application filed on January 12, 2024. Claims 1-9 are pending
Information Material to Patentability
2. Applicant is reminded of the continuing obligation under 37 CFR 1.56, to timely apprise the Office of any information which is mate-rial to patentability of the claims under consideration in this reissue appli-cation.
These obligations rest with each individual associated with the filing and prosecution of this application for reissue. See also MPEP §§ 1404, 1442.01 and 1442.04.
Notice of Pre-AIA or AIA Status
3. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
4. The disclosure is objected to because of the following informalities: The specification uses the term “memory cell” in an incorrect manner to refer to a group or an array/matrix of memory cells. Appropriate correction is required.
Drawings
5. The drawings are objected to because of the following informalities: Figures 2 and 5-7 use the term “memory cell” in an incorrect manner to refer to a group or an array/matrix of memory cells. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
6. Claims are objected to because of the following informalities: Claim numbers are enclosed in brackets. Brackets are used to show deleted matter in claim amendments. Appropriate correction is required.
Claim Rejections - 35 USC § 112
7. The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
6. Claims 1-9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the enablement requirement. The claim contains subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention.
7. Claim 1 recites the limitation “a memory cell that includes: a first region; and a second region in which writing can be performed only once”. According to the Microsoft Computer Dictionary, Fifth Edition, a “memory cell” is “An electronic circuit that stores one bit of data”. The specification does not contain sufficient disclosure to enable one skilled in the art to make and use a data storage circuit that stores one bit of data comprising two regions in which writing can be performed only once as claimed. Claims 2-9 inherit the same deficiency.
8. With respect to claim 7, the specification does not contain enabling disclosure to enable one skilled in the art to make and use a power supply device that solely consist of a memory device.
9. Claims 1-9 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
10. With respect to claim 1 and its dependent claims, there’s no written description support for the limitation “a memory cell that includes: a first region; and a second region in which writing can be performed only once”.
11. With respect to claim 7, the specification does not disclose a power supply device that comprises memory with no other power supply related structure.
12. With respect to claims 8, the specification does not provide support for the limitation “wherein the first region information is information on a setting value of an output voltage of the power supply circuit” as claimed. According to the specification, the first region stores address and counters to copy information from the second region to a register.
13. With respect to claims , the specification does not provide support for the limitation “wherein the first region information is information on a setting value of a threshold voltage for detecting the abnormality with the detector” as claimed. According to the specification, the first region stores address and counters to copy information from the second region to a register.
14. The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
15. Claims 1-9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
16. Claim 1 recites the limitation “a memory cell that includes a first region; and a second region in which writing can be performed only once”. According to the Microsoft Computer Dictionary, Fifth Edition a “memory cell” is “An electronic circuit that stores one bit of data”. It is not clear how a data storage circuit that stores one bit of data can comprise two regions.
17. Claim 1 recites the limitation “wherein first region information on a region in which data to be written to a register is stored and second region information on a region of the register to which the data is written can be written to the first region”. This limitation can be interpreted in many different ways, some of which can be incomprehensible or incomplete. For example, it is not clear what the limitation “first region information on a region in which data to be written to a registered is stored” means and where the information is to be stored. Plain meaning of the “first region information” is information about the first region, not information about a region in a register as recited. It is also not clear what the limitation “second region information on a region of the register to which the data is written can be written to the first region” means.
18. Claim 1 also recites the limitation “the control unit performs writing to the register” which is a method step performed in a device claim. A hybrid claim that straddles two statutory categories is indefinite.
19. Claims 2-9 depend from claim 1. They are rejected for the reasons discussed above.
Claim Rejections - 35 USC § 102
20. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
21. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
22. Claims 1, 3, and 4 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2013/0227235 (“Berenbaum”).
23. With respect to claim 1, Berenbaum discloses a memory device comprising:
a memory cell (FIG. 1, 104) that includes:
a first region (FIG. 4, Descriptor 404, Address part); and
a second region (Descriptor 404, Data part) in which writing can be performed only once; and
a control unit (FIG. 1, controllers 110 and 106),
wherein first region information on a region of the second region in which data to be written to a register is stored and second region information on a region of the register to which the data is written can be written to the first region (this limitation is inherent in any memory that can be written to), and
the control unit performs writing to the register from the second region based on the first region information and the second region information stored in the first region (paragraph [0024], “In operation, the data parts of the descriptors are written to the memory locations specified in the corresponding address parts, thereby configuring the SoC 100”).
24. With respect to claim 3, Berenbaum discloses, the memory device according to claim 1, wherein in the first region, writing can be performed only once, and the first region includes a region to which the first region information (information in the first region) and the second region information (address to write the data part, i.e., the second region information) are written and a region to which information indicating whether or not the first region information and the second region information have been written is written (paragraph [0026], “In some cases, each descriptor can contain a valid bit”).
25. With respect to claim 4, Berenbaum discloses, the memory device according to claim 3, wherein the information indicating whether or not the first region information and the second region information have been written is a count value represented by 1 bit (paragraph [0026]).
26. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2014/0297928 (“Moschopoulos”).
Moschopoulos discloses a memory device comprising:
a memory cell (FIG. 2, 12) that includes:
a first region (FIG. 2, OTP Header 9); and
a second region (Application Area 8) in which writing can be performed only once; and
a control unit (18),
wherein first region information on a region of the second region in which data to be written to a register is stored and second region information on a region of the register to which the data is written can be written to the first region (this limitation is inherent in any memory that can be written to), and
the control unit performs writing to the register from the second region based on the first region information and the second region information stored in the first region (FIG. 3, steps 45 and 46; see also abstract).
Claim Rejections - 35 USC § 103
27. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
28. Claims 1, 7, and 8 are rejected under 35 U.S.C. 103 as being unpatentable over US 6,728,137 (“Lin”) in view of US 2014/0223153 (“Hsieh”).
29. With respect to claim 1, Lin discloses a memory device comprising:
a memory cell (Fig. 2, 30) that includes:
a first region (36); and
a second region in which writing can be performed only once (32); and
[a control unit,]
wherein first region information on a region of the second region in which data to be written to a register is stored and second region information on a region of the register to which the data is written can be written to the first region (this limitation is inherent in any memory that can be written to), and
[the control unit performs writing to the register from the second region based on the first region information and the second region information stored in the first region].
However, Lin does not disclose a control unit indicated above in square brackets. On the other hand, Hsieh discloses a controller that performs writing to the register from OPT memory (paragraph [0071], “the PMU controller 101 writes operating parameter data from the OPT map 106 to one or more operating registers for the power rails 120-124 after the time period “A”.”). Thus the combined teachings of Lin and Hsieh discloses the limitation the control unit (Hsieh, FIG. 1, 101) performs writing to the register (Hsieh, paragraph [0071]) from the second region (Lin, 34) based on the first region information (Lin, 36) and the second region information stored in the first region (36 stores status of 34, i.e., second region information).
It would have been obvious to one of ordinary skill in the at the time of the invention to us Lin’s teaching of programming and reading OPT memory block to be able to update the OPT map in Hsieh’s power management system after the initial testing and installation. Also, simple substitution of one known element (Hsieh’s OPT) for another (Lin’s OPT) to obtain predictable results is obvious under KSR v. Teleflex.
30. With respect to claim 7, Lin and Hsieh disclose a power supply device comprising: the memory device according to claim 1 (see the rejection of claim 1 above).
31. With respect to claim 8, Lin and Hsieh disclose the power supply device according to claim 7 comprising:
a power supply circuit, wherein the first region information is information on a setting value of an output voltage of the power supply circuit (Hsieh, paragraph [0071]).
Conclusion
32. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Woo H Choi whose telephone number is (571)272-4179. The examiner can normally be reached 9 am - 5 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Hetul Patel can be reached on (571) 272-4184. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Woo H. Choi/
Primary Examiner, Art Unit 3992