DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Claims 1-10 are pending in the present application. Claims 5-10 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 05/21/2026. Applicant’s election without traverse of claims 1-4 in the reply filed on 05/21/2026 is acknowledged. Applicant’s election without traverse of species I in the reply filed on 05/21/2026 is acknowledged.
Applicant is reminded that upon the cancelation of claims to a non-elected invention, the inventorship must be corrected in compliance with 37 CFR 1.48(a) if one or more of the currently named inventors is no longer an inventor of at least one claim remaining in the application. A request to correct inventorship under 37 CFR 1.48(a) must be accompanied by an application data sheet in accordance with 37 CFR 1.76 that identifies each inventor by his or her legal name and by the processing fee required under 37 CFR 1.17(i).
Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d).
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 01/16/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Bowers (US Patent No 11,742,327).
Regarding claim 1, Bowers (US Patent No 11,742,327) teaches a method for fabricating an electronic package module (packaged electronic device 10, Figure 2A), comprising: providing an electronic component assembly (packaged electronic device 10A, Figure 4F) including a first electronic component (electronic component 16A, Figure 4F), a second electronic component (electronic component 16B, Figure 4F), a conductive structure (conductive interconnect structures 21, Figure 4F) and two conductive adhesive materials (attachment material 19 & conductive pads 165B, Figure 4F, col 7 lines 45-47 + lines 32-34 & col 8 lines 10-13, teaches attachment material, which can be similar to or different than attachment material…Attachment material can comprise a thermally conductive and electrically conductive material… ...conductive pads may comprise aluminum, aluminum alloys, copper, solderable metals, or other conductive materials as known to one of ordinary skill in the art), wherein the first electronic component is connected to the second electronic component through one of the conductive adhesive materials (attachment material 19, Figure 4F, col 7, lines 44-47 + lines 32-34, teaches Semiconductor die is attached to a top surface of semiconductor die with an attachment material, which can be similar to or different than attachment material…Attachment material can comprise a thermally conductive and electrically conductive material), and the second electronic component is connected to the conductive structure through the other one of the conductive adhesive materials (conductive pads 165B, Figure 4F, col 13, lines 24-25, teaches conductive interconnect structures electrically connected to conductive pads); providing a circuit substrate (substrate 11, Figure 4F); forming a soldering material on the circuit substrate (attachment material 18 + conductive pads 111, Figure 4F, col 7 lines 37-39 + col 8 lines 10-13, teaches In other examples, attachment material can be a solder material, such as a solder paste or other materials as known to one of ordinary skill in the art...conductive pads may comprise aluminum, aluminum alloys, copper, solderable metals, or other conductive materials as known to one of ordinary skill in the art), wherein the melting point of at least one of the conductive adhesive materials is higher than the melting point of the soldering material (col 7, lines 45-47, teaches attachment material, which can be similar to or different than attachment material); and disposing the electronic component assembly on the soldering material after the soldering material is formed (col 12, lines 7-8, teaches semiconductor die is first connected to substrate with attachment material), wherein the soldering material is located between the first electronic component and the circuit substrate (Figure 4F, col 6, lines 34-36, teaches semiconductor die is attached or connected to a substrate top surface of substrate with an attachment material), and the electronic component assembly is electrically connected to the circuit substrate through the soldering material (Figure 4F, col 7, lines 32-33, teaches Attachment material can comprise a thermally conductive and electrically conductive material), as claimed.
Regarding claim 2, Bowers (US Patent No 11,742,327) teaches method of claim 1, as claimed. Bowers (US Patent No 11,742,327) further teaches wherein providing the electronic component assembly comprising: providing a carrier (carrier substrate 511, Figure 10A); disposing the first electronic component on the carrier (col 17, lines 13-15, carrier substrate comprises a rigid material configured to support stacked semiconductor devices); disposing one of the conductive adhesive materials on the first electronic component (Figure 4F, col 7 lines 44-47 + lines 32-34, teaches Semiconductor die is attached to a top surface of semiconductor die with an attachment material, which can be similar to or different than attachment material…Attachment material can comprise a thermally conductive and electrically conductive material); adhering the second electronic component to the one of the conductive adhesive materials (Figure 4F, col 7, lines 44-45, teaches Semiconductor die is attached to a top surface of semiconductor die with an attachment material), wherein the one of the conductive adhesive materials is located between the first electronic component and the second electronic component (Figure 4F, col 7, lines 44-45, teaches Semiconductor die is attached to a top surface of semiconductor die with an attachment material); disposing the other one of the conductive adhesive materials on the second electronic component (Figure 4F, col 7, lines 50-52, teaches conductive pads disposed above, on, as part of or within semiconductor die); adhering the conductive structure to the other one of the conductive adhesive materials (Figure 4F, col 13, lines 24-25, teaches conductive interconnect structures electrically connected to conductive pads), wherein the other one of the conductive adhesive materials is located between the second electronic component and the conductive structure (Figure 4F); and removing the carrier after the conductive structure is adhered to the other one of the conductive adhesive materials (Figure 10B, col 17, lines 44-46, teaches carrier substrate is removed to expose a portion of conductive interconnect structures through a bottom surface of package body), and a surface of the first electronic component is exposed (Figure 10B), wherein the surface faces to the circuit substrate and is disposed on the soldering material (Figure 2, col 6 lines 34-36, teaches semiconductor die is attached or connected to a substrate top surface of substrate with an attachment material), as claimed.
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Regarding claim 3, Bowers (US Patent No 11,742,327) teaches the method of claim 2, as claimed. Bowers (US Patent No 11,742,327) further teaches wherein the surface is flush with an end surface of the conductive structure (end portion 216A, Figure 6), and the end surface is connected to the circuit substrate through the soldering material (Figure 4F, col 13, lines 24-26, teaches conductive interconnect structures electrically connected to conductive pads and [conductive pads]), as claimed.
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Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 4 is rejected under 35 U.S.C. 103 as being unpatentable over Bower (US Patent No 11,742,327) in view of Nam (US Patent Application Publication 2021/0292787A1).
Regarding claim 4, Bowers (US Patent No 11,742,327) teaches the method of claim 2, as claimed.
Bowers (US Patent No 11,742,327) is silent to teach heating the electronic component assembly to cure the conductive adhesive materials after the conductive structure is adhered to the other one of the conductive adhesive materials.
In an analogous art, Nam (US Patent Application Publication 2012/0292787A1) teaches heating the electronic component assembly to cure the conductive adhesive materials after the conductive structure is adhered to the other one of the conductive adhesive materials (fixing member 500, Figure 1, paragraph 0086, teaches fixing members, which are formed, for example, of a thermosetting resin, are set hard by heat applied).
Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the teachings of Bowers (US Patent No 11,742,327) by combining the conductive pad with the fixing member of Nam (US Patent Application Publication 2012/0292787A1) and heating the assembly thereby thermosetting the conductive adhesive after the conductive interconnect structure has been adhered to the second electronic component.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAREEM M MOHAMED-ALY whose telephone number is (571)270-0312. The examiner can normally be reached Monday – Friday 8am-5pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/K.M.A./Examiner, Art Unit 2898
/Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
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