Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
Specification
The title of the invention has been amended and considered descriptive. The title objection, is hereby withdrawn.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-4 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1) and Pan hereinafter Pan809 (US 2012/0241809 A1) and Freitas et al. (US 6,266,353 B1).
Regarding independent claim 1: Beach teaches (e.g., Fig. 3) a light-emitting diode (LED) structure, comprising:
a substrate ([0033]: 50), wherein a plurality of grooves ([0033]: 46) are disposed on a side of the substrate (50), and
a plurality of LED light-emitting units ([0033]: 48),
wherein each LED light-emitting unit of the plurality of LED light-emitting units (48) is located on the at least one sidewall of the groove (46).
Beach does not expressly teach that a first insulating layer is disposed on the substrate between the plurality of grooves,
wherein each groove of a plurality of grooves comprises a plurality of epitaxial sidewalls, and in a groove of the plurality of grooves,
an area of the plurality of epitaxial sidewalls is greater than a maximum opening area of the groove,
wherein each LED light-emitting unit of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls;
wherein an LED light-emitting unit of the plurality of LED light-emitting units comprises
a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence;
wherein the buffer layer, the first semiconductor layer, the active layer, and
the second semiconductor layer of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove and forms a closed loop so that one independent LED light-emitting unit is disposed in the groove.
Sawaki teaches (e.g., Fig. 10; Figs. 1-8 use for element labelling) a light-emitting diode (LED) structure, comprising:
a first insulating layer ([0076]: 52, see [0080]) is disposed on a substrate ([0103]-[0104]: 1) between a plurality of grooves ([0089]: 10),
wherein each groove of the plurality of grooves comprises at least one epitaxial sidewall ([0068] and [0115]), and in a groove ([0080]: groove with facet 61) of the plurality of grooves (groove with facet 61),
an area of the at least one epitaxial sidewall (Fig. 9; [0115]: the sidewall of the groove includes epitaxial sidewall) is greater than a maximum opening area of the groove (Fig. 9; [0115]: groove with facet 61).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode of Beach, the first insulating layer being disposed on the substrate between the plurality of grooves, wherein each groove of the plurality of grooves comprises at least one epitaxial sidewall, and in a groove of the plurality of grooves, an area of the at least one epitaxial sidewall being greater than a maximum opening area of the groove, as taught by Sawaki, for the benefits of improving the optical efficiency of light output by reducing any possible crystal structure non-epitaxial orientation.
Pan809 teaches (e.g., Figs. 1-9) an LED structure comprising a plurality of LED light-emitting units ([0045]: 370), a substrate ([0044]: 300) and grooves ([0039]: 308 part of Fig. 3S with a plurality of grooves on side 320, [0047]);
Pan809 further teaches that a first insulating layer ([0039]-[0040]: 302) is disposed on the substrate between the plurality of grooves ([0039]: 308),
wherein each groove of a plurality of grooves (308) comprises a plurality of epitaxial sidewalls ([0]039[ and 0042]: one or more buffer layers (not shown for clarity) are next formed epitaxially, see [0042]: “the buffer layer 335 and the light emitting layers 340 can be formed using … epitaxial growth”; this meets the claim limitation requirement of having a plurality of epitaxial sidewall layers since the buffer layers formed on sidewalls of the substates are epitaxial layers; this implies that the substrate is also an epitaxial material; in addition, there are 4 sidewalls, see Fig. 3C; there are a plurality of sidewalls being epitaxial sidewalls), and in a groove of the plurality of grooves (308), wherein each LED light-emitting unit (370) of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls ([0039]);
wherein an LED light-emitting unit (370) of the plurality of LED light-emitting units (370) comprises
a buffer layer ([0045]: 335), a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence;
wherein the buffer layer ([0045]: 335), a first semiconductor layer ([0055]: n-type layer), an active layer ([0045]: 340), and
a second semiconductor layer ([0055]: p-type layer) of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove (308) and forms a closed loop (Fig. 3F, shows a closed loop of sidewalls) so that one independent LED light-emitting unit (370) is disposed in the groove.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the LED structure of Beach as modified by Sawaki, the first insulating layer being disposed on the substrate between the plurality of grooves, wherein each groove of a plurality of grooves comprises a plurality of epitaxial sidewalls, and in a groove of the plurality of grooves, wherein each LED light-emitting unit of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls; wherein an LED light-emitting unit of the plurality of LED light-emitting units comprises a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence; wherein the buffer layer, the first semiconductor layer, the active layer, and the second semiconductor layer of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove and forms a closed loop so that one independent LED light-emitting unit is disposed in the groove, as taught by Pan809, for the benefits of increasing the optical power of the light emitting device, and thus improving the device functionality.
Freitas teaches (e.g., Figs. 1-5C) an LED structure comprising a plurality of LED light-emitting units and a groove sidewalls (Col. 4, Lines 42-60: #12/14);
Freitas further teaches that an area of the plurality of sidewalls (Col. 4, Lines 42-60: opening in the width direction of #12/14) is greater than a maximum opening area of the groove (Col. 4, Lines 42-60: depth of #12/14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode of Beach as modified by Sawaki, the structure, wherein an area of the plurality of sidewalls is greater than a maximum opening area of the groove, as taught by Freitas, for the benefits of increasing the areas of the light reflections and thus increasing the output light flux.
Regarding claim 2: Beach, Sawaki, Pan809 and Freitas teach the claim limitation of the LED structure of claim 1, on which this claim depends,
Beach as modified by Sawaki, Pan809 and Freitas teaches that the plurality of grooves penetrate the silicon layer (Beach: [0033]), and
a crystal orientation of Si of the plurality of epitaxial sidewall is <111> (Beach: [0033]).
Beach as modified by Sawaki does not expressly teach that the substrate is a composite substrate in which a silicon layer is made on an insulating substrate,
Lai teaches (e.g., Figs. 1-5) a light-emitting diode (LED) structure, comprising a substrate ([0030]);
Lai further teaches that the substrate is a composite substrate ([0030]) in which a silicon layer ([0030]) is made on an insulating substrate ([0030]: the substrate 10 comprises a silicon-on-insulator (SOI) substrate).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the LED structure of Beach as modified by Sawaki, the substrate being a composite substrate in which a silicon layer is made on an insulating substrate, as taught by Lai, for the benefits of protecting the bottom surface of the silicon substrate, and thus avoid contamination from humidity and other foreign particles that could travel to the light emitter device and affect the device, and thus improve the light emitting device’s reliability.
Regarding claim 3: Beach, Sawaki, Pan809 and Freitas teach the claim limitation of the LED structure of claim 1, on which this claim depends,
Beach as modified by Sawaki, Pan809 and Freitas teaches that the substrate is a silicon substrate (Beach: [0033]),
the plurality of grooves (Beach: [0033]: 46) are located on a side of the silicon substrate (Beach: [0033]), and a crystal orientation of Si of the plurality of epitaxial sidewall is <111> (Beach: [0033]);
wherein the LED structure (Sawaki: [0088]) further comprises a second insulating layer (Sawaki: 52, Fig. 9; see [0080]) located at least on bottom surfaces of the plurality of grooves (Sawaki: 61, see [0080]).
Regarding claim 4: Beach, Sawaki, Pan809 and Freitas teach the claim limitation of the LED structure of claim 2, on which this claim depends,
Beach as modified by Sawaki teaches that the in a case where a crystal orientation of Si of a surface of the substrate (Beach: [0033]) facing the first insulating layer is <100> (Sawaki: 52; se Fig. 9),
an angle between the epitaxial sidewall and a bottom surface of the groove is greater than
90
°
degrees (Beach: [0033]); or in a case where the crystal orientation of the Si of the surface of the substrate facing the first insulating layer (sawaki: 52) is <110> (Beach: [0033]),
the angle between the epitaxial sidewall and the bottom surface of the groove is greater than or equal to
90
°
(Beach: Fig. 2; [0033]; Sawaki: Fig. 9).
Regarding claim 13: Beach, Sawaki, Pan809 and Freitas teach the claim limitation of the LED structure of claim 1, on which this claim depends.
Beach as modified by Sawaki teaches that
wherein the each groove comprises a plurality of epitaxial sidewalls (Sawaki: ([0068] and [0115]), and
a plurality of LED light-emitting units (Beach: plurality of LED light-emitting units 48) emitting light of a same color (Beach: each LED light-emitting unit 48 includes only one color) are disposed on the plurality of epitaxial sidewalls of the each groove (Beach: each LED light-emitting unit is on both sides of the groove; Sawaki: Fig. 9, each LED light-emitting unit with the same color is on both sides of the groove; thus, this meets the limitation requirement as claimed; examiner notes that there is no explicit requirement that each groove includes a plurality of a plurality of LED light-emitting units, as long the plurality of LED light-emitting units are disposed on the plurality of epitaxial sidewalls of the each groove).
Claims 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1), Pan hereinafter Pan809 (US 2012/0241809 A1) and Freitas et al. (US 6,266,353 B1) as applied above and further in view of Pynn et al. (US 11,175,447 B1).
Regarding claim 8: Beach, Sawaki, Pan809, Freitas teach the claim limitation of the LED structure of claim 1, on which this claim depends.
Beach does not expressly teach that wherein the first semiconductor layer covers the buffer layer, the active layer covers the first semiconductor layer, and the second semiconductor layer covers the active layer.
Pynn teaches (e.g., Fig. 10) a light-emitting diode (LED) structure, comprising an LED light-emitting unit comprising
a buffer layer (Col. 26, Lines 24-36: 1015),
a first semiconductor layer (Col. 26, Lines 24-36: 1020),
an active layer (Col. 26, Lines 24-36: 1030), and
a second semiconductor layer (Col. 26, Lines 24-36: 1040) that are stacked in sequence (Fig. 10);
Pynn further teaches that wherein the first semiconductor layer covers the buffer layer (Pynn: Col. 26, Lines 24-36), the active layer covers the first semiconductor layer (Pynn: Col. 26, Lines 24-36), and the second semiconductor layer covers the active layer (Pynn: Col. 26, Lines 24-36).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode (LED) structure of Beach as modified by Sawaki, the LED light-emitting units comprising a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence, as taught by Pynn, for the benefits of accommodating the differences in two crystallographic structures and reducing misfit strain and misfit dislocations in the light emitting diode structure, and thus improving light emission efficiency and avoiding mechanical breakage, thus improving device reliability (Pynn: Col. 26, Lines 24-36);
Regarding claim 9: Beach, Sawaki, Pan809, Freitas, Pynn and Pynn teach the claim limitation of the LED structure of claim 8, on which this claim depends, further comprising:
a first electrode (Pynn: Col. 26, Lines 53-67: 1080) electrically connected to the second semiconductor layer (Pynn: Col. 26, Lines 24-36: 1040).
Regarding claim 10: Beach, Sawaki, Pan809, Freitas, and Pynn teach the claim limitation of the LED structure of claim 9, on which this claim depends, further comprising:
a current expansion layer (Pynn: Col. 26, Lines 53-67: 1045) located on a side of the first insulating layer facing away from the substrate,
wherein the current expansion layer (Pynn: 1045) is in contact with the second semiconductor layer (Pynn: 1040); and
the first electrode (Pynn: 1080) is electrically connected to the second semiconductor layer (Pynn: 1040) through the current expansion layer (Pynn: 1045).
Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1) and Pan hereinafter Pan809 (US 2012/0241809 A1), Freitas et al. (US 6,266,353 B1) and Pynn et al. (US 11,175,447 B1) as applied above and further in view of Raring et al. (US 9,653,642 B1) and Nunoue et al. (US 5,905,275 A).
Regarding claim 11: Beach, Sawaki and Pynn teach the claim limitation of the LED structure of claim 10, on which this claim depends,
Beach as modified by Sawaki and Pynn teaches that the LED structure further comprises a second electrode (Pynn: Col. 27, Lines 66-67 and Col, 28, Lines 1-16: #1070; corresponds to Sawaki: [0044]-[0045], [0057]-[0058]: 15),
wherein the second electrode penetrates the first insulating layer (Sawaki: second electrode 52) and is in contact with the substrate (Pynn: Col. 27, Lines 13-18: #1010; corresponds top Sawaki: substrate 1).
Beach as modified by Sawaki and Pynn does not expressly teach that the substrate and the buffer layer comprise an N-type doped material, and
the second electrode is electrically connected to the first semiconductor layer through the substrate and the buffer layer.
Raring teaches (e.g., Figs. 6a-6b) a light-emitting diode (LED) structure, comprising an LED light-emitting unit comprising:
a substrate and a buffer layer comprising an N-type doped material (Fig. 6b; the drawing is labeled with N-type doped material; Col. , Lines “the epitaxial layer structure would look very similar to that shown in FIG. 6b wherein the GaN substrate would be replaced by the foreign substrate such as sapphire, SiC, or silicon. Further, in many embodiments of heteroepitaxial growth a nucleation layer would be included on the foreign substrate underlying the buffer layer. In an embodiment, blue and green LEDs based on gallium and nitrogen containing epitaxial materials could be provided by heteroepitaxial growth of on a substrate that is not gallium nitride. These heteroepitaxial substrates may include sapphire, SiC, gallium oxide, spinel, lanthium aluminate, magnesium oxide, and silicon among others”).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the LED structure of Beach as modified by Sawaki and Pynn, the substrate and the buffer layer comprising an N-type doped material, as taught by Raring, for the following benefits: (Col. 33, Lines 44-51: the n-type InGaN buffer is typically included to improve the internal quantum efficiency of the LED. Many explanations are given for the mechanism behind this improvement, including relaxation of strain in the active region quantum wells, a surfactant effect of the indium resulting in advantageous surface morphology during active region growth and alteration of the electric fields in the active region).
Nunoue teaches (e.g., Fig. 7F) a light-emitting diode (LED) structure, comprising an LED light-emitting unit comprising a substrate (Col. 9. Lines 12-34: #61) and abuffer layer (Col. 9. Lines 12-34: #66);
Nunouen further teaches that a second electrode (Col. 9. Lines 12-34: #70) is electrically connected to a first semiconductor layer (Col. 9. Lines 12-34: bottom layer of stack 67) through the substrate (Col. 9. Lines 12-34: #61) and the buffer layer (Col. 9. Lines 12-34: #66).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode structure of Beach as modified by Sawaki and Pynn, the second electrode being electrically connected to the first semiconductor layer through the substrate and the buffer layer, for the benefit of efficiently driving the light emitting device to produce a steady flux of light beam and thus increasing device functionality.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1), Pan hereinafter Pan809 (US 2012/0241809 A1), Freitas et al. (US 6,266,353 B1) and Pynn et al. (US 11,175,447 B1) as applied above and further in view of Miura et al. (US 2006/0169987 A1).
Regarding claim 12: Beach and Sawaki teach the claim limitation of the LED structure of claim 1, on which this claim depends.
Beach as modified by Sawaki does not expressly teach
wherein a maximum width of a shape of a vertical projection of the groove on the substrate is 2 to 50 µm, and
a depth of the groove is greater than 0.25 times the maximum width of the groove.
Miura teaches (e.g., Figs. 1-2E) a light-emitting diode (LED) structure, comprising a substrate silicon substrate etched having a facet of <111> ([0054]: 1);
Miura further teaches that a maximum width of a shape of a vertical projection of a groove ([0054]: 2) on a substrate ([0054]: 1) is 1.5 µm ([0053]-[0054]), and
a depth of the groove is greater than 0.25 times the maximum width of the groove ([0053]: “the insulating film may be preferably one tenth to one fifth of a thickness of a pattern depth formed later. It has been set at 50 nm to 100 nm in the present embodiment”; therefore, the requirement of the claimed limitation is met).
Although, Miura does not expressly teach the range of 2 to 50 µm, Miura does teach an overlapping range.
Applicant is reminded that a prima facie case of obviousness typically exists when the ranges of a claimed composition overlap the ranges disclosed in the prior art or when the ranges of a claimed composition do not overlap but are close enough such that one skilled in the art would have expected them to have the same properties. In re Peterson, 65 USPQ2d 1379 (CA FC 2003).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to adjust the range of the width of the shape of the vertical projection of the groove on the substrate, so as to meet the thickness and width requirements of the etched trench, and further efficiently packaging the light emitting device in the trench.
Claims 14-15 are rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1), Pan hereinafter Pan809 (US 2012/0241809 A1), Freitas et al. (US 6,266,353 B1) and Pynn et al. (US 11,175,447 B1) as applied above and further in view of Lin et al. (US 2021/0028327 A1).
Regarding claim 14: Beach and Sawaki teach the claim limitation of the LED structure of claim 13, on which this claim depends, further comprising:
Beach as modified by Sawaki does not expressly teach that
a first light conversion layer located between the plurality of LED light-emitting units in the groove.
Lin teaches (e.g., Fig. 1) a light-emitting diode (LED) structure, comprising a plurality of LED light-emitting ([0032]: 102) and
a first light conversion layer ([0032]-[0033]: 1062) located between the plurality of LED light-emitting units (102) in a groove ([0044]: groove between adjacent structures 124).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode structure of Beach as modified by Sawaki, the first light conversion layer located between the plurality of LED light-emitting units in a groove, as taught by Lin for the benefits of improving the image quality and clarity by tuning the plurality of colors and hues, thus improving de display’s functionality.
Regarding claim 15: Beach and Sawaki and Lin teach the claim limitation of the LED structure of claim 13, on which this claim depends, further comprising:
Beach as modified by Sawaki and Lin teaches a second light conversion layer (Lin: [0032]-[0033]: 1061) located on a side of the LED light-emitting unit facing away from the substrate.
Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Beach et al. (US 2003/0193720 A1) in view of Sawaki et al. (US 2002/0074561 A1), Pan hereinafter Pan809 (US 2012/0241809 A1), Freitas et al. (US 6,266,353 B1) and Pynn et al. (US 11,175,447 B1) as applied above and further in view of Takahashi (US 2005/0040413 A1).
Regarding claim 16: Beach and Sawaki teach the claim limitation of the LED structure of claim 1, on which this claim depends.
Beach as modified by Sawaki does not expressly teach that the LED structure
further comprises
a distributed Bragg reflector (DBR) layer located between an LED light-emitting unit of the plurality of LED light-emitting units and the epitaxial sidewall,
wherein material of the DBR layer is a semiconductor material.
Takahashi teaches (e.g., Fig. 76 and 85; [0879] and Fig. 107) a light-emitting diode (LED) structure, comprising
a distributed Bragg reflector (DBR) layer (see [0282], [0285], [0305] and
[0881]-[0882] and [0888]: 2121/2126) located between an LED light-emitting unit of the plurality of LED light-emitting units (Fig. 107; [1190]: plurality of LED light-emitting units) and an epitaxial sidewall ([0881]-[0882] and [0888]: 2121/2126),
wherein material of the DBR layer is a semiconductor material ([0881]-[0882] and [0888]: 2121/2126).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, ton include in the method of Beach as modified by Sawaki, the distributed Bragg reflector (DBR) layer located between an LED light-emitting unit of the plurality of LED light-emitting units and the epitaxial sidewall, wherein material of the DBR layer is a semiconductor material, as taught by Takahashi, for the following benefits: Distributed Bragg Reflector (DBR) layers provide highly efficient, wavelength-specific reflectivity by alternating materials with high and low refractive indices. Key benefits include ultra-high reflectivity, narrow linewidth, and excellent wavelength stability.
Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Sawaki et al. (US 2002/0074561 A1) in view of Pan hereinafter Pan809 (US 2012/0241809 A1), Freitas et al. (US 6,266,353 B1) and Miura et al. (US 2006/0169987 A1).
Regarding independent claim 19: Sawaki teaches (e.g., Fig. 10; Figs. 4-9 used for labelling purpose) a manufacturing method of a light-emitting diode (LED) structure, wherein the light-emitting diode (LED) structure comprises:
a substrate ([0113]-[0114]: 1),
wherein a plurality of grooves ([0044] and [0080]: 61) are disposed on a side of the substrate, and
a first insulating layer ([0080]: 52) is disposed on the substrate between the plurality of grooves (61),
a plurality of LED light-emitting units ([0065]-[0066]).
Sawaki does not expressly teach that wherein each groove of the plurality of grooves comprises a plurality of epitaxial sidewalls, and
in a groove of the plurality of grooves, an area of the plurality of epitaxial sidewalls is greater than a maximum opening area of the groove; and
wherein each LED light-emitting unit of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls of the groove;
wherein an LED light-emitting unit of the plurality of LED light-emitting units comprises a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence;
wherein the buffer layer, the first semiconductor layer, the active layer, and the second semiconductor layer of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove and forms a closed loop so that one independent LED light-emitting unit is disposed in the groove; the method comprising
Pan809 teaches (e.g., Figs. 1-9) a manufacturing method of an LED structure comprising a plurality of LED light-emitting units ([0045]: 370), a substrate ([0044]: 300) and grooves ([0039]: 308 part of Fig. 3S with a plurality of grooves on side 320, [0047]);
Pan809 further teaches that a first insulating layer ([0039]-[0040]: 302) is disposed on the substrate between the plurality of grooves ([0039]: 308),
wherein each groove of a plurality of grooves (308) comprises a plurality of epitaxial sidewalls ([0]039[ and 0042]: one or more buffer layers (not shown for clarity) are next formed epitaxially, see [0042]: “the buffer layer 335 and the light emitting layers 340 can be formed using … epitaxial growth”; this meets the claim limitation requirement of having a plurality of epitaxial sidewall layers since the buffer layers formed on sidewalls of the substates are epitaxial layers; this implies that the substrate is also an epitaxial material; in addition, there are 4 sidewalls, see Fig. 3C; there are a plurality of sidewalls being epitaxial sidewalls), and in a groove of the plurality of grooves (308), wherein each LED light-emitting unit (370) of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls ([0039]);
wherein an LED light-emitting unit (370) of the plurality of LED light-emitting units (370) comprises
a buffer layer ([0045]: 335), a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence;
wherein the buffer layer ([0045]: 335), a first semiconductor layer ([0055]: n-type layer), an active layer ([0045]: 340), and
a second semiconductor layer ([0055]: p-type layer) of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove (308) and forms a closed loop (Fig. 3F, shows a closed loop of sidewalls) so that one independent LED light-emitting unit (370) is disposed in the groove.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the LED structure of Beach as modified by Sawaki, the first insulating layer being disposed on the substrate between the plurality of grooves, wherein each groove of a plurality of grooves comprises a plurality of epitaxial sidewalls, and in a groove of the plurality of grooves, wherein each LED light-emitting unit of the plurality of LED light-emitting units is located on the plurality of epitaxial sidewalls; wherein an LED light-emitting unit of the plurality of LED light-emitting units comprises a buffer layer, a first semiconductor layer, an active layer, and a second semiconductor layer that are stacked in sequence; wherein the buffer layer, the first semiconductor layer, the active layer, and the second semiconductor layer of the LED light-emitting unit form a structure that extends continuously along all inner sides of the groove and forms a closed loop so that one independent LED light-emitting unit is disposed in the groove, as taught by Pan809, for the benefits of increasing the optical power of the light emitting device, and thus improving the device functionality.
Freitas teaches (e.g., Figs. 1-5C) an LED structure comprising a plurality of LED light-emitting units and a groove sidewalls (Col. 4, Lines 42-60: #12/14);
Freitas further teaches that an area of the plurality of sidewalls (Col. 4, Lines 42-60: opening in the width direction of #12/14) is greater than a maximum opening area of the groove (Col. 4, Lines 42-60: depth of #12/14).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the light-emitting diode of Beach as modified by Sawaki, the structure, wherein an area of the plurality of sidewalls is greater than a maximum opening area of the groove, as taught by Freitas, for the benefits of increasing the areas of the light reflections and thus increasing the output light flux.
Sawaki further teaches that the method comprises
providing the substrate ([0080]: silicon substrate 1) and manufacturing the first insulating layer ([0080]: 52) with a plurality of patterns ([0080]: 52) on the substrate (1);
using the first insulating layer as a mask and etching the substrate to form grooves ([0080]: 61),
wherein each groove of the plurality of grooves comprises at least one epitaxial sidewall ([0068] and [0115]), and
epitaxially manufacturing an LED light-emitting unit ([0021]-[0020], [0080]-[0081] and [0115]) on the at least one epitaxial sidewall of the groove (Fig. 9; # 61; see [0080] and [0115]).
Furthermore, in a different interpretation, for the limitation “an area of an epitaxial sidewall of the at least one epitaxial sidewall is greater than a maximum opening area of the groove”, Miura teaches this limitation below:
Miura teaches (e.g., Figs. 1-2E) a light-emitting diode (LED) structure, comprising a substrate silicon substrate etched having a facet of <111> ([0054]: 1);
Miura further teaches that in a groove of the plurality of grooves ([0053]-[0054]: 2), an area of an epitaxial sidewall of the at least one epitaxial sidewall is greater than a maximum opening area of the groove ([0053]: “the insulating film may be preferably one tenth to one fifth of a thickness of a pattern depth formed later. It has been set at 50 nm to 100 nm in the present embodiment”; therefore, the requirement of the claimed limitation is met).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, to include in the method of Sawaki, the method wherein, in a groove of the plurality of grooves, an area of an epitaxial sidewall of the at least one epitaxial sidewall is greater than a maximum opening area of the groove, as taught by Miura, for the benefits of efficiently packaging the plurality light emitting devices in the trench, while maintaining a smaller footprint by containing and densely packing the plurality light emitting devices inside the substrate without the need to have a wider substrate.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-4, 8-16 and 19 have been considered but are moot because the new ground of rejection does not rely on any reference or combination of references applied in the prior rejection of record for any teaching or matter specifically challenged in the argument or of the newly incorporated limitations.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HERVE-LOUIS Y ASSOUMAN whose telephone number is (571)272-2606. The examiner can normally be reached M-F: 08:30 AM-5:30 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, DAVIENNE MONBLEAU can be reached at 571-272-1945. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/HERVE-LOUIS Y ASSOUMAN/Examiner, Art Unit 2812
Prosecution Insights