DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and 8-10 are rejected under 35 U.S.C. 103 as being unpatentable over Veyres et al (US Patent No. 6870441) in view of Nakahashi (US Publication No. 20190222192).
Regarding claim 1, Veyres teaches discloses an RF filter assembly (fig. 16, Col. 16 lines 55+), comprising: a compensation circuit (i.e., transformed shape) comprising a first input (15) configured to receive a coupled RF power (i.e., RF source clamped to 15) and reduce the coupled RF power (i.e., RF source clamped to 15) back to the first input (15); and an RF filter block (i.e., CKT b/w 10 & 2) comprising a second input (10) coupled to the first output, the RF filter block (implicit, as seen in fig. 16) configured to receive signals (i.e., RFs) processed by the compensation circuit (i.e., transformed shape) and comprising one or more RF filters (i.e., LC/10, LC/5, etc.) configured to filter out predetermined frequencies (i.e., solution within frequency range) of the receive signals (i.e., RF power/RF source clamped to 15).
Veyres does not teach wherein the compensation circuit configured to reduce an impedance difference between the first input and a first output of the compensation circuit, the compensation circuit configured to reduce the coupled RF power reflected back to the first input.
Nakahashi teaches in a similar field of endeavor in power system filters (i.e., ladder filter 1; fig. 1); wherein the compensation circuit (i.e., the compensation circuit filter 1; fig. 1) configured to reduce an impedance difference (i.e., in the ladder filter 1, the impedance at the input terminal 901 is preferably different from the impedance at the output terminal 902, that is, not all of the impedances are set to, for example, about 50Ω. Therefore, the ladder filter 1 may reduce the impedance difference from the impedance of a peripheral component. Consequently, the ladder filter 1 may reduce the number of impedance matching devices in an impedance matching circuit; para. [0029]) between the first input (901) and a first output (902) of the compensation circuit, the compensation circuit configured to reduce the coupled RF power (i.e., RF input at terminal 901) reflected back to the first input (e.g., the impedance difference between the stages may be reduced. Accordingly, the loss may be further decreased; para. [0031]).
Therefore, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included compensation circuit in Veyres, as taught by Nakahashi, as it provides the advantage of optimizing the circuit design towards minimizing the losses in RF filters.
Regarding claim 2, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the compensative circuit (i.e., transformed shape) comprises an inductive component (Lsb) formed by an inductor (L), a segment (i.e., a section of impedances) of a transmission line (i.e., resonators cable), or a combination of an inductor (L) and a segment (i.e., a section of impedances) of a transmission line (i.e., resonators cable).
Regarding claim 3, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the inductive component (Lsb) is connected to the first input (15), and the compensation circuit (i.e., transformed shape) further comprises a first capacitor (i.e., C/12-11) connected to the inductive component (Lsb) and grounded (GND).
Regarding claim 4, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the compensation circuit (i.e., transformed shape) comprises a first tank circuit (i.e., CKT/12-GND) that is connected to the inductive component (Lsb) and the first capacitor (i.e., C/12-11), and the first tank circuit (i.e., CKT/12-GND) is connected to the RF filter block (i.e., CKT b/w 10 & 2) in parallel (implicit, as seen in fig. 16).
Regarding claim 5, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the inductive component (i.e., such as Lsb) is formed by a segment (i.e., a section of impedances) of a transmission line (i.e., resonators cable) of the compensation circuit (i.e., transformed shape).
Regarding claim 6, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the compensation circuit (i.e., transformed shape) further comprises a second capacitor (i.e., C/6-GND) coupled with the inductive component (i.e., L/6-GND) in parallel to form a second tank circuit (i.e., CKT/7-GND).
Regarding claim 8, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the RF filter block (i.e., CKT b/w 10 & 2) comprises a plurality of serially connected RF filters (i.e., LC/10, LC/5, etc.) configured to filter out predetermined frequencies (i.e., solution within frequency range) from a highest one (i.e., high band) to a lowest one (i.e., low band).
Regarding claim 9, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; further comprising a grounded shunt capacitor (Cpt) connected to the RF filter block (i.e., CKT b/w 10 & 2).
Regarding claim 10, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Veyres further teaches the RF filter assembly; wherein the RF filter assembly (i.e., fig. 16) is connected to a high voltage module (e), and the ground shunt capacitor (Cpt) is connected to the high voltage module (e) in parallel (implicit, as seen in fig. 16).
Claims 7 and 11-20 are rejected under 35 U.S.C. 103 as being unpatentable over Veyres et al (US Patent No. 6870441) in view of Nakahashi (US Publication No. 20190222192) and further in view of Carman et al (US Patent No. 9953825).
Regarding claim 7, Veyres in view of Nakahashi and the teachings of Veyres as modified by Nakahashi have been discussed above.
Neither Veyres nor Nakahashi teaches wherein the first input is connected to a heating electrode or a chucking electrode of a substrate support assembly.
Carman teaches in a similar field of endeavor in apparatus and system (fig. 2, Col. 4 lines 25+); wherein the first input (216) is connected to a heating electrode (105) or a chucking electrode (210) of a substrate support assembly (220).
Thus, it would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to have optionally included the RF chucking electrode assembly in Veyres, as taught by Carman, as it provides the advantage of maintaining clear and reliable signal transmission as well as safeguarding against system malfunctions.
Regarding claim 11, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres teaches a compensation circuit (i.e., transformed shape) connected to the chucking electrode of the substrate support assembly (i.e., radioelectric cable/RF assembly) and configured to receive a coupled RF power (i.e., RF source clamped to 15) from an input (15) and reduce a reflection (i.e., limit the signal spectrum) of the coupled RF power (i.e., RF source clamped to 15) back through the input (15); and an RF filter block (i.e., CKT b/w 10 & 2) configured to receive signals (i.e., RFs) processed by the compensation circuit (i.e., transformed shape) and comprising a plurality of RF filters (i.e., LC/10, LC/5, etc.) configured to filter out predetermined frequencies (i.e., solution within frequency range) of the signals (i.e., RFs) processed by the compensation circuit (i.e., transformed shape).
Carman further teaches (fig. 2, Col. 4 lines 25+); a chucking circuit (i.e., ESC 227 and its electrodes assembly 105 and 210) for a substrate support assembly (220) of a processing chamber (101), comprising: a chucking electrode (210) coupled with an electric box (i.e., frame support assembly/box which accommodates RF power input ports 216).
Nakahashi furthermore teaches (i.e., ladder filter 1; fig. 1); wherein the substrate support assembly (i.e., input terminal 901). And, for the rest of the limitations/features in claim 11 is rejected for the same reasons that have already been stated/discussed above in rejected claim 1. {See rejection of claim 1}
Regarding claim 12, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the compensation circuit (i.e., transformed shape) comprises an inductive component (Lsb) formed by an inductor (L), a transmission line (i.e., resonators cable), or a combination of an inductor (Lsb) and a transmission line (i.e., resonators cable).
Regarding claim 13, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the inductive component (Lsb) is connected to the input (15), and the compensation circuit (i.e., transformed shape) further comprises a first capacitor (i.e., C/12-11) connected to the inductive component (Lsb) and grounded (GND).
Regarding claim 14, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the compensation circuit (i.e., transformed shape) comprises a first tank circuit (i.e., CKT/12-GND) that is connected to the inductive component (Lsb) and the first capacitor (i.e., C/12-11), and the first tank circuit (i.e., CKT/12-GND) is connected to the RF filter block (i.e., CKT b/w 10 & 2) in parallel (implicit, as seen in fig. 16).
Regarding claim 15, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the inductive component (Lsb) is formed by a segment (i.e., a section of impedances) of a transmission line (i.e., resonators cable) of the compensation circuit (i.e., transformed shape).
Regarding claim 16, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the compensation circuit (i.e., transformed shape) further comprises a second capacitor (i.e., C/6-GND) coupled with the inductive component (i.e., L/6-GND) in parallel to form a second tank circuit (i.e., CKT/7-GND).
Regarding claim 17, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Carman further teaches (fig. 2, Col. 4 lines 25+); wherein the input (216) is connected to the chucking electrode (210).
Regarding claim 18, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Veyres further teaches (fig. 16, Col. 16 lines 55+); wherein the RF filter block (i.e., CKT b/w 10 & 2) comprises a plurality of serially connected RF filters (i.e., LC/10, LC/5, etc.) configured to filter out predetermined frequencies (i.e., solution within frequency range) from a highest one (i.e., high band) to a lowest one (i.e., low band).
Regarding claim 19, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Carman further teaches (fig. 2, Col. 4 lines 25+); wherein the electric box (i.e., frame support assembly/box which accommodates RF power input ports 216) comprises a first housing (i.e., top housing accommodating electrode assembly 210) enclosing a high voltage module (i.e., chucking/RF), a second housing (i.e., bottom housing accommodating electrode assembly 105) enclosing the compensation circuit (i.e., heating/RF), and a bracket (200a) coupling the first housing (i.e., top housing accommodating electrode assembly 210) and second housing (i.e., bottom housing accommodating electrode assembly 105), the bracket (200a) and the second housing (i.e., bottom housing accommodating electrode assembly 105) comprising a plurality of vents (i.e., plurality of openings and dummy opening such as 228, 218, etc.) that allow air to flow (i.e., smooth gas flow between compartments for cooling purposes) from the first housing (i.e., top housing accommodating electrode assembly 210) to the second housing (i.e., bottom housing accommodating electrode assembly 105).
Regarding claim 20, Veyres in view of Nakahashi and further in view of Carman and the teachings of Veyres as modified by Nakahashi have been discussed above. Also, the teachings of Veyres as modified by Carman have been discussed above as well.
Carman teaches (fig. 2, Col. 4 lines 25+); a method for processing a coupled RF power (i.e., frame support assembly/box which accommodates RF power input ports 216) originated from a substrate support assembly (220) of a processing chamber (101), comprising: transmitting the coupled RF power (i.e., frame support assembly/box which accommodates RF power input ports 216) from an electrode (i.e., 210, 105) within the substrate support assembly (220) directly to a compensation circuit (i.e., RF power source assembly within input ports 216), the electrode (i.e., 105, 210) comprising a chucking electrode (210) or a heating electrode (105); reducing, by the compensation circuit (i.e., RF power source assembly within input ports 216), the coupled RF power (i.e., frame support assembly/box which accommodates RF power input ports 216) back to the electrode (i.e., 105, 210).
Veyres further teaches (fig. 16, Col. 16 lines 55+), wherein the compensation circuit (i.e., transformed shape) comprises an inductive component (Lsb) connected to a first grounded capacitor (i.e., C/12-11), and the inductive component (Lsb) comprises an inductor (L), a segment (i.e., a section of impedances) of a transmission line (i.e., resonators cable), or a combination of an inductor (L) and a segment (i.e., a section of impedances) of the transmission line (i.e., resonators cable); transmitting the processed RF signal (i.e., RF source clamped to 15) processed by the compensation circuit (i.e., transformed shape) directly to a first RF band-stop filter (i.e., such LC/10) configured to filter out a first frequency (i.e., high/low band frequency) of the processed RF signal power (i.e., RF source clamped to 15), the first frequency (i.e., high/low band frequency) corresponding to a highest frequency (i.e., high band) of an RF signal (i.e., RF/radioelectric) that generates the processed RF signal (i.e., RF source clamped to 15); transmitting an output (i.e., refined/filtered signal) of the first RF band-stop filter (i.e., LC/10) to a second RF band-stop filter (i.e., LC/5) configured to filter a second frequency (i.e., high/low band frequency) of the processed RF signal (i.e., RF source clamped to 15), the second frequency (i.e., high/low band frequency) corresponding to a lowest frequency (i.e., low band frequency) of the RF signal (i.e., radioelectric/RF) that generates the processed RF signal (i.e., RF source clamped to 15); and coupling the second RF band-stop filter (i.e., LC/5) with a high voltage module (e).
Nakahashi furthermore teaches (i.e., ladder filter 1; fig. 1); reducing (i.e., in the ladder filter 1, the impedance at the input terminal 901 is preferably different from the impedance at the output terminal 902, that is, not all of the impedances are set to, for example, about 50Ω. Therefore, the ladder filter 1 may reduce the impedance difference from the impedance of a peripheral component. Consequently, the ladder filter 1 may reduce the number of impedance matching devices in an impedance matching circuit; para. [0029]), by the compensation circuit (i.e., the compensation circuit filter 1; fig. 1), a difference in an impedance (i.e., in the ladder filter 1, the impedance preferably remains the same or substantially same, or the impedance decreases sequentially along the path from the first end, that is, the input terminal 901 side, to the output terminal 902 side. Alternatively, the impedance preferably remains the same or substantially same, or the impedance increases sequentially. Therefore, the impedance difference between the stages may be reduced. Accordingly, the loss may be further decreased; para. [0031]) between the substrate support assembly (901) and a first output (902) of the compensation circuit (i.e., the compensation circuit filter 1; fig. 1).
Conclusion
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/MUAAMAR QAHTAN AL-TAWEEL/Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838