Prosecution Insights
Last updated: July 17, 2026
Application No. 18/415,775

METHOD OF FABRICATING OXIDE FILM WITH UNIFORM THICKNESS

Final Rejection §103§112
Filed
Jan 18, 2024
Priority
Dec 01, 2023 — RE 10-2023-0172081
Examiner
MOHAMED-ALY, KAREEM M
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Db Hitek Co. Ltd.
OA Round
2 (Final)
Grant Probability
Favorable
3-4
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
27 currently pending
Career history
5
Total Applications
across all art units

Statute-Specific Performance

§103
100.0%
+60.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Status The previous drawing objection is withdrawn. The previous claim objection is withdrawn. The instant Office Action is in response to applicant’s remarks filed on 06/11/2026. Claim 1 is amended, claim 7 is canceled, and no new claims appended. Claims 1-6 and 8-16 are pending, with claims 11-16 remaining withdrawn. Response to Arguments Applicant's arguments filed on 6/11/2026 are moot in view of the new grounds of rejection. Drawings The drawings are objected to because it is unclear what the two layers are in Figure 5. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(d): (d) REFERENCE IN DEPENDENT FORMS.—Subject to subsection (e), a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. The following is a quotation of pre-AIA 35 U.S.C. 112, fourth paragraph: Subject to the following paragraph [i.e., the fifth paragraph of pre-AIA 35 U.S.C. 112], a claim in dependent form shall contain a reference to a claim previously set forth and then specify a further limitation of the subject matter claimed. A claim in dependent form shall be construed to incorporate by reference all the limitations of the claim to which it refers. Claim 2 is rejected under 35 U.S.C. 112(d) or pre-AIA 35 U.S.C. 112, 4th paragraph, as being of improper dependent form for failing to further limit the subject matter of the claim upon which it depends, or for failing to include all the limitations of the claim upon which it depends. The amendments to claim 1 include the limitations of claim 2. Applicant may cancel the claim(s), amend the claim(s) to place the claim(s) in proper dependent form, rewrite the claim(s) in independent form, or present a sufficient showing that the dependent claim(s) complies with the statutory requirements. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1-6 and 9-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kim (Korean Patent No 100,875,350) in view of Drowley (US Patent No 5,310,711). Regarding claims 1 & 2, Kim (Korean Patent No 100,875,350) teaches a method of fabricating an oxide film (TEOS 15, Figure 2e, paragraph 26, line 1) with a uniform thickness, the method comprising: forming a pad oxide film (paragraph 21, lines 1-4, teaches a pad oxide film (not shown) is formed on the semiconductor substrate, and TEOS is deposited thereon to form the TEOS (I) film. Here, I and II are marks for distinguishing a TEOS layer. The pad oxide film plays a role of preventing stress between the semiconductor substrate and the TEOS (I) film, and the TEOS (I) film is used rather than the TEOS (II) film to be subsequently deposited) on a silicon substrate (silicon substrate 10, Figure 2a, abstract) to expose an area of the substrate; forming a trench (trench 14, Figure 2d, paragraph 24, line 1) by etching (paragraph 24, lines 1-4, teaches Next, a trench in which an STI having a predetermined depth is formed on the semiconductor substrate is formed by using a photolithography process. That is, a photoresist (not shown) is applied to form the STI on the deposited TEOS (II) film, the mask pattern is transferred onto the wafer, and then patterned while developing. Thereafter, the silicon substrate is etched to a predetermined depth) the area of the substrate to a predetermined depth; forming the oxide film (TEOS 15, Figure 2e, paragraph 26, line 1) by performing an oxidation process (paragraph 26, lines 1-2, teaches Next, TEOS, which is an oxide, is deposited on the trench. That is, the STI formed on the semiconductor substrate needs to fill the trench with TEOS to form an isolation layer for separating the semiconductor device) on the substrate that is amorphized, as claimed. Kim (Korean Patent No 100,875,350) is silent to teach, locally amorphizing the substrate to ensure that an oxide film subsequently formed on the substrate has a substantially uniform thickness, by performing an ion implantation process on an boundaries of the trench; and wherein the ion implantation process comprises implanting, into the substrate, ions of elements other than group 13 and group 15 elements to form amorphous silicon in the substrate. In an analogous art, Drowley (US Patent No 5,310,711) teaches locally amorphizing the substrate to ensure that an oxide film subsequently formed on the substrate has a substantially uniform thickness, by performing an ion implantation process on an boundaries of the trench (col 1, lines 52-59, teaches the ion implantation method, dopant atoms of the appropriate type are ionized and accelerated toward a semiconductor surface, typically silicon. The ions penetrate the lattice of the silicon atoms to a degree determined by the ion energy, the ion mass, the orientation of the lattice relative to the ion beam, and the degree of crystallinity of the silicon. This technique offers good dopant control and good uniformity across the semiconductor surface); and wherein the ion implantation process comprises implanting, into the substrate, ions of elements other than group 13 and group 15 elements to form amorphous silicon in the substrate (col 2, lines 8-11, teaches randomizing the lattice by the implantation of a heavy ion such as germanium, tin or antimony, to create an amorphous layer of silicon on the surface of the semiconductor), as claimed. PNG media_image1.png 468 588 media_image1.png Greyscale Therefore, it would be obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of Kim (Korean Patent No 100,875,350) to incorporate the teachings of Drowley (US Patent No 5,310,711) by using ion implantation to form an amorphous layer in the trench, thereby offering good dopant control and good uniformity across the semiconductor surface for later uniform oxide formation and by using ions of elements other than group 13 and group 15 for the ion implantation process thereby amorphizing the substrate lattice without altering the electrical characteristics of the device. Regarding claim 3, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method of claim 2, as claimed. Drowley (US Patent No 5,310,711) further teaches wherein the locally amorphizing of the substrate is performed by additionally amorphizing the substrate at positions corresponding to inner sidewalls and a bottom surface (doped region 70, Figure 3, col 7, line 49, teaches doped region is formed in trench) of the trench (trench 80, Figure 3, col 7, line 49). PNG media_image2.png 442 605 media_image2.png Greyscale Regarding claim 4, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 3, and Drowley (US Patent No 5,310,711) further teaches wherein the ion implantation process is performed by implanting element ions with an atomic weight larger than an atomic weight of silicon into the substrate (col 1 line 63 – col 2 line 3, teaches one factor determining the depth of penetration of the dopant ions is the mass of the ions used. Ions having a higher mass, such as arsenic, are more controllable than ions having a lower mass, such as boron. Boron ions are preferred, but they experience less energy loss when passing through crystalline silicon and tend to channel into the spaces between adjacent atoms in the lattice. This results in the boron ions forming a deeper and poorly controlled junction). Regarding claim 5, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 4, and Drowley (US Patent No 5,310,711) further teaches wherein the ion implantation process is performed by implanting ions of group 14 elements other than silicon into the substrate (col 2, lines 8-11, teaches randomizing the lattice by the implantation of a heavy ion such as germanium, tin…to create an amorphous layer of silicon on the surface of the semiconductor). Regarding claim 6, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 5, and Drowley (US Patent No 5,310,711) further teaches wherein the ion implantation process is performed by implanting tin or lead ions into the substrate (col 2, lines 8- 11, teaches randomizing the lattice by the implantation of a heavy ion such as…tin…to create an amorphous layer of silicon on the surface of the semiconductor). Regarding claim 9, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 4, and Drowley (US Patent No 5,310,711) further teaches wherein the ion implantation process is performed at an ion injection angle of 0° to less than 40° (col 3, lines 31- 33, teaches the ion implantation technique is essentially a line-of-sight method). Regarding claim 10, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 2, and Drowley (US Patent No 5,310,711) further teaches converting amorphous silicon in the substrate to polycrystalline silicon by performing a thermal process (col 2, lines 12-14, teaches the amorphous layer may be recrystallized during a subsequent heat treatment to restore the lattice and activate the dopant). Claim(s) 8 is rejected under 35 U.S.C. 103 as being unpatentable over Kim (Korean Patent No 100,875,350) in view of Drowley (US Patent No 5,310,711) and Stuber (US Patent 9,553,013). Regarding claim 8, Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) teach the method as claimed in claim 1. Kim (Korean Patent No 100,875,350) and Drowley (US Patent No 5,310,711) are silent to teach wherein the ion implantation process is performed by implanting argon ions into the substrate. In an analogous art, Stuber (Us Patent No 9,553,013) teaches the ion implantation process is performed by implanting argon ions into the substrate (col 8, line 30, teaches implanted particles could be Argon). Therefore, it would have been obvious for someone of ordinary skill in the art before the effective filing date of the claimed invention to have modified the method of to incorporate the teachings of Stuber (Us Patent No 9,553,013) by using argon ions to amorphize the substrate without decreasing process efficiency (col 8, lines 33-35, teaches Argon could beneficially be employed because it has a relatively large mass, so it will do substantial damage; but it is also inert, so it will not cause any unexpected side effects). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to KAREEM M MOHAMED-ALY whose telephone number is (571)270-0312. The examiner can normally be reached 8am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Leonard Chang can be reached at (571) 270-3691. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KAREEM M MOHAMED-ALY/Examiner, Art Unit 2898 /Leonard Chang/Supervisory Patent Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Jan 18, 2024
Application Filed
May 01, 2026
Non-Final Rejection mailed — §103, §112
Jun 11, 2026
Response Filed
Jun 29, 2026
Final Rejection mailed — §103, §112 (current)

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

3-4
Expected OA Rounds
Grant Probability
Moderate
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month