Prosecution Insights
Last updated: April 19, 2026
Application No. 18/415,954

DISPLAY DEVICE WITH SELF-ADJUSTING POWER SUPPLY

Non-Final OA §103§DP
Filed
Jan 18, 2024
Examiner
JANSEN II, MICHAEL J
Art Unit
2626
Tech Center
2600 — Communications
Assignee
Samsung Display Co., Ltd.
OA Round
3 (Non-Final)
66%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
To Grant
86%
With Interview

Examiner Intelligence

Grants 66% — above average
66%
Career Allow Rate
409 granted / 619 resolved
+4.1% vs TC avg
Strong +20% interview lift
Without
With
+20.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
37 currently pending
Career history
656
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
46.0%
+6.0% vs TC avg
§102
25.2%
-14.8% vs TC avg
§112
23.2%
-16.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 619 resolved cases

Office Action

§103 §DP
DETAILED ACTION This communication is in response to Application No. 18/415,954 originally filed 11/19/2025. The Request for Continued Examination and Amendment presented on 11/07/2025 which provides amendments to claims 1-2, 4-5, 9, and 21 is hereby acknowledged. Currently claims 1-2, 4-16, and 18-21 are pending. Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/14/2025 has been entered. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1-2, 4-16, and 18-21 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-2, 4-16, and 18-21 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-22 of U.S. Patent No. 11,881,152 B2. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the instant application are a broader version of that in the US Patent. Therefore, the scope of the claims of the instant application encompasses that of the claims in U.S. Patent No. 11,881,152 B2. As an example, see the claim comparison below: Instant Application 18/415,954 U.S. Patent No. 11,881,152 1. A display device comprising: a display panel including pixels connected between a first power line and a second power line, each of the pixels including a light emitting element, a driving transistor that controls a current flowing through the light emitting element, and a switching transistor electrically connected between an anode electrode of the light emitting element and a readout line; and a power supply that generates first and second power voltages applied to the first and second power lines, wherein the power supply; maintains a voltage level of a third power voltage provided to the pixels through the readout line at a first voltage level, in response to a value of a total current provided to the display panel through the first power line being within a first current section; and changes the voltage level of the third power voltage provided to the pixels through the readout line to a second voltage level higher than the first voltage level, in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the first current section to reduce a driving current flowing through the light emitting element. 1. A display device comprising: a power supply generating a first power voltage, a second power voltage, and a third power voltage; a first power line to which the first power voltage is applied; a second power line to which the second power voltage is applied; a readout line to which the third power voltage is applied; a timing controller calculating a load of input image data, and generating image data by scaling a first data value in the input image data to a second data value based on the load; a data driver generating a data signal based on the second data value of the image data and providing the third power voltage provided from the power supply to the readout line; a display panel including a pixel, wherein the pixel includes a light emitting element connected between the first power line and the second power line, a switching transistor connected between one electrode of the light emitting element and the readout line, and a driving transistor controlling an amount of driving current flowing from the first power line through the light emitting element to the second power line based on a voltage difference between the data signal and the third power voltage, wherein the third power voltage initializes the pixel, wherein the power supply changes a voltage level of the third power voltage based on a comparison of a first reference current value and a total current flowing from the power supply through the first power line to the display panel according to the first and second power voltages, and wherein the first reference current value is preset. 2. The display device of claim 1, wherein the power supply changes the voltage level of the third power voltage in response to a value of the total current being greater than the first reference current value. Remaining claims 2, 4-16, and 18-21 recite similar language to those found in the remaining patented claims 1-22 and are rejected under similar rationale. Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 1-2, 4-9 and 21 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. U.S. Patent Application Publication No. 2020/0226978 A1 hereinafter Lin in view of Kang U.S. Patent Application Publication No. 2021/0158752 A1 hereinafter Kang. Consider Claim 1: Lin discloses a display device comprising: (Lin, See Abstract.) a display panel including pixels connected between a first power line and a second power line, each of the pixels including a light emitting element, (Lin, [0057], “Display pixel 22 may include an organic light-emitting diode (OLED) 304. A positive power supply voltage VDDEL may be supplied to positive power supply terminal 300, and a ground power supply voltage VSSEL may be supplied to ground power supply terminal 302.”) a driving transistor that controls a current flowing through the light emitting element, and a switching transistor electrically connected between an anode electrode of the light emitting element and a readout line; and (Lin, [0088], “In contrast to the pixel configuration of FIG. 3, the initialization line in display pixel 22 of FIG. 10 is only connected to one transistor within pixel 22. As shown in FIG. 10, an initialization transistor Tini has a source terminal coupled to Node3 (i.e., the drain terminal of the drive transistor), a gate terminal configured to receive a third scan control signal SC3(n) via third scan line 314-3, and a drain terminal coupled to a dynamic initialization line 308′. Display pixel 22 may further include an anode reset transistor Tar that has a source terminal coupled to Node4 (i.e., the anode terminal of OLED 304), a gate terminal configured to receive scan control signal SC3(n+1) generated from a subsequent row in the array, and a drain terminal coupled to an anode reset line 309. Dynamic initialization line 308′ and anode reset line 309 may be separate control lines such that the initialization voltage Vdini(n) on line 308′ and the anode reset voltage Var on line 309 can be biased to different levels during operation of pixel 22.”) a power supply that generates first and second power voltages applied to the first and second power lines, (Lin, [0057], “Display pixel 22 may include an organic light-emitting diode (OLED) 304. A positive power supply voltage VDDEL may be supplied to positive power supply terminal 300, and a ground power supply voltage VSSEL may be supplied to ground power supply terminal 302. Positive power supply voltage VDDEL may be 3 V, 4 V, 5 V, 6 V, 7 V, 2 to 8 V, or any suitable positive power supply voltage level. Ground power supply voltage VSSEL may be 0 V, −1 V, −2 V, −3 V, −4 V, −5 V, −6V, −7 V, or any suitable ground or negative power supply voltage level.”) wherein the power supply; maintains a voltage level of a third power voltage provided to the pixels through the readout line at a first voltage level, (Lin, [0058], “Terminal 308 may be used to supply an initialization voltage Vini (e.g., a negative voltage such as −1 V, −2 V, −3 V, −4V, −5 V, −6 V, or other suitable voltage) to assist in turning off diode 304 when diode 304 is not in use. Terminal 308 is therefore sometimes referred to as the initialization line. Control signals from display driver circuitry such as row driver circuitry 18 of FIG. 2 are supplied to control terminals such as row control terminals 312, 314-1, 314-2, and 314-2′. Row control terminal 312 may serve as an emission control terminal (sometimes referred to as an emission line or emission control line), whereas row control terminals 314-1 and 314-2 may serve as first and second scan control terminals (sometimes referred to as scan lines or scan control lines).”) … and changes the voltage level of the third power voltage provided to the pixels through the readout line to a second voltage level higher than the first voltage level, in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the first current section to reduce a driving current flowing through the light emitting element. (Lin, [0097-0099], [0092], “Initialization voltage Vdini may be dynamically adjusted on a per-row basis, so signal Vdini(n) is a row-based signal (e.g., signal Vdini may be asserted at different times for different rows). In contrast, the anode reset voltage Var may be a fixed direct current (DC) global voltage signal.”) Lin teaches to dynamically adjust the power supply voltage to either lower or higher initialization voltages however does not appear to fully suggest wherein the power supply: maintains a voltage level of a third power voltage provided to the pixels through the readout line at a first voltage level, in response to a value of a total current provided to the display panel through the first power line being within a first current section; and changes the voltage level of the third power voltage provided to the pixels through the readout line to a second voltage level higher than the first voltage level, in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the first current section to reduce a driving current flowing through the light emitting element. Kang however teaches that it was a known technique to provide wherein the power supply: maintains a voltage level of a third power voltage provided to the pixels through the readout line at a first voltage level, in response to a value of a total current provided to the display panel through the first power line being within a first current section; and changes the voltage level of the third power voltage provided to the pixels through the readout line to a second voltage level higher than the first voltage level, in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the first current section to reduce a driving current flowing through the light emitting element. (Kang, [0093-0102], [0096], “In another example embodiment, the panel driving voltage generator 510 may include an initialization voltage table VINT_TB for storing a third voltage level of the initialization voltage VINT corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the initialization voltage VINT using the initialization voltage table VINT_TB so that the initialization voltage VINT has the third voltage level corresponding to the first current difference LI1. For example, as shown in FIG. 11, when the first current difference LI1 (e.g., corresponding to LI shown in FIG. 11) is about 0 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −5V. In another example, when the first current difference LI1 is about 8 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −4.5V.”) It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide changes to the initialization voltage by providing different levels based on the panel current as this was a known technique in view of Kang and would have been utilized for the purpose of that it may prevent or substantially prevent the over-compensation and/or the under-compensation of the driving current. (Kang, [0099]) [AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox ( V1 V2 V3 V4 First Second Third Fourth Reference Reference Reference Reference Current Current Current Current Value Value Value Value )][AltContent: textbox (Can be equated to the instant application values)][AltContent: textbox (S_I1 S_I2 S_I3 S_I4 First Second Third Fourth Reference Reference Reference Reference Current Current Current Current Value Value Value Value)][AltContent: textbox (Can be equated to the instant application values)][AltContent: arrow] PNG media_image1.png 232 521 media_image1.png Greyscale Consider Claim 2: Lin in view of Kang discloses the display device of claim 1, wherein the driving transistor controls an amount of the current flowing from the first power line through the light emitting element to the second power line based on a voltage difference between a gate electrode of the driving transistor and the anode electrode, and wherein, when the value of the total current is greater than the first reference current value, the voltage level of the third power voltage is changed so that the total current is reduced. (Choi, [0078-0081], [0078], “FIG. 4 illustrates a table of a relationship between a data load ratio of image information and a second voltage Vref depending on a control method according to an exemplary embodiment. Referring to FIG. 4, the second voltage Vref output from the signal converter 604 is changed according to the data load ratio of the image information determined in the controller 40.”) Consider Claim 4: Lin in view of Kang disclose the display device of claim 1, wherein the power supply gradually changes the voltage level of the third power voltage two or more times as the value of the total current increases. (Choi, [0078-0081], [0078], “FIG. 4 illustrates a table of a relationship between a data load ratio of image information and a second voltage Vref depending on a control method according to an exemplary embodiment. Referring to FIG. 4, the second voltage Vref output from the signal converter 604 is changed according to the data load ratio of the image information determined in the controller 40.”) Consider Claim 5: Lin in view of Kang disclose the display device of claim 1, wherein the power supply: maintains the voltage level of the third power voltage at the second voltage level when the value of the total current is greater than the first reference current value but less than a second reference current value; and changes the voltage level of the third power voltage to a third voltage level when the value of the total current is greater than the second reference current value, wherein the first reference current value and the second reference current value are preset. (Choi, [0078-0081], [0078], “FIG. 4 illustrates a table of a relationship between a data load ratio of image information and a second voltage Vref depending on a control method according to an exemplary embodiment. Referring to FIG. 4, the second voltage Vref output from the signal converter 604 is changed according to the data load ratio of the image information determined in the controller 40.”) Consider Claim 6: Lin in view of Kang disclose the display device of claim 2, wherein the power supply linearly changes the voltage level of the third power voltage based on a difference between the total current and the first reference current value. (Choi, [0018], “Another exemplary embodiment provides a driving control device for controlling driving of a power voltage supplier which supplies a power voltage to a plurality of pixels through a power wire connected to the plurality of pixels emitting light according to a plurality of data signals supplied through a plurality of data lines, the device including: a current detector configured to detect a total current flowing in the plurality of pixels, and control driving of the power voltage supplier according to a result acquired by comparing the total current and a reference voltage signal corresponding to image information of one frame.”) Consider Claim 7: Lin in view of Kang disclose the display device of claim 1, further comprising: a power controller generating a power control signal for the voltage level of the third power voltage by comparing the total current with at least one reference current value, wherein the power supply changes the voltage level of the third power voltage based on the power control signal. (Choi, [0016], [0011], “An exemplary embodiment provides a display device, including: a display unit including a plurality of pixels which emits light according to a plurality of data signals supplied through a plurality of data lines, a power voltage supplier configured to supply a power voltage to the plurality of pixels, a current detector configured to detect a total current flowing in the plurality of pixels, and a controller configured to receive image information of one frame unit and generate a reference voltage signal corresponding to the image information of one frame unit, in which the current detector compares the total current and the reference voltage signal and controls driving of the power voltage supplier according to the comparison.”) Consider Claim 8: Lin in view of Kang disclose the display device of claim 7, wherein the power supply includes: a first power voltage generating circuit outputting the first power voltage; and a third power voltage generating circuit generating the third power voltage based on the power control signal, and wherein the power controller includes: a current sensing circuit generating a current state signal by comparing the total current with the at least one reference current value; and (Choi, [0014], “The current detector may include a current-voltage converter configured to convert the total current into a first voltage, a filter configured to output the reference voltage signal in a predetermined frequency section to a second voltage, and a comparator configured to compare the first voltage value and the output second voltage value and to output a signal stopping driving of the power voltage supplier when the first voltage exceeds the second voltage.”) a voltage determination circuit generating the power control signal based on the current state signal and a predetermined look-up table. (Choi, [0090], “FIG. 6 illustrates a table of a relationship between a data load ratio of image information, a duty ratio of a reference voltage signal DATA2, and a second voltage Vref depending on a control method according to the exemplary embodiment.”) Consider Claim 9: Lin in view of Kang disclose the display device of claim 8, wherein the at least one reference current value includes the first reference current value, a second reference current value, and a third reference current value, and wherein the current sensing circuit: outputs the current state signal having a first value when the total current is within the first current section smaller than the first reference current value; outputs the current state signal having a second value when the total current is within a second current section between the first reference current value and the second reference current value; outputs the current state signal having a third value when the total current is within a third current section between the second reference current value and the third reference current value; and outputs the current state signal having a fourth value when the total current is within a fourth current section exceeding the third reference current value. (Kang, [0093-0102], [0096], “In another example embodiment, the panel driving voltage generator 510 may include an initialization voltage table VINT_TB for storing a third voltage level of the initialization voltage VINT corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the initialization voltage VINT using the initialization voltage table VINT_TB so that the initialization voltage VINT has the third voltage level corresponding to the first current difference LI1. For example, as shown in FIG. 11, when the first current difference LI1 (e.g., corresponding to LI shown in FIG. 11) is about 0 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −5V. In another example, when the first current difference LI1 is about 8 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −4.5V.”) Consider Claim 21: Lin discloses an electronic device comprising: (Lin, See Abstract.) a processor providing input image data, (Lin, [0039], “An illustrative electronic device of the type that may be provided with an organic light-emitting diode (OLED) display is shown in FIG. 1. As shown in FIG. 1, electronic device 10 may have control circuitry 16. Control circuitry 16 may include storage and processing circuitry for supporting the operation of device 10. The storage and processing circuitry may include storage such as hard disk drive storage, nonvolatile memory (e.g., flash memory or other electrically-programmable-read-only memory configured to form a solid-state drive), volatile memory (e.g., static or dynamic random-access-memory), etc. Processing circuitry in control circuitry 16 may be used to control the operation of device 10. The processing circuitry may be based on one or more microprocessors, microcontrollers, digital signal processors, baseband processors, power management units, audio codec chips, application-specific integrated circuits, programmable integrated circuits, etc.”) a display device displaying an image based on the input image data, and (Lin, [0045], “During operation, the control circuitry may supply display driver integrated circuit 15 with information on images to be displayed on display 14. To display the images on display pixels 22, display driver integrated circuit 15 may supply clock signals and other control signals to display driver circuitry such as row driver circuitry 18 and column driver circuitry 20. For example, data circuitry 13 may receive image data and process the image data to provide pixel data signals to display 14. The pixel data signals may be demultiplexed by column driver circuitry 20 and pixel data signals D may be routed to each pixel 22 over data lines 26 (e.g., to each red, green, or blue pixel). Row driver circuitry 18 and/or column driver circuitry 20 may be formed from one or more integrated circuits and/or one or more thin-film transistor circuits.”) an external power supply providing external power to the display device. (Lin, [0057], “Display pixel 22 may include an organic light-emitting diode (OLED) 304. A positive power supply voltage VDDEL may be supplied to positive power supply terminal 300, and a ground power supply voltage VSSEL may be supplied to ground power supply terminal 302. Positive power supply voltage VDDEL may be 3 V, 4 V, 5 V, 6 V, 7 V, 2 to 8 V, or any suitable positive power supply voltage level. Ground power supply voltage VSSEL may be 0 V, −1 V, −2 V, −3 V, −4 V, −5 V, −6V, −7 V, or any suitable ground or negative power supply voltage level.”) wherein the display device including: a display panel including pixels connected between a first power line and a second power line, each of the pixels including a light emitting element a driving transistor that controls a current flowing through the light emitting element, and a switching transistor electrically connected between an anode electrode of the light emitting element and a readout line: and (Lin, [0088], “In contrast to the pixel configuration of FIG. 3, the initialization line in display pixel 22 of FIG. 10 is only connected to one transistor within pixel 22. As shown in FIG. 10, an initialization transistor Tini has a source terminal coupled to Node3 (i.e., the drain terminal of the drive transistor), a gate terminal configured to receive a third scan control signal SC3(n) via third scan line 314-3, and a drain terminal coupled to a dynamic initialization line 308′. Display pixel 22 may further include an anode reset transistor Tar that has a source terminal coupled to Node4 (i.e., the anode terminal of OLED 304), a gate terminal configured to receive scan control signal SC3(n+1) generated from a subsequent row in the array, and a drain terminal coupled to an anode reset line 309. Dynamic initialization line 308′ and anode reset line 309 may be separate control lines such that the initialization voltage Vdini(n) on line 308′ and the anode reset voltage Var on line 309 can be biased to different levels during operation of pixel 22.”) a power supply that generates first and second power voltages applied to the first and second power lines, (Lin, [0057-0059], [0057], “Display pixel 22 may include an organic light-emitting diode (OLED) 304. A positive power supply voltage VDDEL may be supplied to positive power supply terminal 300, and a ground power supply voltage VSSEL may be supplied to ground power supply terminal 302.”) wherein the power supply: maintains a voltage level of a third power voltage based on the external power provided to the pixels through the readout line at a first voltage level, (Lin, [0058], “Terminal 308 may be used to supply an initialization voltage Vini (e.g., a negative voltage such as −1 V, −2 V, −3 V, −4V, −5 V, −6 V, or other suitable voltage) to assist in turning off diode 304 when diode 304 is not in use. Terminal 308 is therefore sometimes referred to as the initialization line. Control signals from display driver circuitry such as row driver circuitry 18 of FIG. 2 are supplied to control terminals such as row control terminals 312, 314-1, 314-2, and 314-2′. Row control terminal 312 may serve as an emission control terminal (sometimes referred to as an emission line or emission control line), whereas row control terminals 314-1 and 314-2 may serve as first and second scan control terminals (sometimes referred to as scan lines or scan control lines).”) …changes the voltage level of the third power voltage based on the external power provided to the pixels through the readout line in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the current section to reduce a driving current flowing through the light emitting element. (Lin, [0097-0099], [0092], “Initialization voltage Vdini may be dynamically adjusted on a per-row basis, so signal Vdini(n) is a row-based signal (e.g., signal Vdini may be asserted at different times for different rows). In contrast, the anode reset voltage Var may be a fixed direct current (DC) global voltage signal.”) Lin teaches to dynamically adjust the power supply voltage to either lower or higher initialization voltages however does not appear to fully suggest wherein the power supply: maintains a voltage level of a third power voltage based on the external power provided to the pixels through the readout line at a first voltage level, in response to a value of a total current provided to the display panel through the first power line being within a first current section; and changes the voltage level of the third power voltage based on the external power provided to the pixels through the readout line in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the current section to reduce a driving current flowing through the light emitting element. Kang however teaches that it was a known technique to provide wherein the power supply: maintains a voltage level of a third power voltage based on the external power provided to the pixels through the readout line at a first voltage level, in response to a value of a total current provided to the display panel through the first power line being within a first current section; and changes the voltage level of the third power voltage based on the external power provided to the pixels through the readout line in response to the value of the total current provided to the display panel through the first power line being greater than a first reference current value associated with the current section to reduce a driving current flowing through the light emitting element. (Kang, [0093-0102], [0096], “In another example embodiment, the panel driving voltage generator 510 may include an initialization voltage table VINT_TB for storing a third voltage level of the initialization voltage VINT corresponding to the first current difference LI1. In this case, the panel driving voltage generator 510 may control the initialization voltage VINT using the initialization voltage table VINT_TB so that the initialization voltage VINT has the third voltage level corresponding to the first current difference LI1. For example, as shown in FIG. 11, when the first current difference LI1 (e.g., corresponding to LI shown in FIG. 11) is about 0 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −5V. In another example, when the first current difference LI1 is about 8 mA, the third voltage level of the initialization voltage VINT generated by the panel driving voltage generator 510 may be about −4.5V.” See also marked up Figure 11 above.) It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide changes to the initialization voltage by providing different levels based on the panel current as this was a known technique in view of Kang and would have been utilized for the purpose of that it may prevent or substantially prevent the over-compensation and/or the under-compensation of the driving current. (Kang, [0099]) Claim Rejections - 35 USC § 103 The text of those sections of Title 35, U.S. Code not included in this action can be found in a prior Office action. Claim(s) 11-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. U.S. Patent Application Publication No. 2020/0226978 A1 in view of Kang U.S. Patent Application Publication No. 2021/0158752 A1 in view of Lee et al. U.S. Patent Application Publication No 2015/0310808 A1 hereinafter Lee. Consider Claim 11: Lin in view of Kang disclose the display device of claim 1, however do not further detail further comprising: a timing controller calculating a load of input image data, and generating image data by scaling a first data value in the input image data to a second data value based on the load; and a data driver generating a data signal based on the second data value of the image data and providing the third power voltage provided from the power supply to the readout line, wherein the driving transistor controls an amount of the current flowing through the light emitting element based on a voltage difference between the data signal and the third power voltage. Lee however teaches that it was a known technique in the art before the effective filing date of the invention to have a timing controller calculating a load of input image data, and generating image data by scaling a first data value in the input image data to a second data value based on the load; and a data driver generating a data signal based on the second data value of the image data and providing the third power voltage provided from the power supply to the readout line, wherein the driving transistor controls an amount of the current flowing through the light emitting element based on a voltage difference between the data signal and the third power voltage. (Lee, [0084-0091], [0012], “According to an embodiment of the present invention, a display device includes: a display panel including a plurality of pixels; a control unit configured to scale image data provided from the outside based on an image load factor and to output the scaled image data; and a data driver configured to supply data signals corresponding to the scaled image data to a plurality of data lines connected to the pixels, wherein the control unit includes: a load factor calculating unit configured to calculate a load factor of the image data; and a data scaler configured to scale gray level of the image data based on a plurality of scaling ratios corresponding to the load factor, each of the scaling ratios being determined in accordance with a corresponding one of a plurality of colors.”) It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to provide image scaling based upon the load factor of the image as this was a technique known in the art in view of Lee and would have been utilized for the purpose of values of the image data provided from the outside are scaled based on the scaling ratios that are differently determined depending on the respective pixel groups classified depending on colors. Further, voltage values of the driving power are adjusted according to the scaling ratios, such that the uniformity of luminance and chromaticity of the display panel can be improved. (Lee, [0032]) Consider Claim 12: Lin in view of Kang in view of Lee disclose the display device of claim 11, wherein the timing controller determines a value of a scaling factor so that a value obtained by multiplying the load and the scaling factor does not exceed a reference load value, and downscales the input image data based on the scaling factor. (Lee, [0141], “Subsequently, scaling ratios of the pixels are calculated or determined depending on colors (e.g., for each of the colors) based on the luminance uniformity (S1130). In order to improve luminance uniformity, a down scaling of the image data is performed and the voltage value of the driving power ELVDD is increased, and thus a scaling ratio may be determined to be less than 1. In this case, scaling ratios are adjusted for the respective pixels depending on colors (e.g., for each of the colors or for each of the different types of pixels, each type emitting a different color), such that the luminance uniformity can be adjusted.”). Consider Claim 13: Lin in view of Kang in view of Lee disclose the display device of claim 11, wherein the timing controller: calculates the load based on data values included in first frame data of the input image data in a first frame section; and generates second frame data of the image data by scaling second frame data of the input image data in a second frame section after the first frame section, and wherein the data driver generates the data signal based on first frame data of the image data in the first frame section, and generates the data signal based on the second frame data of the image data in the second frame section. (Lee, [0064], [0089], “A subfield assigning unit 122 is configured to receive the scaled image data, to produce subfield data SDATA including on-off information of the pixels, and to provide the produced data to the data driver 130.” [0090] “In other words, when a digital driving method where an emitting time is adjusted is used, the data scaler 10 changes the gray level value of the image data to a lower or a higher gray level value and the subfield assigning unit 122 outputs the subfield data including on-off signals applied to the respective pixels based on the changed gray values. The control unit 120 may provide information about the data scaling ratio to the power unit 150. Further, the power unit 150 may adjust a voltage value of the driving power ELVDD according to the provided data scaling ratio.”) Consider Claim 14: Lin in view of Kang in view of Lee disclose the display device of claim 13, wherein when a load of the first frame data of the input image data becomes greater than a load of previous frame data: the total current becomes greater than the first reference current value in the first frame section; and the power supply changes the voltage level of the third power voltage from a first voltage level to a second voltage level in a partial section of the first frame section. (Lee, [0099-0110], [0102], “In the above, an embodiment of the present invention illustrates a case where the voltage value of the driving power ELVDD is changed based on the scaling ratio; however, embodiments of the present invention are not limited thereto. For example, in some embodiments, the scaling ratio may be determined based on the voltage value of the driving power ELVDD. In other words, as the power unit 150 increases the voltage value of the driving power ELVDD, the data scaler 10 may accordingly scale the data value of the image data DATA and output the scaled image data. Further, the data scaler 10 may lower the gray level (or gray-scale level) by scaling the data value of the image data DATA, such that luminance of light outputted from the display panel 110 can be the same as the luminance determined based on the voltage value of the driving power ELVDD before converted.”) Consider Claim 15: Lin in view of Kang in view of Lee disclose the display device of claim 14, wherein when a value of the total current becomes greater than a second reference current value in the first frame section, the power supply changes the voltage level of the third power voltage to a third voltage level. (Lee, [0099-0110], [0102], “In the above, an embodiment of the present invention illustrates a case where the voltage value of the driving power ELVDD is changed based on the scaling ratio; however, embodiments of the present invention are not limited thereto. For example, in some embodiments, the scaling ratio may be determined based on the voltage value of the driving power ELVDD. In other words, as the power unit 150 increases the voltage value of the driving power ELVDD, the data scaler 10 may accordingly scale the data value of the image data DATA and output the scaled image data. Further, the data scaler 10 may lower the gray level (or gray-scale level) by scaling the data value of the image data DATA, such that luminance of light outputted from the display panel 110 can be the same as the luminance determined based on the voltage value of the driving power ELVDD before converted.”) Consider Claim 16: Lin in view of Kang in view of Lee disclose the display device of claim 14, wherein when the total current becomes smaller than the first reference current value in the second frame section, the power supply changes the voltage level of the third power voltage from the second voltage level to the first voltage level in a partial section of the second frame section. (Lee, [0019], [0066], [0091], [0133], [0104], “FIG. 6 is a graph illustrating a principle of improving luminance uniformity by increasing the driving voltage of the driving power ELVDD. In FIG. 6, x-axis represents a voltage difference between the driving power ELVDD and the ground power ELVSS applied to the pixel PX. For ease of description, it is assumed that the ground power ELVSS is at a voltage of 0V and voltages V0, V0′, V1, and V1′ of the x-axis represent voltage values of the driving power ELVDD applied to the pixels PX. In this case, V0 is a voltage value of the driving power ELVDD when the display device is driven by a comparative driving method and V1 is a voltage value of the driving power ELVDD when the display device is driven by a data scaling driving method. V0′ and V1′ represent voltage values of the driving power ELVDD after the voltage drop occurrence, respectively.”) Claim Rejections - 35 USC § 103 Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. U.S. Patent Application Publication No. 2020/0226978 A1 in view of Kang U.S. Patent Application Publication No. 2021/0158752 A1 in view of Lee et al. U.S. Patent Application Publication No 2015/0310808 A1 as applied to claim 1 above, and further in view of Tomitani U.S. Patent Application Publication No. 2019/0164485 A1 hereinafter Tomitani. Consider Claim 18: Lin in view of Kang in view of Lee disclose the display device of claim 13, further comprising: a scan driver sequentially providing a first scan signal and a second scan signal to the display panel, wherein the display panel further includes: a first pixel emitting light with a luminance corresponding to a voltage difference between a first data signal and the third power voltage in response to the first scan signal; and a second pixel emitting light with a luminance corresponding to a voltage difference between a second data signal and the third power voltage in response to the second scan signal. Lin in view of Kang in view of Lee however does not disclose wherein when the value of the total current becomes greater than the first reference current value in the first frame section, the first pixel and the second pixel emit light with different luminances in response to the first and second data signals having a same value. Tomitani however teach it was a technique known by those having ordinary skill in the art before the effective filing date of the invention wherein when the value of the total current becomes greater than the first reference current value in the first frame section, the first pixel and the second pixel emit light with different luminances in response to the first and second data signals having a same value. (Tomitani, [0121], “FIG. 15 illustrates an example of the initialization voltage signal for correcting luminance non-uniformity in the Y direction (second direction) out of luminance non-uniformity in the X direction (first direction) and the Y direction (second direction) on the screen of the display area 38a. That is, in the example illustrated in FIG. 15, data values such that the potential Vini (initialization potential) of the initialization voltage signal VINI is gradually decreased for each one-frame period (1F) of a video signal are generated for the potential Vini (initialization potential) of the initialization voltage signal VINI. As a result, it is possible to suppress luminance non-uniformity in the Y direction (second direction) that accompanies voltage drops in the drive potential V.sub.DD and the reference potential V.sub.SS that are attributable to the locations from which power is fed to the drive potential V.sub.DD and the reference potential V.sub.SS.”) It therefore would have been obvious to those having ordinary skill in the art before the effective filing date of the invention to vary Vini across first and second pixels to emit different luminances as this was known in view of Tomitani and would have been utilized for the purpose of to suppress luminance non-uniformity that accompanies voltage drops in the drive potential and the reference potential that are attributable to the locations from which power is fed to the drive potential and the reference potential. (Tomitani, [0121]) Consider Claim 19: Lin in view of Kang in view of Lee in view of Tomitani disclose the display device of claim 18, wherein the luminance of the second pixel is lower than the luminance of the first pixel in the first frame section. (Tomitani, [0121], “FIG. 15 illustrates an example of the initialization voltage signal for correcting luminance non-uniformity in the Y direction (second direction) out of luminance non-uniformity in the X direction (first direction) and the Y direction (second direction) on the screen of the display area 38a. That is, in the example illustrated in FIG. 15, data values such that the potential Vini (initialization potential) of the initialization voltage signal VINI is gradually decreased for each one-frame period (1F) of a video signal are generated for the potential Vini (initialization potential) of the initialization voltage signal VINI. As a result, it is possible to suppress luminance non-uniformity in the Y direction (second direction) that accompanies voltage drops in the drive potential V.sub.DD and the reference potential V.sub.SS that are attributable to the locations from which power is fed to the drive potential V.sub.DD and the reference potential V.sub.SS.”) Consider Claim 20: Lin in view of Kang in view of Lee in view of Tomitani disclose the display device of claim 18, wherein when a value of the total current becomes smaller than the first reference current value in the second frame section, the first pixel and the second pixel emit light with different luminances in response to the same data value, but the luminance of the first pixel is lower than the luminance of the second pixel in the second frame section. (Tomitani, [0121], “FIG. 15 illustrates an example of the initialization voltage signal for correcting luminance non-uniformity in the Y direction (second direction) out of luminance non-uniformity in the X direction (first direction) and the Y direction (second direction) on the screen of the display area 38a. That is, in the example illustrated in FIG. 15, data values such that the potential Vini (initialization potential) of the initialization voltage signal VINI is gradually decreased for each one-frame period (1F) of a video signal are generated for the potential Vini (initialization potential) of the initialization voltage signal VINI. As a result, it is possible to suppress luminance non-uniformity in the Y direction (second direction) that accompanies voltage drops in the drive potential V.sub.DD and the reference potential V.sub.SS that are attributable to the locations from which power is fed to the drive potential V.sub.DD and the reference potential V.sub.SS.”) Allowable Subject Matter Claim 10 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Prior art made of record and not relied upon which is still considered pertinent to applicant's disclosure is cited in a current or previous PTO-892. The prior art cited in a current or previous PTO-892 reads upon the applicants claims in part, in whole and/or gives a general reference to the knowledge and skill of persons having ordinary skill in the art before the effective filing date of the invention. Applicant, when responding to this Office action, should consider not only the cited references applied in the rejection but also any additional references made of record. In the response to this office action, the Examiner respectfully requests support be shown for any new or amended claims. More precisely, indicate support for any newly added language or amendments by specifying page, line numbers, and/or figure(s). This will assist The Office in compact prosecution of this application. The Office has cited particular columns, paragraphs, and/or line numbers in the applied rejection of the claims above for the convenience of the applicant. Citations are representative of the teachings in the art and are applied to the specific limitations within each claim, however other passages and figures may apply. Applicant, in preparing a response, should fully consider the cited reference(s) in its entirety and not only the cited portions as other sections of the reference may expand on the teachings of the cited portion(s). Applicant Representatives are reminded of CFR 1.4(d)(2)(ii) which states “A patent practitioner (§ 1.32(a)(1) ), signing pursuant to §§ 1.33(b)(1) or 1.33(b)(2), must supply his/her registration number either as part of the S-signature, or immediately below or adjacent to the S-signature. The number (#) character may be used only as part of the S-signature when appearing before a practitioner’s registration number; otherwise the number character may not be used in an S-signature.” When an unsigned or improperly signed amendment is received the amendment will be listed in the contents of the application file, but not entered. The examiner will notify applicant of the status of the application, advising him or her to furnish a duplicate amendment properly signed or to ratify the amendment already filed. In an application not under final rejection, applicant should be given a two month time period in which to ratify the previously filed amendment (37 CFR 1.135(c) ). Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL J JANSEN II whose telephone number is (571)272-5604. The examiner can normally be reached Normally Available Monday-Friday 9am-4pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Temesghen Ghebretinsae can be reached on 571-272-3017. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Michael J Jansen II/ Primary Examiner, Art Unit 2626
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Prosecution Timeline

Jan 18, 2024
Application Filed
Apr 30, 2025
Non-Final Rejection — §103, §DP
Aug 01, 2025
Response Filed
Aug 18, 2025
Final Rejection — §103, §DP
Oct 14, 2025
Response after Non-Final Action
Nov 07, 2025
Request for Continued Examination
Nov 15, 2025
Response after Non-Final Action
Feb 09, 2026
Non-Final Rejection — §103, §DP (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
66%
Grant Probability
86%
With Interview (+20.4%)
2y 3m
Median Time to Grant
High
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