Prosecution Insights
Last updated: August 17, 2026
Application No. 18/416,388

IMAGE SENSOR

Non-Final OA §103§Other
Filed
Jan 18, 2024
Priority
Jan 25, 2023 — RE 10-2023-0009544
Examiner
TRAN, TIEN
Art Unit
2812
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
90%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 90% — above average
90%
Career Allowance Rate
19 granted / 21 resolved
+22.5% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
21 currently pending
Career history
46
Total Applications
across all art units

Statute-Specific Performance

§101
1.7%
-38.3% vs TC avg
§103
62.8%
+22.8% vs TC avg
§102
19.8%
-20.2% vs TC avg
§112
10.7%
-29.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 21 resolved cases

Office Action

§103 §Other
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . DETAILED ACTION Elections/Restrictions Applicant’s election of Species A (Claims 1-7 and 10-15) in the reply filed on 05/19/2026 is acknowledged. Because applicant did not distinctly and specifically point out the supposed errors in the restriction requirement, the election has been treated as an election without traverse (MPEP § 818.01(a)). Priority Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d) based upon an application filed in KOREA on 01/25/2023. Information Disclosure Statement The information disclosure statement (IDS) submitted on 01/18/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Objections Claim 14 is objected to because of the following informalities: Claim 14, line 3: “one coupling prevention line” should read “the coupling prevention line” or “the one coupling prevention line”, since line 2 of claim 14 already recited “one coupling prevention line”. Appropriate correction is required. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 1-7 and 10-15 are rejected under 35 U.S.C. 103 as being unpatentable over US20170221954A1; Madurawe et al.; (hereinafter “Madurawe”) in view of US20100060764A1; McCarten et al.; (hereinafter “McCarten”). Regarding Claim 1, Madurawe teaches an image sensor ([0019], stacked-die image sensor) comprising: a first structure (#48A, Figure 6) and a second structure stacked (#48B) in a vertical direction, the first structure comprising a first pixel region (upper die #34); a photoelectric conversion unit (#62, photodiodes convert light to electrical charge) in the first pixel region; a floating diffusion region (#46A) in the first pixel region; a first interlayer insulating layer ([0032], dielectric layer of dies #34-36) on the floating diffusion region; and a first pixel pad (#38A) electrically connected to the floating diffusion region (#46A), and the second structure comprising a second pixel region (lower die #36); a source-follower transistor (#54) in the second pixel region; a second interlayer insulating layer ([0032]) on the source-follower transistor; and a second pixel pad (#38B) electrically connected to a gate of the source-follower transistor (#54, [0034]); and a coupling prevention line (#60, [0047]) arranged around the first and second pixel pads (#38A-B). Madurawe does not explicitly teach the coupling prevention line electrically connected to a source region of the source-follower transistor. However, McCarten teaches a comparable image sensor ([0004]), comprising a coupling prevention line (#100, Figure 5, metal shield) electrically connected to a source region of the source-follower transistor (Figures 5-6, [0025], shield #100 connects to output terminal/source #109 of the source follower transistor via connector #101). It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Madurawe with the teaching of McCarten in order to reduce floating diffusion capacitance, capacitive coupling between adjacent wires and electrical crosstalk according to McCarten, [0025]. Regarding Claim 2, Madurawe in view of McCarten teaches the image sensor as described in claim 1, wherein Madurawe further teaches the coupling prevention line has a closed line shape surrounding the first and second pixel pads (Figure 6, [0043] or [0050], shielding structure #60 forms completely surrounding coupling structure #38). Regarding Claim 3, Madurawe in view of McCarten teaches the image sensor as described in claim 2, wherein Madurawe further teaches a vertical level of an uppermost surface of the coupling prevention lines (#60) is the same as a vertical level of an uppermost surface of the first pixel pad (Figure 6, shielding structure #60 is at a same level as upper coupling structure #38A), and a vertical level of a lowermost surface of the coupling prevention lines is the same as a vertical level of a lowermost surface of the second pixel pad (shielding structure #60 is at a same level as lower coupling structure #38B). Regarding Claim 4, Madurawe in view of McCarten teaches the image sensor as described in claim 3, wherein Madurawe further teaches a first vertical via (#66B, Figure 6) configured to electrically connect the lowermost surface of the second pixel pad (#38B) to the gate of the source-follower transistor (#54); and a second vertical via configured to electrically connect the lowermost surface of the coupling prevention lines to the source region of the source-follower transistor (Figure 5 of McCarten, see rejection of claim 1, connector #101 connects metal shield #100 to output terminal/source #109 of the source follower transistor). Regarding Claim 5, Madurawe in view of McCarten teaches the image sensor as described in claim 4, wherein Madurawe further teaches the first structure (#48A, Figure 6) is on a first substrate (#34), the second structure (#48B) is on a second substrate (#36), and the first pixel pad and the second pixel pad contact with each other in a copper-to-copper (Cu-to-Cu) direct bonding method ([0031] & [0037], coupling structures #38A-B comprise copper and are bonded using metal-to-metal bonding technique). Regarding Claim 6, Madurawe in view of McCarten teaches the image sensor as described in claim 5, wherein Madurawe further teaches an active surface (#48A, Figure 6) of the first substrate (#34) and an active surface (#48B) of the second substrate (#36) face each other, the first and second vertical vias are in contact with a metal wiring layer on the active surface of the second substrate without passing through the second substrate (Figure 6 of Madurawe annotated below, via #66B and the connector both connect to the metal wiring of active surface #48B of lower die #36), and the metal wiring layer is electrically connected to the source-follower transistor (#54). PNG media_image1.png 931 1172 media_image1.png Greyscale Regarding Claim 7, Madurawe in view of McCarten teaches the image sensor as described in claim 6, wherein Madurawe further teaches the first and second pixel pads (#38A-B, Figure 6) and the gate of the source-follower transistor (#54) are on the active surface (#48B) of the second substrate (#36). Regarding Claim 10, Madurawe in view of McCarten teaches the image sensor as described in claim 1, wherein Madurawe further teaches a third structure on the second structure ([0033], a third integrated circuit die can dispose on die #36), the third structure comprising a third pixel region; a logic transistor in the third pixel region; and a third interlayer insulating layer on the logic transistor ([0032-0033], the third die can comprise analog and digital image sensor circuitry, wherein each die comprise a dielectric layer). Regarding Claim 11, Madurawe teaches an image sensor (Figure 6) comprising: a first substrate having a pixel region (#34); a photoelectric conversion unit (#62) in the pixel region; a floating diffusion region (#46A) in the pixel region; a first metal wiring layer (upper circuitry #48A) on the first substrate, and a first interlayer insulating layer ([0032]) surrounding the first metal wiring layer; a second metal wiring layer (lower circuitry #48B) on the first interlayer insulating layer, and a second interlayer insulating layer ([0032]) surrounding the second metal wiring layer; a source-follower transistor (#54) on the second interlayer insulating layer; a pixel pad (#38A-B) located in the first and second interlayer insulating layers ([0032]), electrically connected to the floating diffusion region (#46A) via the first metal wiring layer (#48A/#66A), and electrically connected to a gate of the source-follower transistor (#54, [0034]) via the second metal wiring layer (#48B/#66B); and a coupling prevention line arranged around the pixel pad. Madurawe does not explicitly teach the coupling prevention line electrically connected to a source region of the source-follower transistor via the second metal wiring layer. However, McCarten teaches a comparable image sensor ([0004]), comprising a coupling prevention line (#100, Figure 5, metal shield) electrically connected to a source region of the source-follower transistor via the second metal wiring layer (Figures 5-6, [0025], shield #100 connects to output terminal/source #109 of the source follower transistor via connector #101). It would have been obvious to one of ordinary skill in the art prior to the effective filling date of the claimed invention to modify the invention disclosed by Madurawe with the teaching of McCarten in order to reduce floating diffusion capacitance, capacitive coupling between adjacent wires and electrical crosstalk according to McCarten, [0025]. Regarding Claim 12, Madurawe in view of McCarten teaches the image sensor as described in claim 11, wherein Madurawe further teaches the pixel pad is formed by a first pixel pad (#38A, Figure 6) in the first interlayer insulating layer ([0032]) and a second pixel pad (#38B) located in the second interlayer insulating layer ([0032]), the first pixel pad and the second pixel pad contacting with each other in a copper-to-copper (Cu-to-Cu) bonding method ([0031] & [0037], copper coupling structures #38A-B are bonded using metal-to-metal bonding technique). Regarding Claim 13, Madurawe in view of McCarten teaches the image sensor as described in claim 12, wherein Madurawe further teaches the coupling prevention line (#60, Figure 6 of Madurawe annotated) is formed by a first coupling prevention line (#S1) in the first interlayer insulating layer ([0032]) and a second coupling prevention line (#S2) in the second interlayer insulating layer ([0032]), the first coupling prevention line and the second coupling prevention line contacting with each other in a copper-to-copper (Cu-to-Cu) bonding method ([0037] & [0040], copper shielding structure #60 can be formed similarly to coupling structures #38A-B and bonded using known metal-to-metal bonding technique). Regarding Claim 14, Madurawe in view of McCarten teaches the image sensor as described in claim 11, wherein Madurawe further teaches one pixel pad (#38A-B, Figure 6) is surrounded by one coupling prevention line (#60), and one coupling prevention line has a closed square line shape (Figure 10). Regarding Claim 15, Madurawe in view of McCarten teaches the image sensor as described in claim 1, wherein Madurawe further teaches in plan view, an imaginary line connecting centers of neighboring pixel pads crosses two coupling prevention lines (Figure 10, a center line crosses center of adjacent coupling structures such as #38-1 and #38-2 and shielding structures #60A-B). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US20230299109A1 – Figures 11-12 US20210265200A1 – Figures 40A-B US20200127032A1 – Figures 2, 12 or 25 US20180138223A1 – Figures 1-2, 7 US20240355858A1 – Figures 1B-C Any inquiry concerning this communication or earlier communications from the examiner should be directed to TIEN TRAN whose telephone number is (571)272-6967. The examiner can normally be reached Monday-Thursday 9:00 am - 6:00 pm ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, CHRISTINE S KIM can be reached on (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TIEN TRAN/Examiner, Art Unit 2812 /CHRISTINE S. KIM/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Jan 18, 2024
Application Filed
Jul 14, 2026
Non-Final Rejection mailed — §103, §Other
Aug 07, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
90%
Grant Probability
99%
With Interview (+13.3%)
3y 2m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 21 resolved cases by this examiner. Grant probability derived from career allowance rate.

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