DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Foreign Priority
Receipt is acknowledged of certified copies of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file, as electronically retrieved 03/04/2024.
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 01/22/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 1-3, 7-11, 16-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hwang et al. (PG Pub 2020/0135699; hereinafter Hwang) and Chen et al. (PG Pub 2021/0066222; hereinafter Chen).
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Regarding claim 1, refer to Fig.1 and the Examiner’s mark-up of Fig. 2-provided above, Hwang teaches a semiconductor package 300a comprising:
a first semiconductor chip 100b comprising:
a first semiconductor layer 120;
a first connection pad 152 provided on a surface (bottom surface) of the first semiconductor layer (see Fig. 2); and
a first insulation layer 162 provided on the surface of the first semiconductor layer, the surface of the first semiconductor layer extending in a first direction (horizontal direction); and
a second semiconductor chip 100a comprising:
a second semiconductor layer 110;
a second connection pad 154 provided on a surface (top surface) of the second semiconductor layer (see Fig. 2); and
a second insulation layer 164b provided on the surface of the second semiconductor layer, wherein the first connection pad directly contacts the second connection pad (see Fig. 2),
wherein the first connection pad is provided on the second connection pad in a second direction (vertical direction) that is perpendicular to the first direction (see Fig. 2),
wherein the first insulation layer directly contacts the second insulation layer (see Fig. 2),
wherein the first insulation layer is provided on the second insulation layer in the second direction (see Fig. 2), and
wherein a width of the second connection pad in the first direction is equal to a width of the first connection pad in the first direction.
Although, Hwang teaches the claimed structure of the semiconductor package including the hybrid bonding of the first and second connection pad; wherein the width of the second connection pad in the first direction is equal to the width of the first connection pad in the first direction. He does not explicitly teach “a width of the second connection pad in the first direction is smaller than a width of the first connection pad in the first direction.”
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In the same field of endeavor, refer to Fig. 18a-provided above, Chen teaches a bonding structure comprising: a width of a second connection pad 316 in a first direction (horizontal direction) is smaller than a width of a first connection pad 410 in the first direction (see Fig. 18a).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the widths of the first and second connection pads, as taught by Chen, to “reduce the size of a die or package” (para [0010]).
Regarding claim 2, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches a width of the first insulation layer (annotated “w1” in Fig. 2 above) in the first direction (horizontal) is larger than a width of the second insulation layer (annotated “w2” in Fig. 2 above) in the first direction (see Fig. 2).
Regarding claim 3, refer to the figures cited above, in the combination of Hwang and Chen, Although, Hwang teaches the first connection pad 152 contacts the second connection pad 154 in a first layer (the shared abutting layer of 152/154), wherein the first insulation layer contacts the second insulation layer in a second layer (the shared abutting layer of 162/164), and wherein a height of the second layer is the same as a height of the first layer in the second direction. He does not explicitly teach the height of the second layer is different from a height of the first layer in the second direction.
However, one of ordinary skill in the art would have found it obvious to alter the size of the second layer to be less than, equal to or greater than the height of the first layer (in the second direction) since the court has held changes in size/proportion normally require only ordinary skill in the art and hence are considered routine expedients are discussed below (MPEP § 2144).
Furthermore, according to MPEP § 2144.05(IV)(A) “[W]here the facts in a prior legal decision are sufficiently similar to those in an application under examination, the examiner may use the rationale used by the court. Examples directed to various common practices which the court has held normally require only ordinary skill in the art and hence are considered routine expedients are discussed below.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation),Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree “will not sustain a patent”); and In re Williams, 36 F.2d 436, 438 (CCPA 1929) (“It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions.”).
Regarding claim 7, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the first semiconductor chip 100b further comprises a first through electrode 130 that is connected with the first connection pad 152 and penetrates the first semiconductor layer 110 in a direction opposite to the second direction (see Fig. 2), wherein the second semiconductor chip 100s further comprises a second through electrode 130 that is connected with the second connection pad 154 and penetrates the second semiconductor layer 110 in the second direction (see Fig. 2), and wherein a width of the second through electrode in the first direction is equal to a width of the first through electrode in the first direction (see Fig. 2). He does not explicitly teach a width of the second through electrode in the first direction is smaller than a width of the first through electrode in the first direction.
However, one of ordinary skill in the art would have found it obvious to alter the size of the second through electrode to be less than, equal to or greater than the width of the first through electrode (in the first direction) since the court has held changes in size/proportion normally require only ordinary skill in the art and hence are considered routine expedients are discussed below (MPEP § 2144).
Furthermore, according to MPEP § 2144.05(IV)(A) “[W]here the facts in a prior legal decision are sufficiently similar to those in an application under examination, the examiner may use the rationale used by the court. Examples directed to various common practices which the court has held normally require only ordinary skill in the art and hence are considered routine expedients are discussed below.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation),Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree “will not sustain a patent”); and In re Williams, 36 F.2d 436, 438 (CCPA 1929) (“It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions.”).
Regarding claim 8, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the second semiconductor chip 100a comprises a semiconductor device (para [0021]) that is provided in a region adjacent to the second connection pad 154 and electrically connected with the second connection pad (see Fig. 2).
Regarding claim 9, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches a third semiconductor chip comprising: a third semiconductor layer 100c; a third connection pad 140 provided on a surface of the third semiconductor layer (bottom surface); and a third insulation layer 162 provided on the surface of the third semiconductor layer (see Fig. 1), a fourth connection pad 164 directly contacting the third connection pad provided on the third connection pad in the second direction (vertical) (see Fig. 1); and a fourth insulation layer 164b directly contacting the third insulation layer (see Fig. 1), wherein a width of the third connection pad in the first direction is equal to a width of the fourth connection pad in the first direction.
He does not explicitly teach “a width of the third connection pad in the first direction is larger than a width of the fourth connection pad in the first direction.”
In the same field of endeavor, refer to Fig. 18a-provided above, Chen teaches a bonding structure comprising: a width of the third connection pad 316 in the first direction (horizontal direction) is larger than a width of the fourth connection pad 128 in the first direction (see Fig. 18a).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the widths of the first and second connection pads, as taught by Chen, to “reduce the size of a die or package” (para [0010]).
Regarding claim 10, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the width of the third connection pad 140 in the first direction (horizontal) is the same as a width of the first connection pad 152 in the first direction (see Fig. and Fig. 2).
Regarding claim 11, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches (claim 9,) the third semiconductor chip 100c comprises a third through electrode 130 that is connected with the third connection pad 162 and penetrates the third semiconductor layer 120 in the second direction (vertical) (see Fig. 2), and wherein a width of the third through electrode in the first direction is equal to a width of the second through electrode in the first direction (see Fig. 1 and Fig. 2).
He does not explicitly teach a width of the third through electrode in the first direction is smaller than a width of the second through electrode in the first direction.
However, one of ordinary skill in the art would have found it obvious to alter the size of the third through electrode to be less than, equal to or greater than the width of the second through electrode (in the first direction) since the court has held changes in size/proportion normally require only ordinary skill in the art and hence are considered routine expedients are discussed below (MPEP § 2144).
Furthermore, according to MPEP § 2144.05(IV)(A) “[W]here the facts in a prior legal decision are sufficiently similar to those in an application under examination, the examiner may use the rationale used by the court. Examples directed to various common practices which the court has held normally require only ordinary skill in the art and hence are considered routine expedients are discussed below.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation),Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree “will not sustain a patent”); and In re Williams, 36 F.2d 436, 438 (CCPA 1929) (“It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions.”).
Regarding claim 16, refer to Fig.1 and the Examiner’s mark-up of Fig. 2-provided above, Hwang teaches a method of manufacturing a semiconductor package 300a the method comprising:
a first semiconductor chip 100b comprising:
a first semiconductor layer 120;
a first connection pad 152 provided on a surface (bottom surface) of the first semiconductor layer (see Fig. 2); and
a first insulation layer 162 provided on the surface of the first semiconductor layer, the surface of the first semiconductor layer extending in a first direction (horizontal direction); and
a second semiconductor chip 100a comprising:
a second semiconductor layer 110;
a second connection pad 154 provided on a surface (top surface) of the second semiconductor layer (see Fig. 2); and
a second insulation layer 164b provided on the surface of the second semiconductor layer, and
bonding the first semiconductor chip and the second semiconductor chip such that the first connection pad and the second connection pad directly contact and the first insulation layer and the second insulation layer directly contact (see Fig. 2), wherein a width of the second connection pad in the first direction is equal to a width of the first connection pad in the first direction.
Although, Hwang teaches the claimed structure of the semiconductor package including the hybrid bonding of the first and second connection pad; wherein the width of the second connection pad in the first direction is equal to the width of the first connection pad in the first direction. He does not explicitly teach “a width of the second connection pad in the first direction is smaller than a width of the first connection pad in the first direction.”
In the same field of endeavor, refer to Fig. 18a-provided above, Chen teaches a bonding structure comprising: a width of a second connection pad 316 in a first direction (horizontal direction) is smaller than a width of a first connection pad 410 in the first direction (see Fig. 18a).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the widths of the first and second connection pads, as taught by Chen, to “reduce the size of a die or package” (para [0010]).
Regarding claim 17, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches a width of the first insulation layer (annotated “w1” in Fig. 2 above) in the first direction (horizontal) is larger than a width of the second insulation layer (annotated “w2” in Fig. 2 above) in the first direction (see Fig. 2).
Regarding claim 20, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the forming first semiconductor chip 100b further comprises forming a first through electrode 130 that is connected with the first connection pad 152 and penetrates the first semiconductor layer 110 in a direction opposite to the second direction (see Fig. 2), wherein forming the second semiconductor chip 100s further comprises a forming second through electrode 130 that is connected with the second connection pad 154 and penetrates the second semiconductor layer 110 in the second direction (see Fig. 2), and wherein a width of the second through electrode in the first direction is equal to a width of the first through electrode in the first direction (see Fig. 2). He does not explicitly teach a width of the second through electrode in the first direction is smaller than a width of the first through electrode in the first direction.
However, one of ordinary skill in the art would have found it obvious to alter the size of the second through electrode to be less than, equal to or greater than the width of the first through electrode (in the first direction) since the court has held changes in size/proportion normally require only ordinary skill in the art and hence are considered routine expedients are discussed below (MPEP § 2144).
Furthermore, according to MPEP § 2144.05(IV)(A) “[W]here the facts in a prior legal decision are sufficiently similar to those in an application under examination, the examiner may use the rationale used by the court. Examples directed to various common practices which the court has held normally require only ordinary skill in the art and hence are considered routine expedients are discussed below.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation),Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree “will not sustain a patent”); and In re Williams, 36 F.2d 436, 438 (CCPA 1929) (“It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions.”).
Claim(s) 12-14 are rejected under 35 U.S.C. 103 as being unpatentable over Dokania et al. (PG Pub 2021/0310882; hereinafter Dokania) and Hwang et al. (PG Pub 2020/0135699; hereinafter Hwang).
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Regarding claim 12, refer to Fig. 5a provided above, Dokania teaches a semiconductor package 500 comprising:
an interposer 302;
a logic die 506 provided on the interposer (see Fig. 5a); and
a high bandwidth memory 505 provided on the interposer (see Fig. 5a),
Although, Dokania teaches package structure, he does not teach the details of the high bandwidth memory such that “the high bandwidth memory comprises: a first semiconductor chip that is provided on a buffer die, the first semiconductor chip comprising: a first semiconductor layer; a first connection pad provided on a surface of the first semiconductor layer; and a first insulation layer provided on the surface of the first semiconductor layer, the surface of the first semiconductor layer extending in a first direction; and a second semiconductor chip comprising: a second semiconductor layer; a second connection pad provided on a surface of the second semiconductor layer; and a second insulation layer provided on the surface of the second semiconductor layer, wherein the first connection pad directly contacts the second connection pad, wherein the first connection pad is provided on the second connection pad in a second direction that is perpendicular to the first direction, wherein the first insulation layer directly contacts the second insulation layer, wherein the first insulation layer is provided on the second insulation layer in the second direction, and wherein the semiconductor package comprises
In the same field of endeavor, refer to Fig.1 and the Examiner’s mark-up of Fig. 2-provided above, Hwang teaches a semiconductor package 300a comprising: a buffer die110; a first semiconductor chip 100b comprising: a first semiconductor layer 120; a first connection pad 152 provided on a surface (bottom surface) of the first semiconductor layer (see Fig. 2); and a first insulation layer 162 provided on the surface of the first semiconductor layer, the surface of the first semiconductor layer extending in a first direction (horizontal direction); and a second semiconductor chip 100a comprising: a second semiconductor layer 110; a second connection pad 154 provided on a surface (top surface) of the second semiconductor layer (see Fig. 2); and a second insulation layer 164b provided on the surface of the second semiconductor layer, wherein the first connection pad directly contacts the second connection pad (see Fig. 2), wherein the first connection pad is provided on the second connection pad in a second direction (vertical direction) that is perpendicular to the first direction (see Fig. 2), wherein the first insulation layer directly contacts the second insulation layer (see Fig. 2), wherein the first insulation layer is provided on the second insulation layer in the second direction (see Fig. 2), and wherein a width of the second connection pad in the first direction is equal to a width of the first connection pad in the first direction; wherein a molding member 180 that is provided on the buffer die and molds the first semiconductor chip and the second semiconductor chip (see Fig. 1).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have the high band-width memory structure of Gu comprise the details, as taught by Hwang, to provide a relatively high performance and relatively high capacity, along with miniaturization and weight reduction (para [0003]).
Regarding claim 13, refer to the figures cited above, in the combination of Dokania and Hwang
Hwang teaches a width of the first insulation layer (annotated “w1” in Fig. 2 above) in the first direction (horizontal) is larger than a width of the second insulation layer (annotated “w2” in Fig. 2 above) in the first direction (see Fig. 2).
Regarding claim 14, refer to the figures cited above, in the combination of Dokania and Hwang
Although, Hwang teaches the first connection pad 152 contacts the second connection pad 154 in a first layer (the shared abutting layer of 152/154), wherein the first insulation layer contacts the second insulation layer in a second layer (the shared abutting layer of 162/164), and wherein a height of the second layer is the same as a height of the first layer in the second direction. He does not explicitly teach the height of the second layer is different from a height of the first layer in the second direction.
However, one of ordinary skill in the art would have found it obvious to alter the size of the second layer to be less than, equal to or greater than the height of the first layer (in the second direction) since the court has held changes in size/proportion normally require only ordinary skill in the art and hence are considered routine expedients are discussed below (MPEP § 2144).
Furthermore, according to MPEP § 2144.05(IV)(A) “[W]here the facts in a prior legal decision are sufficiently similar to those in an application under examination, the examiner may use the rationale used by the court. Examples directed to various common practices which the court has held normally require only ordinary skill in the art and hence are considered routine expedients are discussed below.” See In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (Where the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation),Smith v. Nichols, 88 U.S. 112, 118-19 (1874) (a change in form, proportions, or degree “will not sustain a patent”); and In re Williams, 36 F.2d 436, 438 (CCPA 1929) (“It is a settled principle of law that a mere carrying forward of an original patented conception involving only change of form, proportions, or degree, or the substitution of equivalents doing the same thing as the original invention, by substantially the same means, is not such an invention as will sustain a patent, even though the changes of the kind may produce better results than prior inventions.”).
3. Claim(s) 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hwang and Chen, as applied to claim 16 above, and further in view of Chen et al. (PG Pub 2021/0265313; hereinafter Chen-2).
Regarding claim 18, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the bonding the first semiconductor chip 110b and the second semiconductor chip 100a comprises, after bonding the first connection pad 152 and the second connection pad 154.
He does not teach “annealing the semiconductor package at 160°C to 220°C”.
In the same field of endeavor, Chen-2 teaches the thermal annealing for conductor bonding may be performed at temperature ranging from about 150° C. to about 400° C (para [0040]).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to anneal the first connection pad and the second connection pad of Hwang, at the temperature between160°C to 220°C”, as taught by Chen-2, to facilitate bonding (para [0027]).
Regarding claim 19, refer to the figures cited above, in the combination of Hwang and Chen, Hwang teaches the forming the second semiconductor chip 100a comprises: forming the second insulation layer 164b including an opening _space occupied by 154) that exposes a surface of the second connection pad 154-top on a surface of the second semiconductor chip (see Fig. 2). He does not teach “wet-etching the second insulation layer.”
In the same field of endeavor, Chen-2 teaches wet-etching a second insulation layer AS1 (para [0038]).
In light of such teachings, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to wet-etch the second insulation layer, as taught by Chen-2, to facilitate the hybrid bonding” (para [0038]).
Allowable Subject Matter
4. Claims 4-6 and 15 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
Claim 4 contains allowable subject matter, because the prior art of record, either singularly or in combination, fails to disclose or suggest, in combination with the other elements in claim 4, the first connection pad extends in the second direction in the first insulation layer, wherein the first connection pad has a surface provided in a concave portion, and wherein the second connection pad extends in the second direction in the second insulation layer.
Claim 5 contains allowable subject matter, because the prior art of record, either singularly or in combination, fails to disclose or suggest, in combination with the other elements in claim 5, the first connection pad and the first insulation layer are provided on a same layer, and wherein an empty space is provided between a side surface of the second connection pad and a side surface of the second insulation layer.
Claim 6 contains allowable subject matter, because the prior art of record, either singularly or in combination, fails to disclose or suggest, in combination with the other elements in claim 6, a width of the second insulation layer in the first direction decreases as the second insulation layer extends toward a direction opposite to the second direction, and wherein an edge of a portion of the second insulation layer, adjacent to the second connection pad has a rounded shape.
Claim 15 contains allowable subject matter, because the prior art of record, either singularly or in combination, fails to disclose or suggest, in combination with the other elements in claim 15, a width of the second insulation layer in the first direction decreases as the second insulation layer extends toward a direction opposite to the second direction, and wherein an edge of a portion of the second insulation layer, adjacent to the second connection pad has a rounded shape.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Christina A Sylvia whose telephone number is (571)272-7474. The examiner can normally be reached on 8am-4pm (M-F).
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Marlon Fletcher can be reached on 571-272-2063. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/CHRISTINA A SYLVIA/Examiner, Art Unit 2817
/MARLON T FLETCHER/Supervisory Primary Examiner, Art Unit 2817