Prosecution Insights
Last updated: April 19, 2026
Application No. 18/419,592

FILM FORMING APPARATUS AND METHOD FOR MANUFACTURING PART HAVING FILM CONTAINING SILICON

Non-Final OA §102§103
Filed
Jan 23, 2024
Examiner
PROCTOR, CACHET I
Art Unit
1712
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Tokyo Electron Limited
OA Round
1 (Non-Final)
77%
Grant Probability
Favorable
1-2
OA Rounds
3y 1m
To Grant
83%
With Interview

Examiner Intelligence

Grants 77% — above average
77%
Career Allow Rate
814 granted / 1058 resolved
+11.9% vs TC avg
Moderate +6% lift
Without
With
+5.7%
Interview Lift
resolved cases with interview
Typical timeline
3y 1m
Avg Prosecution
25 currently pending
Career history
1083
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
47.7%
+7.7% vs TC avg
§102
24.4%
-15.6% vs TC avg
§112
20.5%
-19.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1058 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Objections Claim 40 is objected to because of the following informalities: claim 40 recites “… wherein the target is at least one of an edge ring, an upper electrode, an exhaust ring and a deposition”. It seems there is missing language to define what deposition is describing and the claim is missing a period at the end of the claim. Appropriate correction is required. NOTE: the examiner will interpret the claim to mean a deposition shield which is referenced on page 14, line 10 of the specification. Claim Interpretation Under the broadest reasonable interpretation consistent with the specification, the examiner will interpret the limitation “by melting the silicon-containing material on the surface of the target using a heat source under the reduced pressure environment” to mean the material must be molten when it is supplied to the substrate or can be melted while on the substrate. The specification describes embodiments in which the film-forming material is melted in the vicinity of the substrate and the molten material is supplied on the substrate surface to form the film. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 21 and 26-29 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Varacalle Jr. et al. (US 5332601), as evident by Dhindsa et al. (US 20120031559). As to claim 21, Varacalle Jr. et al. discloses a process for forming a silicon carbide coating on a graphite substrate. The process comprises spraying the graphite substrate using a vacuum in a reduced pressure inert gas (see col. 2, lines 1-2) plasma spraying process with silicon . The silicon is melted in the plasma as it is sprayed onto the substrate. Varacalle Jr. et al. further states the coated substrate is placed in an oven at 1600C (see abstract, col. 3, lines 20-24). Heating at 1600C exceeds the melting point of silicon and therefore the silicon melts and infiltrates the graphite (see col.5, lines 55-58). Varacalle Jr. et al. discloses that silicon carbide is used as a hard and wear resistant coating material and prevents sublimation of the graphite and protects the graphite at high temperatures (see col. 1, lines 36-46). Varacalle Jr. et al. does not explicitly state the silicon containing material forms a plasma resistant film, however, it is well known in the art that silicon carbide is a plasma resistant material (see 0034, 0045 of Dhindsa et al.). As to claims 26-29, the silicon powder is deposited in a reduced-pressure atmosphere with a reducing gas (hydrogen) and noble gas (argon) (see col. 2, lines 51-54 of Varacalle). Claim(s) 21 and 38-40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dhindsa et al. (US 20120031559) in view of Varacalle Jr. et al. (US 5332601). Dhindsa et al. discloses treating a showerhead electrode that is exposed to plasma with a plasma resistant material as a coating. The coating can be formed of silicon, silicon carbide, silicon oxide or yttrium oxide (See 0034). Dhindsa et al. fails to teach the silicon layer is formed by supplying silicon containing material onto the surface of a target under reduced pressure and forming a plasma resistant coating on the surface by melting the silicon containing material on the surface of the target using a heat source under reduced pressure as required by claim 21. Varacalle Jr. et al. discloses a process for forming a silicon carbide coating on a graphite substrate. The process comprises spraying the graphite substrate using a vacuum in a reduced pressure inert gas (see col. 2, lines 1-2) plasma spraying process with silicon . The silicon is melted in the plasma as it is sprayed onto the substrate. Varacalle Jr. et al. further states the coated substrate is placed in an oven at 1600C (see abstract, col. 3, lines 20-24). Heating at 1600C exceeds the melting point of silicon and therefore the silicon melts and infiltrates the graphite (see col.5, lines 55-58). Varacalle Jr. et al. discloses that silicon carbide is used as a hard and wear resistant coating material and prevents sublimation of the graphite and protects the graphite at high temperatures (see col. 1, lines 36-46). It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify Dhindsa et al. to include forming the silicon carbide as taught by Varacalle Jr. et al. One would have been motivated to do so since both are directed to forming silicon carbide layers where Varacalle Jr. et al. teaches an operable method of forming silicon carbide layers on substrates. It has been established that he mere substitution of one known element for another with same intended purpose provides predictable results. As to claims 38-40, the target is a showerhead electrode (See Dhindsa et al.). Allowable Subject Matter Claims 22-25 and 30-37 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. As to claim 22, the prior art of Fukubayashi et al. (US 20080226843) discloses a process for forming a film on a substrate through laser cladding. The process comprises moving a laser across a substrate, providing a composite powder on the surface of the substrate; and the laser is moved quickly across the substrate to rapidly melt and solidify the material (see 0039). Fukubayashi et al. states the cladding material can contain silicon (see 0047). Fukubayashi et al. fails to teach the coating provides plasma resistance as required by claim 21. The prior art teaches applying a silicon containing material onto a substrate by melting a material on the surface using a heating source where the laser is moved across the surface. The prior art fails to teach or suggest the coating contains a form of silicon or the coating in itself is plasma resistant. As to claims 23-25, Varacalle Jr. et al. discloses using a pressure or 60mbar to form the coating. The prior art fails to teach or suggest using pressures in the claimed range especially since such pressures are magnitudes smaller than that of Varacalle Jr. et al. As to claim 30, the silicon containing material is supplied by spraying in Varacalle Jr. et al. the prior art fails to teach free falling the coating material onto the surface as claimed. As to claim 31-37, Kamiyama et al. (US 20120100306) discloses a process for forming a thin film of silicon material by providing a rod-shaped silicon material (see abstract, 32 of Fig. 1); melting the material using an electron gun (15 of fig. 1, abstract); the melted material drops into an evaporation source (see abstract, 0039), is evaporated and forms a thin film on the target (see 21 of Fig. 1). Kamiyama et a. fails to teach or suggest the thin film is formed by melting the silicon-containing material on the surface of the target as required by claim 21. There is no motivation to combine the teaching of using a rod-shaped silicon material of Kamiyama et al. in the process of Varacalle Jr. et al. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Sun et al. (US 9017765) discloses a process for forming a protective coating that is resistant to reactive plasma. The process comprises applying a slurry of material over the substrate, sintering the material while on the substrate to form the coating (see claim 1). Sun et al. fails to teach the material contains silicon. Sun et al. (US 2010/0119843) discloses applying a plasma resistant coating on chamber components using ion assisted deposition or plasma reactive deposition (see claim 14). Sun et al. states the plasma resistant coating can be formed of an oxide, nitride, boride, carbide or fluoride of scandium, yttrium, iridium, rhodium, cerium, etc. (see 0034). Sun et al. further states the material may further include a small amount of silicon carbide (see 0034). Sun et al. teaches an intermediate layer of silicon dioxide/carbide can be applied prior to applying the plasma resistant coating (see 0009). Sun et al. fails to teach heating a silicon-containing material on the surface as claimed. AmRehin et al. (US 20030215963) discloses a process for forming a protective coating for susceptors using in semiconductor deposition chambers. The process comprises coating the chamber equipment with a layer of silicon nitride and then oxidizing the layer (see abstract). Any inquiry concerning this communication or earlier communications from the examiner should be directed to Cachet I Proctor whose telephone number is (571)272-0691. The examiner can normally be reached Monday-Friday 8-4:30 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Gordon Baldwin can be reached at 571-272-5166. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CACHET I. PROCTOR/ Examiner Art Unit 1715 /CACHET I PROCTOR/Primary Examiner, Art Unit 1715
Read full office action

Prosecution Timeline

Jan 23, 2024
Application Filed
May 06, 2024
Response after Non-Final Action
Jan 10, 2026
Non-Final Rejection — §102, §103
Mar 03, 2026
Interview Requested
Mar 18, 2026
Examiner Interview Summary
Mar 18, 2026
Applicant Interview (Telephonic)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
77%
Grant Probability
83%
With Interview (+5.7%)
3y 1m
Median Time to Grant
Low
PTA Risk
Based on 1058 resolved cases by this examiner. Grant probability derived from career allow rate.

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