DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Applicant’s amendment filed on 7/28/2026 is acknowledged. Claims 1-2 have been amended.
Response to Arguments
Applicant’s arguments with respect to claims 1-7 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-5 are rejected under 35 U.S.C. 103 as being unpatentable over Ichinose et al. (US 2006/0150891 A1) in view of Liu et al. (CN 115029683 A) (for compact prosecution purpose, a machine translation is used here and referenced as Liu) and Wang et al. (US 2003/0109071 A1).
Regarding claim 1, Ichinose teaches a manufacturing method of a semiconductor device (any of the light emitting device ), the method comprising:
preparing a semiconductor substrate (β-Ga2O3 substrate 206 in Fig. 7) made of β-gallium oxide (as described in [0089]);
placing the semiconductor substrate on a susceptor (207) disposed in a chamber (202);
sealing the chamber (this action is implied by the fact that the chamber 202 is pumped to create a vacuum during processing);
performing a heat treatment (growth of thin film described in [0091] of Ichinose) of increasing a temperature (substrate temperature) of the semiconductor substrate and then decreasing the temperature of the semiconductor substrate by heat transfer by adjusting a temperature of the susceptor (as described in [0082] and [0091] of Ichinose, the heater is housed in the susceptor 207); and
releasing the sealing of the chamber to enable the semiconductor substrate to be taken out of the chamber (this step is implicit in order to remove the substrate from the chamber), wherein
in the preparing, the semiconductor substrate in which a first surface (front surface of substrate 206) or a second surface (back surface of substrate 207) opposite to the first surface is in a range of 45° to 90° with respect to a (100) plane or in a range of 45 ° to 90 ° with respect to a (001) plane is prepared (as described in claim 36 and [0089] of Ichinose),
in the placing, the semiconductor substrate is placed so that the second surface faces the susceptor (as shown in Fig. 7); and
in the performing of the heat treatment, the temperature of the semiconductor substrate is increased to 300 °C or more by increasing a temperature of the susceptor (as described in [0082] of Ichinose, the heater is in the susceptor 207).
But Ichinose does not teach that the increasing the temperature of the susceptor is under a condition that a temperature increase rate of the susceptor is 100 °C/min or less, and wherein the temperature increase rate of the susceptor is constant up to a final target heating temperature.
Liu teaches a method of forming a β-gallium oxide by thermal oxidation. The method includes: heating the substrate to 600 to 700°C at rate of 15 to 20 °C/min (see step 3b in middle of page 2 of Liu); after the thermal oxidation step, the substrate is naturally cooled to room temperature.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have used the ramp rates of Liu in Ichinose in order to obtain a high quality β-Ga2O3 film (see Page 2 of Liu).
As incorporated, only the ramp rates of Ichinose are modified as according to Liu. Other details of the formation of the β-Ga2O3 film remain the same.
But Ichinose in view of Liu does not explicitly teach that wherein the temperature increase rate of the susceptor is constant up to a final target heating temperature (Liu only teaches that the heating step to 600-700°C at rate of 15 to 20°C/min, but does not explicitly states that this rate is constant. Moreover, the claim language does not specify what the final heating temperature is; so it could be defined to be the temperature at the end of heating step).
Wang teaches a method of heating a substrate (Fig. 4 of Wang). The method comprises: heating the substrate at constant rate, holding the temperature for a time period, and then decreasing the temperature at a second constant rate (see Fig. 4 of Wang).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have performed the heating and cooling at constant rates in order to simplify the manufacturing process.
Regarding claim 2, Ichinose-Liu-Wang teaches all limitations of the manufacturing method according to claim 1, but does not teach wherein in the performing of the heat treatment, the temperature of the semiconductor substrate is decreased to 300 °C or less by decreasing the temperature of the susceptor under a condition that a temperature decrease rate of the susceptor is 100 °C/min or less; and wherein the temperature decrease rate of the susceptor is constant down to a final target cooling temperature (the claim language does not specify what the final cooling temperature is; so it could be defined to be the temperature at the end of cooling step).
Liu discloses that the rate of 30 °C/min is rapid (see section (2)2 on page 4 of Liu). So it implies that the naturally cooled rate is slower than this, which lies inside the claimed range of 100°C/min or less.
It is known in the art that the cooling rate can be adjusted to speed up the manufacturing process.
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have adjusted the cooling rate to 100°C/min in order to speed up the manufacturing process.
As incorporated, the cooling rate would also be a constant rate as disclosed by the teaching of Wang.
Regarding claim 3, Ichinose-Liu-Wang teaches all limitations of the manufacturing method according to claim 2, and also teaches wherein the releasing includes decreasing the temperature of the susceptor to 100°C or less (as taught in claim 2 above).
Regarding claim 4, Ichinose-Liu-Wang teaches all limitations of the manufacturing method according to claim 1, and also teaches wherein the performing of the heat treatment includes supplying an atmospheric gas (oxygen gas described in [0091] of Ichinose) into the chamber, exhausting the atmospheric gas from the chamber, and exposing the semiconductor substrate to a heated atmospheric gas in the chamber (this step is inherent in order for the oxidation process to occur).
Regarding claim 5, Ichinose-Liu-Wang teaches all limitations of the manufacturing method according to claim 4, and also teaches wherein the performing of the heat treatment includes adjusting a flow rate of the atmospheric gas such that an exchange rate of the atmospheric gas in the chamber per unit minute is 100 % or less of a volume of the chamber (it is by default that the gas inside the chamber is also equal or less than the volume of the chamber).
Claims 6-7 are rejected under 35 U.S.C. 103 as being unpatentable over Ichinose in view of Liu and Wang, as applied to claim 1 above, and further in view of Sato (US 2015/0249184 A1).
Regarding claim 6, Ichinose-Liu-Wang teaches all limitations the manufacturing method according to claim 1, but does not teach wherein in the preparing of the semiconductor substrate, the semiconductor substrate having a diameter of 2 inches is prepared.
Sato teaches that typical substrate/wafers for LED application have diameter of 2 inches ([0011] of Sato) and thickness of 400 μm ([0119] of Sato).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have used substrate size disclosed by Sato since these are typical substrate dimensions.
Regarding claim 7, Ichinose-Liu-Wang teaches all limitations the manufacturing method according to claim 1, but does not teach wherein in the preparing of the semiconductor substrate, the semiconductor substrate having a thickness of 400 μm or less between the first surface and the second surface is prepared.
Sato teaches that typical substrate/wafers for LED application have diameter of 2 inches ([0011] of Sato) and thickness of 400 μm ([0119] of Sato).
Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have used substrate size disclosed by Sato since these are typical substrate dimensions.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN A HOANG whose telephone number is (571)270-0406. The examiner can normally be reached Monday-Friday 8-9am, 10am-6pm EST.
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/Tuan A Hoang/ Primary Examiner, Art Unit 2898
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